˘ ˇˆ ˇ ˇ ˙˝ˇ˛1500 µv tlv2460aid tlv2461aid — — — — tlv2460aip tlv2461aip † this...
TRANSCRIPT
SLOS220J − JULY 1998 − REVISED FEBRUARY 2004
1WWW.TI.COM
Rail-to-Rail Output Swing
Gain Bandwidth Product . . . 6.4 MHz
±80 mA Output Drive Capability
Supply Current . . . 500 µ A/channel
Input Offset Voltage . . . 100 µV
Input Noise Voltage . . . 11 nV/√Hz
Slew Rate . . . 1.6 V/µs
Micropower Shutdown Mode(TLV2460/3/5) . . . 0.3 µA/Channel
Universal Operational Amplifier EVM
Available in Q-Temp AutomotiveHighRel Automotive ApplicationsConfiguration Control/Print SupportQualification to Automotive Standards
description
The TLV246x is a family of low-power rail-to-rail input/output operational amplifiers specifically designed forportable applications. The input common-mode voltage range extends beyond the supply rails for maximumdynamic range in low-voltage systems. The amplifier output has rail-to-rail performance with high-output-drivecapability, solving one of the limitations of older rail-to-rail input/output operational amplifiers. This rail-to-raildynamic range and high output drive make the TLV246x ideal for buffering analog-to-digital converters.
The operational amplifier has 6.4 MHz of bandwidth and 1.6 V/µs of slew rate with only 500 µA of supply current,providing good ac performance with low power consumption. Three members of the family offer a shutdownterminal, which places the amplifier in an ultralow supply current mode (IDD = 0.3 µA/ch). While in shutdown,the operational-amplifier output is placed in a high-impedance state. DC applications are also well served withan input noise voltage of 11 nV/√Hz and input offset voltage of 100 µV.
This family is available in the low-profile SOT23, MSOP, and TSSOP packages. The TLV2460 is the firstrail-to-rail input/output operational amplifier with shutdown available in the 6-pin SOT23, making it perfect forhigh-density circuits. The family is specified over an expanded temperature range (TA = −40°C to 125°C) foruse in industrial control and automotive systems, and over the military temperature range(TA = −55°C to 125°C) for use in military systems.
SELECTION GUIDE
DEVICEVDD[V]
VIO[µV]
IDD/ch[µA]
IIB[pA]
GBW[MHz]
SLEW RATE[V/µs]
Vn, 1 kHz[nV/√Hz]
IO[mA] SHUTDOWN RAIL-RAIL
TLV246x(A) 2.7−6 150 550 1300 6.4 1.6 11 25 Y I/O
TLV277x(A) 2.5−5.5 360 1000 2 5.1 10.5 17 6 Y O
TLV247x(A) 2.7−6 250 600 2.5 2.8 1.5 15 20 Y I/O
TLV245x(A) 2.7−6 20 23 500 0.22 0.11 52 10 Y I/O
TLV225x(A) 2.7−8 200 35 1 0.2 0.12 19 3 — —
TLV226x(A) 2.7−8 300 200 1 0.71 0.55 12 3 — —
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications ofTexas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
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Copyright 1998−2004, Texas Instruments Incorporated
3
2
4
6
(TOP VIEW)
1OUT
GND
IN+
VDD+
IN−
TLV2460DBV PACKAGE
5 SHDN
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Device TLV2465A is Obsolete
SLOS220J − JULY 1998 − REVISED FEBRUARY 2004
2 WWW.TI.COM
TLV2460C/I/AI and TLV2461C/I/AI AVAILABLE OPTIONS
VIOmaxPACKAGED DEVICES
TAVIOmaxAT 25°C SMALL OUTLINE
(D)SOT-23†
(DBV) SYMBOLPLASTIC DIP
(P)
0°C to 70°C 2000 µVTLV2460CDTLV2461CD
TLV2460CDBVTLV2461CDBV
VAOCVAPC
TLV2460CPTLV2461CP
−40°C to 125°C
2000 µVTLV2460IDTLV2461ID
TLV2460IDBVTLV2461IDBV
VAOIVAPI
TLV2460IPTLV2461IP
−40°C to 125°C1500 µV
TLV2460AIDTLV2461AID
——
——
TLV2460AIPTLV2461AIP
† This package is available taped and reeled. To order this packaging option, add an R suffix to the part number (e.g., TLV2460CDR).‡ Chip forms are tested at TA = 25°C only.
TLV2460M/AM/Q/AQ and TLV2461M/AM/Q/AQ AVAILABLE OPTIONS
PACKAGED DEVICES
TAVIOmaxAT 25°C
SMALLOUTLINE†
(D)
SMALLOUTLINE†
(PW)
CERAMIC DIP(JG)
CERAMICFLATPACK
(U)
CHIP CARRIER(FK)
−40°C to 125°C
2000 µVTLV2460QDTLV2461QD
TLV2460QPWTLV2461QPW
——
——
——
−40°C to 125°C1500 µV
TLV2460AQDTLV2461AQD
TLV2460AQPWTLV2461AQPW
——
——
——
−55°C to 125°C2000 µV
——
——
TLV2460MJGTLV2461MJG
TLV2460MUTLV2461MU
TLV2460MFKTLV2461MFK
−55°C to 125°C1500 µV
——
——
TLV2460AMJGTLV2461AMJG
TLV2460AMUTLV2461AMU
TLV2460AMFKTLV2461AMFK
† This package is available taped and reeled. To order this packaging option, add an R suffix to the part number (e.g., TLV2460QDR).
TLV2462C/I/AI and TLV2463C/I/AI AVAILABLE OPTIONS
PACKAGED DEVICES
TAVIOmaxAT 25°C
SMALL OUTLINE†
(D)
MSOP(DGK) SYMBOL
MSOP†
(DGS) SYMBOLPLASTIC DIP
(N)PLASTIC DIP
(P)
0°C to 70°C 2000 µVTLV2462CDTLV2463CD
TLV2462CDGK—
xxTIAAI —TLV2463CDGS
—xxTIAAK
—TLV2463CN
TLV2462CP—
−40°C to2000 µV
TLV2462IDTLV2463ID
TLV2462IDGK—
xxTIAAJ —TLV2463IDGS
—xxTIAAL
—TLV2463IN
TLV2462IP—−40 C to
125°C1500 µV
TLV2462AIDTLV2463AID
——
——
——
——
—TLV2463AIN
TLV2462AIP—
† This package is available taped and reeled. To order this packaging option, add an R suffix to the part number (e.g., TLV2462CDR).‡ Chip forms are tested at TA = 25°C only.
Device TLV2465A is Obsolete
SLOS220J − JULY 1998 − REVISED FEBRUARY 2004
3WWW.TI.COM
TLV2462M/AM/Q/AQ and TLV2463M/AM/Q/AQ AVAILABLE OPTIONS
PACKAGED DEVICES
TAVIOmaxAT 25°C
SMALLOUTLINE†
(D)
SMALLOUTLINE†
(PW)
CERAMIC DIP(JG)
CERAMICDIP(J)
CERAMICFLATPACK
(U)
CHIP CAR-RIER(FK)
−40°C to 125°C
2000 µVTLV2462QDTLV2463QD
TLV2462QPWTLV2463QPW
——
——
——
——
−40°C to 125°C1500 µV
TLV2462AQDTLV2463AQD
TLV2462AQPWTLV2463AQPW
——
——
——
——
−55°C to 125°C2000 µV
——
——
TLV2462MJG—
—TLV2463MJ
TLV2462MU TLV2462MFKTLV2463MFK
−55°C to 125°C1500 µV
——
——
TLV2462AMJG—
—TLV2463AMJ
TLV2462AMU TLV2462AMFKTLV2463AMFK
† This package is available taped and reeled. To order this packaging option, add an R suffix to the part number (e.g., TLV2462QDR).
TLV2464C/I/AI and TLV2465C/I/AI AVAILABLE OPTIONS
VIOmaxPACKAGED DEVICES
TAVIOmaxAT 25°C SMALL OUTLINE
(D)PLASTIC DIP
(N)TSSOP
(PW)
0°C to 70°C 2000 µVTLV2464CDTLV2465CD
TLV2464CNTLV2465CN
TLV2464CPWTLV2465CPW
−40°C to 125°C
2000 µVTLV2464IDTLV2465ID
TLV2464INTLV2465IN
TLV2464IPWTLV2465IPW
−40°C to 125°C1500 µV
TLV2464AIDTLV2465AID
TLV2464AINTLV2465AIN
TLV2464AIPWTLV2465AIPW
† This package is available taped and reeled. To order this packaging option, add an R suffix to the partnumber(e.g., TLV2464CDR).
‡ Chip forms are tested at TA = 25°C only.
TLV2464M/AM/Q/AQ and TLV2465M/AM/Q/AQ AVAILABLE OPTIONS
PACKAGED DEVICES
TAVIOmaxAT 25°C
SMALLOUTLINE†
(D)
SMALLOUTLINE†
(PW)
CERAMIC DIP(J)
CHIP CARRIER(FK)
-40°C to 125°C
2000 µVTLV2464QDTLV2465QD
TLV2464QPWTLV2465QPW
——
——
-40°C to 125°C1500 µV
TLV2464AQDTLV2465AQD
TLV2464AQPWTLV2465AQPW
——
——
−55°C to 125°C2000 µV
——
——
TLV2464MJTLV2465MJ
TLV2464MFKTLV2465MFK
−55°C to 125°C1500 µV
——
——
TLV2464AMJTLV2465AMJ
TLV2464AMFKTLV2465AMFK
† This package is available taped and reeled. To order this packaging option, add an R suffix to the part number(e.g., TLV2464QDR).
Device TLV2465A is Obsolete
SLOS220J − JULY 1998 − REVISED FEBRUARY 2004
4 WWW.TI.COM
TLV246x PACKAGE PINOUTS (1)
1
2
3
4
5
10
9
8
7
6
1OUT1IN−1IN+GND
1SHDN
VDD+2OUT2IN−2IN+2SHDN
3
2
4
5
(TOP VIEW)
1OUT
GND
IN+
VDD+
IN−
TLV2461DBV PACKAGE
3
2
4
6
(TOP VIEW)
1OUT
GND
IN+
VDD+
IN−
TLV2460DBV PACKAGE
5 SHDN
TLV2463DGS PACKAGE
(TOP VIEW)
NC − No internal connection(1) SOT−23 may or may not be indicated
1
2
3
4
5
6
7
14
13
12
11
10
9
8
1OUT1IN−1IN+GND
NC1SHDN
NC
VDD+2OUT2IN−2IN+NC2SHDNNC
(TOP VIEW)
TLV2463D, N, J, OR PW PACKAGE
1
2
3
4
5
6
7
14
13
12
11
10
9
8
1OUT1IN−1IN+
VDD+2IN+2IN−
2OUT
4OUT4IN−4IN+GND3IN+3IN−3OUT
(TOP VIEW)
TLV2464D, N, PWP, J, OR PW PACKAGE
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
1OUT1IN−1IN+
VDD+2IN+2IN−
2OUT1/2SHDN
4OUT4IN−4IN+GND3IN+3IN−3OUT3/4SHDN
(TOP VIEW)
TLV2465D, N, PWP, J, OR PW PACKAGE
1
2
3
4
8
7
6
5
1OUT1IN−1IN+GND
VDD+2OUT2IN−2IN+
TLV2462D, DGK, P, JG, OR PW PACKAGE
(TOP VIEW)
1
2
3
4
8
7
6
5
NCIN−IN+
GND
SHDNVDD+OUTNC
TLV2460D, P, JG, OR PW PACKAGE
(TOP VIEW)
1
2
3
4
8
7
6
5
NCIN−IN+
GND
NCVDD+OUTNC
TLV2461D, P, JG, OR PW PACKAGE
(TOP VIEW)
TYPICAL PIN 1 INDICATORS
Printed orMolded Dot Bevel Edges
Pin 1
Molded ”U” Shape
Pin 1
StripePin 1 Pin 1
Device TLV2465A is Obsolete
SLOS220J − JULY 1998 − REVISED FEBRUARY 2004
5WWW.TI.COM
TLV246x PACKAGE PINOUTS (continued) (1)
1
2
3
4
5
10
9
8
7
6
NCNCIN−IN+
GND
NCSHDNVDDOUTPUTNC
TLV2460U PACKAGE(TOP VIEW)
1
2
3
4
5
10
9
8
7
6
NC1OUT
1IN−1IN+GND
NCVDD+2OUT2IN−2IN+
TLV2462U PACKAGE(TOP VIEW)
1
2
3
4
5
10
9
8
7
6
NCNCIN−IN+
GND
NCNCVDDOUTPUTNC
TLV2461U PACKAGE(TOP VIEW)
192013 2
17
18
16
15
14
1312119 10
5
4
6
7
8
NC
VDD
NC
OUT
NC
NC
IN−
NC
IN+
NC
NC
NC
NC
SH
DN
NC
GN
D
NC
NC
NC
NC
TLV2460FK PACKAGE(TOP VIEW)
192013 2
17
18
16
15
14
1312119 10
5
4
6
7
8
NC
VDD
NC
OUT
NC
NC
IN−
NC
IN+
NC
NC
NC
NC
NC
NC
GN
D
NC
NC
NC
NC
TLV2461FK PACKAGE(TOP VIEW)
192013 2
17
18
16
15
14
1312119 10
5
4
6
7
8
2IN−
NC
2IN+
NC
NC
1IN+
NC
GND
NC
NC
1IN
−
1OU
T
NC
V 2OU
T
NC
NC
NC
NC
NC
TLV2462FK PACKAGE(TOP VIEW)
DD
192013 2
17
18
16
15
14
1312119 10
5
4
6
7
8
2IN−
NC
2IN+
NC
NC
1IN+
NC
GND
NC
NC
1IN
−
1OU
T
NC
V 2OU
T
NC
NC
NC
2SH
DN
1SH
DN
TLV2463FK PACKAGE(TOP VIEW)
DD
TLV2464FK PACKAGE(TOP VIEW)
192013 2
17
18
16
15
14
1312119 10
5
4
6
7
8
4IN+
NC
GND
NC
3IN+
1IN+
NC
VDD+
NC
2IN+
1IN
−
1OU
T
NC
4OU
T
4IN
−
2OU
T
NC
3OU
T
3IN
−
2IN
−
192013 2
17
18
16
15
14
1312119 10
5
4
6
7
8
4IN+
GND
NC
3IN+
3IN−
1IN+
VDD+
NC
2IN+
2IN−
1IN
−
1OU
T
NC
4OU
T
4IN
−
1/2S
HD
N
NC
3/4S
HD
N
3OU
T
2OU
TTLV2465
FK PACKAGE(TOP VIEW)
NC − No internal connection(1) SOT−23 may or may not be indicated
Device TLV2465A is Obsolete
SLOS220J − JULY 1998 − REVISED FEBRUARY 2004
6 WWW.TI.COM
absolute maximum ratings over operating free-air temperature range (unless otherwise noted) †
Supply voltage, VDD (see Note 1) 6 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Differential input voltage, VID − 0.2 V to VDD + 0.2 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Input current, II (any input) ± 200 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Output current, IO ± 175 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Total input current, II (into VDD+) 175 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Total output current, IO (out of GND) 175 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Continuous total power dissipation See Dissipation Rating Table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Operating free-air temperature range, TA: C suffix 0°C to 70°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
I and Q suffix −40°C to 125°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . M suffix −55°C to 125°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Maximum junction temperature, TJ 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Storage temperature range, Tstg −65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds 260°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, andfunctional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is notimplied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: All voltage values, except differential voltages, are with respect to GND.
DISSIPATION RATING TABLE FOR C and I SUFFIX
PACKAGEθJC θJA TA ≤ 25°C TA < 125°C
PACKAGEθJC
(°C/W)
θJA(°C/W)
TA ≤ 25 CPOWER RATING
TA < 125 CPOWER RATING
D (8) 38.3 176 710 mW 142 mW
D (14) 26.9 122.6 1022 mW 204.4 mW
D (16) 25.7 114.7 1090 mW 218 mW
DBV (5) 55 324.1 385 mW 77.1 mW
DBV (6) 55 294.3 425 mW 84.9 mW
DGK 54.2 259.9 481 mW 96.2 mW
DGS 54.1 257.7 485 mW 97 mW
N (14, 16) 32 78 1600 mW 320.5 mW
P (8) 41 104 1200 mW 240.4 mW
PW (14) 29.3 173.6 720 mW 144 mW
PW (16) 28.7 161.4 774 mW 154.9 mW
NOTE: Thermal resistances are not production tested and are for informationalpurposes only.
DISSIPATION RATING TABLE FOR Q and M SUFFIX
PACKAGETA ≤ 25°C DERATING FACTOR
‡TA = 70°C TA = 85°C TA = 125°C
PACKAGETA ≤ 25 C
POWER RATINGDERATING FACTORABOVE TA = 25°C‡
TA = 70 CPOWER RATING
TA = 85 CPOWER RATING
TA = 125 CPOWER RATING
FK 1375 mW 11.0 mW/°C 880 mW 715 mW 275 mW
JG 1050 mW 8.4 mW/°C 672 mW 546 mW 210 mW
U 675 mW 5.4 mW/°C 432 mW 350 mW 135 mW‡ This is the inverse of the traditional junction-to-ambient thermal resistance (RΘJA). Thermal resistances are not production tested and are for
informational purposes only.
Device TLV2465A is Obsolete
SLOS220J − JULY 1998 − REVISED FEBRUARY 2004
7WWW.TI.COM
recommended operating conditions
MIN MAX UNIT
Supply voltage, VDDSingle supply 2.7 6
VSupply voltage, VDD Split supply ±1.35 ±3V
Common-mode input voltage range, VICR 0 VDD V
C-suffix 0 70
Operating free-air temperature, TA I-suffix and Q-suffix −40 125 °COperating free-air temperature, TAM-suffix −55 125
C
Shutdown on/off voltage level‡VIH 2
VShutdown on/off voltage level‡VIL 0.7
V
‡ Relative to voltage on the GND terminal of the device.
electrical characteristics at specified free-air temperature, V DD = 3 V (unless otherwise noted)
PARAMETER TEST CONDITIONS TA† MIN TYP MAX UNIT
V = 3 V,25°C 500 2000
VIO Input offset voltageVDD = 3 V,VIC = 1.5 V,
Full range 2200VVIO Input offset voltage
DDVIC = 1.5 V, VO = 1.5 V, TLV246xA
25°C 500 1500µV
VO = 1.5 V,RS = 50 Ω
TLV246xAFull range 1700
αVIO Temperature coefficient of input offset voltageRS = 50 Ω
2 µV/°C
25°C 2.8 7
IIO Input offset current VDD = 3 V, TLV246xC Full range 20 nAIIO Input offset current VDD = 3 V,VIC = 1.5 V, TLV246xI/Q/M Full range 75
nA
VIC = 1.5 V, VO = 1.5 V,R = 50
25°C 4.4 14
IIB Input bias current
VO = 1.5 V,RS = 50 Ω TLV246xC Full range 25 nAIIB Input bias current
TLV246xI/Q/M Full range 75
nA
IOH = −2.5 mA25°C 2.9
VOH High-level output voltage
IOH = −2.5 mAFull range 2.8
VVOH High-level output voltage
IOH = −10 mA25°C 2.7
V
IOH = −10 mAFull range 2.5
VIC = 1.5 V, IOL = 2.5 mA25°C 0.1
VOL Low-level output voltage
VIC = 1.5 V, IOL = 2.5 mAFull range 0.2
VVOL Low-level output voltage
VIC = 1.5 V, IOL = 10 mA25°C 0.3
V
VIC = 1.5 V, IOL = 10 mAFull range 0.5
Sourcing25°C 50
IOS Short-circuit output current
SourcingFull range 20
mAIOS Short-circuit output current
Sinking25°C 40
mA
SinkingFull range 20
IO Output current Measured 1 V from rail 25°C ±40 mA
AVDLarge-signal differential voltage
RL = 10 kΩ VO(PP) = 1 V25°C 90 105
dBAVDLarge-signal differential voltageamplification RL = 10 kΩ, VO(PP) = 1 V
Full range 89dB
ri(d) Differential input resistance 25°C 109 Ω† Full range is 0°C to 70°C for the C suffix, −40°C to 125°C for the I and Q suffixes, and −55°C to 125°C for the M suffix.
Device TLV2465A is Obsolete
SLOS220J − JULY 1998 − REVISED FEBRUARY 2004
8 WWW.TI.COM
electrical characteristics at specified free-air temperature, V DD = 3 V (unless otherwise noted)(continued)
PARAMETER TEST CONDITIONS TA† MIN TYP MAX UNIT
ci(c)Common-mode inputcapacitance
f = 10 kHz 25°C 7 pF
zo Closed-loop output impedance f = 100 kHz, AV = 10 25°C 33 Ω
VICR = 0 to 3 V,25°C 66 80
CMRR Common-mode rejection ratioVICR = 0 to 3 V,RS = 50 Ω TLV246xC Full range 64 dBCMRR Common-mode rejection ratio RS = 50 Ω
TLV246xI/Q/M Full range 60
dB
VDD = 2.7 V to 6 V, VIC = VDD/2, 25°C 80 85
kSVRSupply voltage rejection ratio
VDD = 2.7 V to 6 V,No load
VIC = VDD/2,
Full range 75dBkSVR
Supply voltage rejection ratio(∆VDD /∆VIO) VDD = 3 V to 5 V, VIC = VDD/2, 25°C 85 95
dB( VDD / VIO) VDD = 3 V to 5 V,No load
VIC = VDD/2,
Full range 80
IDD Supply current (per channels) VO = 1.5 V, No load25°C 0.5 0.575
mAIDD Supply current (per channels) VO = 1.5 V, No loadFull range 0.9
mA
IDD(SHDN)Supply current in shutdown SHDN < 0.7 V, 25°C 0.3
AIDD(SHDN)Supply current in shutdown(TLV2460, TLV2463, TLV2465)
SHDN < 0.7 V,Per channel in shutdown Full range 2.5
µA
† Full range is 0°C to 70°C for the C suffix, −40°C to 125°C for the I and Q suffixes, and −55°C to 125°C for the M suffix.
operating characteristics at specified free-air temperature, V DD = 3 V (unless otherwise noted)
PARAMETER TEST CONDITIONS TA† MIN TYP MAX UNIT
VO(PP) = 0.8 V, CL = 160 pF,25°C 0.9 1.6
SR Slew rate at unity gainVO(PP) = 0.8 V,RL = 10 kΩ
CL = 160 pF,Full
range0.8
V/µs
Vn Equivalent input noise voltagef = 100 Hz 25°C 16
nV/√HzVn Equivalent input noise voltagef = 1 kHz 25°C 11
nV/√Hz
In Equivalent input noise current f = 1 kHz 25°C 0.13 pA/√Hz
Total harmonic distortion plus VO(PP) = 2 V, AV = 1 0.006%
THD + NTotal harmonic distortion plusnoise
VO(PP) = 2 V, RL = 10 kΩ, f = 1 kHz
AV = 10 25°C 0.02%THD + N noise RL = 10 kΩ, f = 1 kHzAV = 100
25 C
0.08%
Both channels 7.6
t(on) Amplifier turnon time AV = 1, RL = 10 kΩ Channel 1 only,Channel 2 on
25°C7.65
µs
Both channels 333
t(off) Amplifier turnoff time AV = 1, RL = 10 kΩChannel 1 only,Channel 2 on 25°C
328nst(off) Amplifier turnoff time AV = 1, RL = 10 kΩ
Channel 2 only,Channel 1 on
25 C
329
ns
Gain-bandwidth product f = 10 kHz, CL = 160 pFRL = 10 kΩ, 25°C 5.2 MHz
V(STEP)PP = 2 V,AV = −1, CL = 10 pF,
0.1% 1.47
ts Settling time
(STEP)PPAV = −1, CL = 10 pF,RL = 10 kΩ 0.01%
25°C1.78
sts Settling timeV(STEP)PP = 2 V,AV = −1, CL = 56 pF,
0.1%25°C
1.77µs
(STEP)PPAV = −1, CL = 56 pF,RL = 10 kΩ 0.01% 1.98
φm Phase margin at unity gainRL = 10 kΩ, CL = 160 pF
25°C 44°
Gain marginRL = 10 kΩ, CL = 160 pF
25°C 7 dB† Full range is 0°C to 70°C for the C suffix, −40°C to 125°C for the I and Q suffixes, and −55°C to 125°C for the M suffix.
Device TLV2465A is Obsolete
SLOS220J − JULY 1998 − REVISED FEBRUARY 2004
9WWW.TI.COM
electrical characteristics at specified free-air temperature, V DD = 5 V (unless otherwise noted)
PARAMETER TEST CONDITIONS TA† MIN TYP MAX UNIT
25°C 500 2000
VIO Input offset voltageVDD = 5 V, Full range 2200
VVIO Input offset voltageVDD = 5 V,VIC = 2.5,
TLV246xA25°C 500 1500
µVVIC = 2.5, VO = 2.5 V,RS = 50 Ω
TLV246xAFull range 1700
VIOTemperature coefficient of input off-
ORS = 50 Ω
25°C 2 V/°CαVIOTemperature coefficient of input off-set voltage 25°C 2 µV/°C
25°C 0.3 7
IIO Input offset current VDD = 5 V, TLV246xC Full range 15 nAIIO Input offset current VDD = 5 V,VIC = 2.5 V, TLV246xI/Q/M Full range 60
nA
VIC = 2.5 V, VO = 2.5 V,R = 50
25°C 1.3 14
IIB Input bias current
VO = 2.5 V,RS = 50 Ω TLV246xC Full range 30 nAIIB Input bias current
TLV246xI/Q/M Full range 60
nA
IOH = −2.5 mA25°C 4.9
VOH High-level output voltage
IOH = −2.5 mAFull range 4.8
VVOH High-level output voltage
IOH = −10 mA25°C 4.8
V
IOH = −10 mAFull range 4.7
VIC = 2.5 V, IOL = 2.5 mA25°C 0.1
VOL Low-level output voltage
VIC = 2.5 V, IOL = 2.5 mAFull range 0.2
VVOL Low-level output voltage
VIC = 2.5 V, IOL = 10 mA25°C 0.2
V
VIC = 2.5 V, IOL = 10 mAFull range 0.3
Sourcing25°C 145
IOS Short-circuit output current
SourcingFull range 60
mAIOS Short-circuit output current
Sinking25°C 100
mA
SinkingFull range 60
IO Output current Measured at 1 V from rail 25°C ±80 mA
AVDLarge-signal differential voltage VIC = 2.5 V, RL = 10 kΩ, 25°C 92 109
dBAVDLarge-signal differential voltage amplification
VIC = 2.5 V,VO = 1 V to 4 V
RL = 10 kΩ,Full range 90
dB
ri(d) Differential input resistance 25°C 109 Ω
ci(c) Common-mode input capacitance f = 10 kHz 25°C 7 pF
zo Closed-loop output impedance f = 100 kHz, AV = 10 25°C 29 Ω
VICR = 0 V to 5 V,25°C 71 85
CMRR Common-mode rejection ratioVICR = 0 V to 5 V,RS = 50 Ω TLV246xC Full range 69 dBCMRR Common-mode rejection ratio RS = 50 Ω
TLV246xI/Q/M Full range 60
dB
VDD = 2.7 V to 6 V, VIC = VDD/2, 25°C 80 85dB
kSVRSupply voltage rejection ratio
VDD = 2.7 V to 6 V,No load
VIC = VDD/2,
Full range 75dB
kSVRSupply voltage rejection ratio(∆VDD /∆VIO) VDD = 3 V to 5 V, VIC = VDD/2, 25°C 85 95
dB( VDD / VIO) VDD = 3 V to 5 V,
No loadVIC = VDD/2,
Full range 80dB
IDD Supply current (per channel) VO = 2.5 V, No load,25°C 0.55 0.65
mAIDD Supply current (per channel) VO = 2.5 V, No load,Full range 1
mA
IDD(SHDN)Supply current in shutdown SHDN < 0.7 V, Per channels in 25°C 1
AIDD(SHDN)Supply current in shutdown(TLV2460, TLV2463, TLV2465)
SHDN < 0.7 V, Per channels inshutdown Full range 3
µA
† Full range is 0°C to 70°C for the C suffix, −40°C to 125°C for the I and Q suffixes, and −55°C to 125°C for the M suffix.
Device TLV2465A is Obsolete
SLOS220J − JULY 1998 − REVISED FEBRUARY 2004
10 WWW.TI.COM
operating characteristics at specified free-air temperature, V DD = 5 V (unless otherwise noted)
PARAMETER TEST CONDITIONS TA† MIN TYP MAX UNIT
VO(PP) = 2 V, CL = 160 pF,25°C 0.9 1.6
SR Slew rate at unity gainVO(PP) = 2 V,RL = 10 kΩ
CL = 160 pF,Full
range0.8
V/µs
Vn Equivalent input noise voltagef = 100 Hz 25°C 14
nV/√HzVn Equivalent input noise voltagef = 1 kHz 25°C 11
nV/√Hz
In Equivalent input noise current f = 100 Hz 25°C 0.13 pA/√Hz
VO(PP) = 4 V, AV = 1 0.004%
THD + N Total harmonic distortion plus noiseVO(PP) = 4 V,RL = 10 kΩ,f = 10 kHz
AV = 10 25°C 0.01%THD + N Total harmonic distortion plus noise RL = 10 kΩ,f = 10 kHz AV = 100
25 C
0.04%
Both channels 7.6
t(on) Amplifier turnon time AV = 1, RL = 10 kΩChannel 1 only,Channel 2 on 25°C
7.65µst(on) Amplifier turnon time AV = 1, RL = 10 kΩ
Channel 2 only,Channel 1 on
25 C
7.25
µs
Both channels 333
t(off) Amplifier turnoff time AV = 1, RL = 10 kΩChannel 1 only,Channel 2 on 25°C
328nst(off) Amplifier turnoff time AV = 1, RL = 10 kΩ
Channel 2 only,Channel 1 on
25 C
329
ns
Gain-bandwidth product f = 10 kHz, CL = 160 pF
RL = 10 kΩ, 25°C 6.4 MHz
V(STEP)PP = 2 V,AV = −1,
0.1% 1.53
ts Settling time
AV = −1,CL = 10 pF,RL = 10 kΩ 0.01%
25°C1.83
sts Settling timeV(STEP)PP = 2 V,AV = −1,
0.1%25°C
3.13µs
AV = −1,CL = 56 pF,RL = 10 kΩ 0.01% 3.33
φm Phase margin at unity gainRL = 10 kΩ, CL = 160 pF
25°C 45°
Gain marginRL = 10 kΩ, CL = 160 pF
25°C 7 dB
† Full range is 0°C to 70°C for the C suffix, −40°C to 125°C for the I and Q suffixes, and −55°C to 125°C for the M suffix.
Device TLV2465A is Obsolete
SLOS220J − JULY 1998 − REVISED FEBRUARY 2004
11WWW.TI.COM
TYPICAL CHARACTERISTICS
Table of GraphsFIGURE
VIO Input offset voltage vs Common-mode input voltage 1, 2
IIB Input bias current vs Free-air temperature 3, 4
IIO Input offset current vs Free-air temperature 3, 4
VOH High-level output voltage vs High-level output current 5, 6
VOL Low-level output voltage vs Low-level output current 7, 8
VO(PP) Peak-to-peak output voltage vs Frequency 9, 10
Open-loop gain vs Frequency 11, 12
Phase vs Frequency 11, 12
AVD Differential voltage amplification vs Load resistance 13
Capacitive load vs Load resistance 14
Zo Output impedance vs Frequency 15, 16
CMRR Common-mode rejection ratio vs Frequency 17
kSVR Supply-voltage rejection ratio vs Frequency 18, 19
IDD Supply currentvs Supply voltage 20
IDD Supply currentvs Free-air temperature 21
Amplifier turnon characteristics 22
Amplifier turnoff characteristics 23
Supply current turnon 24
Supply current turnoff 25
Shutdown supply current vs Free-air temperature 26
SR Slew rate vs Supply voltage 27
Vn Equivalent input noise voltagevs Frequency 28, 29
Vn Equivalent input noise voltagevs Common-mode input voltage 30, 31
THD Total harmonic distortion vs Frequency 32, 33
THD+N Total harmonic distortion plus noise vs Peak-to-peak signal amplitude 34, 35
vs Frequency 11, 12
φm Phase margin vs Load capacitance 36φm Phase margin
vs Free-air temperature 37
Gain bandwidth productvs Supply voltage 38
Gain bandwidth productvs Free-air temperature 39
Large signal follower 40, 41
Small signal follower 42, 43
Inverting large signal 44, 45
Inverting small signal 46, 47
Device TLV2465A is Obsolete
SLOS220J − JULY 1998 − REVISED FEBRUARY 2004
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TYPICAL CHARACTERISTICS
Figure 1
−0.2
−0.6
−1
0
−0.4
−0.8
1
VICR − Common-Mode Input Voltage − V
INPUT OFFSET VOLTAGEvs
COMMON-MODE INPUT VOLTAGE
10.5 1.5 30 2 2.5
VDD = 3 VTA = 25°C
− In
put O
ffset
Vol
tage
− m
VV
IO
0.8
0.4
0.6
0.2
Figure 2
−0.2
−0.6
−1
0
−0.4
−0.8
1
VICR − Common-Mode Input Voltage − V
INPUT OFFSET VOLTAGEvs
COMMON-MODE INPUT VOLTAGE
21 3 50 4
VDD = 5 VTA = 25°C
− In
put O
ffset
Vol
tage
− m
VV I
O
0.8
0.4
0.6
0.2
Figure 3
TA − Free-Air Temperature − ° C
INPUT BIAS AND INPUT OFFSET CURRENTvs
FREE-AIR TEMPERATURE
2.5
1.5
0.5
−0.5−35 5
3
2
1
0
−15 25 125
4.5
−55 45 65
3.5
4
85 105
VDD = 3 VVI = 1.5 V
I IB
and
IIO
− In
put B
ias
and
Inpu
t Offs
et C
urre
nt −
nA
5
IIB
IIO
Figure 4
TA − Free-Air Temperature − ° C
INPUT BIAS AND INPUT OFFSET CURRENTvs
FREE-AIR TEMPERATURE
−1−35 5
3
2
1
0
−15 25 125−55 45 65
4
85 105I IB
and
IIO
− In
put B
ias
and
Inpu
t Offs
et C
urre
nt −
nA
5
IIB
IIO
VDD = 5 VVI = 2.5 V
6
Device TLV2465A is Obsolete
SLOS220J − JULY 1998 − REVISED FEBRUARY 2004
13WWW.TI.COM
TYPICAL CHARACTERISTICS
Figure 5
TA = 125°CTA = 85°C
HIGH-LEVEL OUTPUT VOLTAGEvs
HIGH-LEVEL OUTPUT CURRENT
0 10 20 30 60
IOH − High-Level Output Current − mA
5040 70 80
2.5
1
0
2
1.5
0.5
3
VO
H−
Hig
h-Le
vel O
utpu
t Vol
tage
− V
VDD = 3 VDC
TA = −55°C
TA = 25°C
TA = −40°C
Figure 6
TA = 125°CTA = 85°C
HIGH-LEVEL OUTPUT VOLTAGEvs
HIGH-LEVEL OUTPUT CURRENT
0 20 40 60 120
IOH − High-Level Output Current − mA
10080 140 200
2.5
1
0
2
1.5
0.5
3
VO
H−
Hig
h-Le
vel O
utpu
t Vol
tage
− V
VDD = 5 VDC
TA = −55°C4
5
4.5
3.5
160 180
TA = 25°C
TA = −40°C
Figure 7
LOW-LEVEL OUTPUT VOLTAGEvs
LOW-LEVEL OUTPUT CURRENT
0 10 20 30 60
IOL − Low-Level Output Current − mA
5040 70
2.5
1
0
2
1.5
0.5
3VDD = 3 VDC
TA = −55°C
OL
V−
Low
-Lev
el O
utpu
t Vol
tage
− V
TA = 85°CTA = 125°C
TA = 25°C
TA = −40°C
Figure 8
LOW-LEVEL OUTPUT VOLTAGEvs
LOW-LEVEL OUTPUT CURRENT
0 20 40 60 120
IOL − Low-Level Output Current − mA
10080 140
2.5
1
0
2
1.5
0.5
3
VDD = 5 VDC
4.5
4
3.5
160
OL
V−
Low
-Lev
el O
utpu
t Vol
tage
− V
TA = −55°C
TA = 85°CTA = 125°C
TA = 25°C
TA = −40°C
Device TLV2465A is Obsolete
SLOS220J − JULY 1998 − REVISED FEBRUARY 2004
14 WWW.TI.COM
TYPICAL CHARACTERISTICS
Figure 9
PEAK-TO-PEAK OUTPUT VOLTAGEvs
FREQUENCY
10k 100k 10M
f − Frequency − Hz
1M
3
2
1
0
2.5
1.5
0.5
VO
(PP
)−
Pea
k-to
-Pea
k O
utpu
t Vol
tage
− V
VDD = 3 VAV = −10THD = 1%RL = 10 kΩ
Figure 10
PEAK-TO-PEAK OUTPUT VOLTAGEvs
FREQUENCY
10k 100k 10M
f − Frequency − Hz
1M
3
2
1
0
2.5
1.5
0.5VO
(PP
)−
Pea
k-to
-Pea
k O
utpu
t Vol
tage
− V
VDD = 5 VAV = −10THD = 1%RL = 10 kΩ
3.5
5
4
5.5
4.5
OPEN-LOOP GAIN AND PHASEvs
FREQUENCY
40
20
0
−20100 10k
f − Frequency − Hz
50
30
10
−10
1k 100k 1M
60
80
10
70
90
−140°
−200°
−120°
−100°
−80°
100
−60°
−40°
−20°
0°
20°
40°
−180°
−160°
Ope
n-Lo
op G
ain
− dB
Pha
se
10M
AVD
Phase
VDD = ±1.5 VRL = 10 kΩCL = 0 TA = 25°C
Figure 11
Device TLV2465A is Obsolete
SLOS220J − JULY 1998 − REVISED FEBRUARY 2004
15WWW.TI.COM
TYPICAL CHARACTERISTICS
OPEN-LOOP GAIN AND PHASEvs
FREQUENCY
40
20
0
−20100 10k
f − Frequency − Hz
50
30
10
−10
1k 100k 1M
60
80
10
70
90
−140°
−200°
−120°
−100°
−80°
100
−60°
−40°
−20°
0°
20°
40°
−180°
−160°
Ope
n-Lo
op G
ain
− dB
Pha
se
10M
AVD
Phase
VDD = ±2.5 VRL = 10 kΩCL = 0TA = 25°C
Figure 12
Figure 13
RL − Load Resistance − Ω
DIFFERENTIAL VOLTAGE AMPLIFICATIONvs
LOAD RESISTANCE
120
80
40
0
140
100
60
20
1k 10k 1M
180
100 100k
160TA = 25°C
− D
iffer
entia
l Vol
tage
Am
plifi
catio
n −
V/m
VA
VD
VDD = ±2.5 V
VDD = ±1.5 V
Figure 14
CL
− C
apac
itive
Loa
d −
pF
CAPACITIVE LOADvs
LOAD RESISTANCE
10 100 10k
RL − Load Resistance − Ω1k
10000
100
1000
Phase Margin > 30°
VDD = 5 VPhase Margin = 30°TA = 25°C
Phase Margin < 30°
Device TLV2465A is Obsolete
SLOS220J − JULY 1998 − REVISED FEBRUARY 2004
16 WWW.TI.COM
TYPICAL CHARACTERISTICS
Figure 15
OUTPUT IMPEDANCEvs
FREQUENCY
f − Frequency − Hz
1
0.1
0.01
10
1000
AV = 100
100 1k 10k 10M1M100k
− O
utpu
t Im
peda
nce
−Z o
Ω
100
VDD = ±1.5 VTA = 25°C
AV = 10
AV = 1
Figure 16
OUTPUT IMPEDANCEvs
FREQUENCY
f − Frequency − Hz
1
0.1
0.01
10
1000
AV = 100
100 1k 10k 10M1M100k
− O
utpu
t Im
peda
nce
−Z o
Ω
100
VDD = ±2.5 VTA = 25°C
AV = 10
AV = 1
CM
RR
− C
omm
on-M
ode
Rej
ectio
n R
atio
− d
B
COMMON-MODE REJECTION RATIOvs
FREQUENCY
f − Frequency − Hz
10 1k 10k 10M1M100k
90
80
70
60
85
75
65
VDD = 5 VVIC = 2.5 V
100
VDD = 3 VVIC = 1.5 V
Figure 17
Device TLV2465A is Obsolete
SLOS220J − JULY 1998 − REVISED FEBRUARY 2004
17WWW.TI.COM
TYPICAL CHARACTERISTICS
Figure 18
SUPPLY-VOLTAGE REJECTION RATIOvs
FREQUENCY
f − Frequency − Hz
10 1k 10k 10M1M100k
110
80
60
40
90
70
50
100
100
VDD = ±1.5 VTA = 25°C
kS
VR
− S
uppl
y Vo
ltage
Rej
ectio
n R
atio
− d
B
−kSVR
+kSVR
+kSVR
−kSVR
Figure 19
SUPPLY-VOLTAGE REJECTION RATIOvs
FREQUENCY
f − Frequency − Hz
10 1k 10k 10M1M100k
80
60
40
90
70
50
100
VDD = ±2.5 VTA = 25°C
kS
VR
− S
uppl
y Vo
ltage
Rej
ectio
n R
atio
− d
B
−kSVR
+kSVR
+kSVR
−kSVR
Figure 20
VDD − Supply Voltage − V
SUPPLY CURRENTvs
SUPPLY VOLTAGE
0.7
0.5
0.30
0.103 4
0.8
0.6
0.40
0.20
3.5 4.5 62.5 5 5.5
IDD = 25°C
I DD
− S
uppl
y C
urre
nt −
mA
IDD = 85°C
IDD = −55°C
IDD = 125°C
IDD = −40°C
Figure 21
TA − Free-Air Temperature − ° C
SUPPLY CURRENTvs
FREE-AIR TEMPERATURE
0.60
0.50
0.40
0.30−35 5
0.65
0.55
0.45
0.35
−15 25 125
0.80
−55 45 65
0.70
0.75
VDD = 5 VVI = 2.5 V
85 105
I DD
− S
uppl
y C
urre
nt −
mA
VDD = 3 VVI = 1.5 V
Device TLV2465A is Obsolete
SLOS220J − JULY 1998 − REVISED FEBRUARY 2004
18 WWW.TI.COM
TYPICAL CHARACTERISTICS
Figure 22t − Time − µs
AMPLIFIER WITH A SHUTDOWN PULSETURNON CHARACTERISTICS
2
0
2
0−3 1
1
3
1
−1 3 9
5
−5
V
5 7
SD
− S
hutd
own
Volta
ge −
V
3
11
4
VDD = 5 VRL = 10 kΩAV = 1TA = 25°C
Shutdown Pin
Amplifier Output
Figure 23t − Time − µ s
AMPLIFIER WITH A SHUTDOWN PULSETURNOFF CHARACTERISTICS
2
0
2
0−3 1
1
3
1
−1 3
5
−5
V
5 7
SD
− S
hutd
own
Volta
ge −
V
3
4VDD = 5 VRL = 10 kΩAV = 1TA = 25°C
Shutdown Pin
Amplifier Output
VDD = 5 VVI = 2.5 VAV = 1TA = 25°C
0.4
−0.2
0.2
0
−0.4 −0.2 0 0.6
t − Time − µ s
0.40.2
SUPPLY CURRENT WITH A SHUTDOWN PULSETURNON CHARACTERISTICS
0.8
1
0.6
Supply Current
Shutdown Pin
I DD
− S
uppl
y C
urre
nt −
mA
4.5
5.5
2.5
3.5
0.5
1.5
−0.5
VS
D−
Shu
tdow
n Vo
ltage
− V
Figure 24
Device TLV2465A is Obsolete
SLOS220J − JULY 1998 − REVISED FEBRUARY 2004
19WWW.TI.COM
TYPICAL CHARACTERISTICS
VDD = 5 VVI = 2.5 VAV = 1TA = 25°C
0.4
−0.2
0.2
0
−0.4 −0.2 0 0.6
t − Time − µ s
0.40.2
TURNOFF SUPPLY CURRENTWITH A SHUTDOWN PULSE
0.8
1
0.6
Supply Current
Shutdown Pin
I DD
− S
uppl
y C
urre
nt −
mA
4.5
5.5
2.5
3.5
0.5
1.5
−0.5
VS
D−
Shu
tdow
n Vo
ltage
− V
Figure 25
Figure 26
TA − Free-Air Temperature − ° C
SHUTDOWN SUPPLY CURRENTvs
FREE-AIR TEMPERATURE
2.5
1.5
0.5
−0.5
−35 5
3
2
1
0
−15 25 125−55 45 65 85 105
VDD = 5 VVI = 2.5 V
−1
DD
IS
hutd
own
Sup
ply
Cur
rent
−
−A
µ
VDD = 3 VVI = 1.5 V
Figure 27
VDD − Supply Voltage − V
SLEW RATEvs
SUPPLY VOLTAGE
2.5 3 3.5 4 5.5 654.5
1.6
1.5
1.4
1.3
1.55
1.45
1.35
1.8
1.7
1.75
1.65
SR
− S
lew
Rat
e −
V/
µs
VO(PP) = 2 VCL = 160 pFAV = 1RL = 10 kΩTA = 25°C
SR+
SR−
Device TLV2465A is Obsolete
SLOS220J − JULY 1998 − REVISED FEBRUARY 2004
20 WWW.TI.COM
TYPICAL CHARACTERISTICS
Figure 28
EQUIVALENT INPUT NOISE VOLTAGEvs
FREQUENCY
100 1k 100k
f − Frequency − Hz
10k10
14
12
15
13
11
17
18
16
nV/
Hz
− E
quiv
alen
t Inp
ut N
oise
Vol
tage
−V n
VDD = 3 VAV = 10VI = 1.5 VTA = 25°C
Figure 29
EQUIVALENT INPUT NOISE VOLTAGEvs
FREQUENCY
100 1k 100k
f − Frequency − Hz
10k10
14
12
15
13
11
17
18
16
nV/
Hz
− E
quiv
alen
t Inp
ut N
oise
Vol
tage
−V n
VDD = 5 VAV = 10VI = 2.5 VTA = 25°C
Figure 30
VICR − Common-Mode Input Voltage − V
EQUIVALENT INPUT NOISE VOLTAGEvs
COMMON-MODE INPUT VOLTAGE
12
101
14
13
11
0.5 1.5 3
20
0 2 2.5
15
VDD = 3 VAV = 10f = 1 kHzTA = 25°C
nV/
Hz
− E
quiv
alen
t Inp
ut N
oise
Vol
tage
−V n
Figure 31
VICR − Common-Mode Input Voltage − V
EQUIVALENT INPUT NOISE VOLTAGEvs
COMMON-MODE INPUT VOLTAGE
12
102
14
13
11
1 3
20
0 4 5
15
VDD = 5 VAV = 10f = 1 kHzTA = 25°C
nV/
Hz
− E
quiv
alen
t Inp
ut N
oise
Vol
tage
−V
n
Device TLV2465A is Obsolete
SLOS220J − JULY 1998 − REVISED FEBRUARY 2004
21WWW.TI.COM
TYPICAL CHARACTERISTICS
Figure 32
TOTAL HARMONIC DISTORTIONvs
FREQUENCY
0.010
0.001100 10k
f − Frequency − Hz
1k 100k10
0.1
TH
D −
Tot
al H
arm
onic
Dis
tort
ion
− %
VDD = ±1.5 VVO(PP) = 2 VRL = 10 kΩ
AV = 1
AV = 10
AV = 100
0.5
Figure 33
TOTAL HARMONIC DISTORTIONvs
FREQUENCY
0.010
0.001100 10k
f − Frequency − Hz
1k 100k10
0.1
TH
D −
Tot
al H
arm
onic
Dis
tort
ion
− %
VDD = ±2.5 VVO(PP) = 4 VRL = 10 kΩ
AV = 1
AV = 10
AV = 100
1
Figure 34
TOTAL HARMONIC DISTORTION PLUS NOISEvs
PEAK-TO-PEAK SIGNAL AMPLITUDE
0.010
0.001
0.1
TH
D+N
− T
otal
Har
mon
ic D
isto
rtio
n +
Noi
se −
%
VDD = 3 VAV = 1TA = 25°C
1
RL = 10 kΩ
RL = 2 kΩ
RL = 250 Ω
RL = 100 kΩ
Peak-to-Peak Signal Amplitude − V
1 1.2 1.4 1.6 2.2 2.421.8 2.6 2.8 3 3.2
Figure 35
TOTAL HARMONIC DISTORTION PLUS NOISEvs
PEAK-TO-PEAK SIGNAL AMPLITUDE
0.010
0.001
0.1
TH
D+N
− T
otal
Har
mon
ic D
isto
rtio
n +
Noi
se −
%
VDD = 5 VAV = 1TA = 25°C
1
RL = 10 kΩ
RL = 250 Ω
RL = 100 kΩ
Peak-to-Peak Signal Amplitude − V
4 4.1 4.2 4.3 4.6 4.74.54.4 4.8 4.9 5
RL = 2 kΩ
Device TLV2465A is Obsolete
SLOS220J − JULY 1998 − REVISED FEBRUARY 2004
22 WWW.TI.COM
TYPICAL CHARACTERISTICS
Figure 36
CL − Load Capacitance − pF
PHASE MARGINvs
LOAD CAPACITANCE
60
40
20
0
70
50
30
10
100 1k 100k
90
10 10k
80
mφ
− P
hase
Mar
gin
− de
gree
s
VDD = ±2.5 VTA = 25°CRL = 10 kΩ
Rnull = 50 Ω
Rnull = 20 Ω
Rnull = 0 Ω
Figure 37
TA − Free-Air Temperature − ° C
PHASE MARGINvs
FREE-AIR TEMPERATURE
60
50
40
30−35 5
55
45
35
−15 25 125−55 45 65
RL = 10 kΩCL = 160 pF
85 105
VDD = ±2.5 V
VDD = ±1.5 V
mφ
− P
hase
Mar
gin
− de
gree
s
Figure 38
VDD − Supply Voltage − V
GAIN BANDWIDTH PRODUCTvs
SUPPLY VOLTAGE
2.5 3 3.5 4 5.5 654.5
5
4.5
4
3.5
4.75
4.25
3.75
Gai
n B
andw
idth
Pro
duct
− M
Hz
CL = 160 pFRL = 10 kΩf = 10 kHzTA = 25°C
Figure 39
TA − Free-Air Temperature − ° C
GAIN BANDWIDTH PRODUCTvs
FREE-AIR TEMPERATURE
4.5
4
3.5
3−35 5
4.25
3.75
3.25
−15 25 125−55 45 65
RL = 10 kΩCL = 160 pF
85 105
VDD = ±2.5 V
VDD = ±1.5 V
5
4.75
Gai
n B
andw
idth
Pro
duct
− M
Hz
Device TLV2465A is Obsolete
SLOS220J − JULY 1998 − REVISED FEBRUARY 2004
23WWW.TI.COM
TYPICAL CHARACTERISTICS
Figure 40
VO
− Vo
ltage
− V
1.4
0.8
1.2
1
−2 0 2 4 10
t − Time − µs
86 12 14
LARGE SIGNAL FOLLOWER2.2
1.8
2
1.6
Input
Output
16 18
Output
InputVDD = 3 VVI(PP) = 1 VVI = 1.5 VRL = 10 kΩCL = 160 pFAV = 1TA = 25°C
Figure 41
VO
− Vo
ltage
− V
2.1
1.7
1.3−2 0 2 4 10
t − Time − µ s
86 12 14
LARGE SIGNAL FOLLOWER3.7
2.9
3.3
2.5
Input
Output
16 18
Output
InputVDD = 5 VVI(PP) = 2 VVI = 2.5 VRL = 10 kΩCL = 160 pFAV = 1TA = 25°C
Figure 42
VO
− Vo
ltage
− V
1.5
1.4
1.45
−0.2 0 0.2 0.4 1
t − Time − µ s
0.80.6 1.2 1.4
SMALL SIGNAL FOLLOWER1.6
1.55
Input
Output
1.6 1.8
VDD = 3 VVI(PP) = 100 mVVI = 1.5 VRL = 10 kΩ
CL = 160 pFAV = 1TA = 25°C
Figure 43
VO
− Vo
ltage
− V
2.5
2.4
2.45
−0.2 0 0.2 0.4 1
t − Time − µ s
0.80.6 1.2 1.4
SMALL SIGNAL FOLLOWER2.6
2.55
Input
Output
1.6 1.8
VDD = 5 VVI(PP) = 100 mVVI = 2.5 VRL = 10 kΩ
CL = 160 pFAV = 1TA = 25°C
Device TLV2465A is Obsolete
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TYPICAL CHARACTERISTICS
Figure 44
VO
− Vo
ltage
− V
VDD = 3 VVI(PP) = 1 VVI = 1.5 VRL = 10 kΩCL = 160 pFAV = −1TA = 25°C
1.1
0.5
0.9
0.7
−0.2 0 0.2 0.4 1
t − Time − µ s
0.80.6 1.2 1.4
INVERTING LARGE SIGNAL
1.9
1.5
1.7
1.3
1.6 1.8
2.3
2.1 Input
Output
Figure 45
VDD = 5 VVI(PP) = 2 VVI = 2.5 VRL = 10 kΩCL = 160 pFAV = −1TA = 25°C
2.5
1
2
1.5
−0.2 0 0.2 0.4 1
t − Time − µ s
0.80.6 1.2 1.4
INVERTING LARGE SIGNAL
3.5
4
3
1.6 1.8
Input
Output
VO
− Vo
ltage
− V
Figure 46
VO
− Vo
ltage
− V
1.5
1.4
1.45
−0.2 0 0.2 0.4 1
t − Time − µs
0.80.6 1.2 1.4
INVERTING SMALL SIGNAL1.6
1.55Input
Output
1.6 1.8
VDD = 3 VVI(PP) = 100 mVVI = 1.5 VRL = 10 kΩCL = 160 pFAV = −1TA = 25°C
Figure 47
VO
− Vo
ltage
− V
2.5
2.4
2.45
−0.2 0 0.2 0.4 1
t − Time − µ s
0.80.6 1.2 1.4
INVERTING SMALL SIGNAL2.6
2.55Input
Output
1.6 1.8
VDD = 5 VVI(PP) = 100 mVVI = 2.5 VRL = 10 kΩCL = 160 pFAV = −1TA = 25°C
Device TLV2465A is Obsolete
SLOS220J − JULY 1998 − REVISED FEBRUARY 2004
25WWW.TI.COM
PARAMETER MEASUREMENT INFORMATION
_
+
Rnull
RL CL
Figure 48
APPLICATION INFORMATION
driving a capacitive load
When the amplifier is configured in this manner, capacitive loading directly on the output will decrease thedevice’s phase margin leading to high frequency ringing or oscillations. Therefore, for capacitive loads of greaterthan 10 pF, it is recommended that a resistor be placed in series (RNULL) with the output of the amplifier, asshown in Figure 49. A minimum value of 20 Ω should work well for most applications.
CLOAD
RF
InputOutput
RGRNULL_
+
Figure 49. Driving a Capacitive Load
offset voltage
The output offset voltage, (VOO) is the sum of the input offset voltage (VIO) and both input bias currents (IIB) timesthe corresponding gains. The following schematic and formula can be used to calculate the output offsetvoltage:
VOO VIO1 RFRG IIB RS1 RF
RG IIB– RF
+
−VI
+
RG
RS
RF
IIB−
VO
IIB+
Figure 50. Output Offset Voltage Model
Device TLV2465A is Obsolete
SLOS220J − JULY 1998 − REVISED FEBRUARY 2004
26 WWW.TI.COM
APPLICATION INFORMATION
general configurations
When receiving low-level signals, limiting the bandwidth of the incoming signals into the system is oftenrequired. The simplest way to accomplish this is to place an RC filter at the noninverting terminal of the amplifier(see Figure 51).
VIVO
C1
+
−
RG RF
R1
f–3dB 12R1C1
VOVI
1 RFRG 1
1 sR1C1
Figure 51. Single-Pole Low-Pass Filter
If even more attenuation is needed, a multiple pole filter is required. The Sallen-Key filter can be used for thistask. For best results, the amplifier should have a bandwidth that is 8 to 10 times the filter frequency bandwidth.Failure to do this can result in phase shift of the amplifier.
VI
C2R2R1
C1
RFRG
R1 = R2 = RC1 = C2 = CQ = Peaking Factor(Butterworth Q = 0.707)
(=
1Q
2 − )RG
RF
_+
f–3dB 12RC
Figure 52. 2-Pole Low-Pass Sallen-Key Filter
Device TLV2465A is Obsolete
SLOS220J − JULY 1998 − REVISED FEBRUARY 2004
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APPLICATION INFORMATION
shutdown function
Three members of the TLV246x family (TLV2460/3/5) have a shutdown terminal for conserving battery life inportable applications. When the shutdown terminal is tied low, the supply current is reduced to 0.3 µA/channel,the amplifier is disabled, and the outputs are placed in a high impedance mode. To enable the amplifier, theshutdown terminal can either be left floating or pulled high. When the shutdown terminal is left floating, careshould be taken to ensure that parasitic leakage current at the shutdown terminal does not inadvertently placethe operational amplifier into shutdown. The shutdown terminal threshold is always referenced to VDD/2.Therefore, when operating the device with split supply voltages (e.g. ±2.5 V), the shutdown terminal needs tobe pulled to VDD− (not GND) to disable the operational amplifier.
The amplifier’s output with a shutdown pulse is shown in Figures 22, 23, 24, and 25. The amplifier is poweredwith a single 5-V supply and configured as a noninverting configuration with a gain of 5. The amplifier turnonand turnoff times are measured from the 50% point of the shutdown pulse to the 50% point of the outputwaveform. The times for the single, dual, and quad are listed in the data tables.
circuit layout considerations
To achieve the levels of high performance of the TLV246x, follow proper printed-circuit board design techniques.A general set of guidelines is given in the following.
Ground planes − It is highly recommended that a ground plane be used on the board to provide allcomponents with a low inductive ground connection. However, in the areas of the amplifier inputs andoutput, the ground plane can be removed to minimize the stray capacitance.
Proper power supply decoupling − Use a 6.8-µF tantalum capacitor in parallel with a 0.1-µF ceramiccapacitor on each supply terminal. It may be possible to share the tantalum among several amplifiersdepending on the application, but a 0.1-µF ceramic capacitor should always be used on the supply terminalof every amplifier. In addition, the 0.1-µF capacitor should be placed as close as possible to the supplyterminal. As this distance increases, the inductance in the connecting trace makes the capacitor lesseffective. The designer should strive for distances of less than 0.1 inches between the device powerterminals and the ceramic capacitors.
Sockets − Sockets can be used but are not recommended. The additional lead inductance in the socket pinswill often lead to stability problems. Surface-mount packages soldered directly to the printed-circuit boardis the best implementation.
Short trace runs/compact part placements − Optimum high performance is achieved when stray seriesinductance has been minimized. To realize this, the circuit layout should be made as compact as possible,thereby minimizing the length of all trace runs. Particular attention should be paid to the inverting input ofthe amplifier. Its length should be kept as short as possible. This will help to minimize stray capacitance atthe input of the amplifier.
Surface-mount passive components − Using surface-mount passive components is recommended for highperformance amplifier circuits for several reasons. First, because of the extremely low lead inductance ofsurface-mount components, the problem with stray series inductance is greatly reduced. Second, the smallsize of surface-mount components naturally leads to a more compact layout thereby minimizing both strayinductance and capacitance. If leaded components are used, it is recommended that the lead lengths bekept as short as possible.
Device TLV2465A is Obsolete
SLOS220J − JULY 1998 − REVISED FEBRUARY 2004
28 WWW.TI.COM
APPLICATION INFORMATION
general power dissipation considerations
For a given θJA, the maximum power dissipation is shown in Figure 53 and is calculated by the following formula:
PD TMAX–TAJA
Where:
PD = Maximum power dissipation of THS246x IC (watts)TMAX= Absolute maximum junction temperature (150°C)TA = Free-ambient air temperature (°C)θJA = θJC + θCA
θJC = Thermal coefficient from junction to caseθCA = Thermal coefficient from case to ambient air (°C/W)
1
0.75
0.5
0−55−40 −25 −10 5
Max
imum
Pow
er D
issi
patio
n −
W
1.25
1.5
MAXIMUM POWER DISSIPATIONvs
FREE-AIR TEMPERATURE
1.75
20 35 50
0.25
TA − Free-Air Temperature − ° C
2
65 80 95 110 125
MSOP PackageLow-K Test PCBθJA = 260°C/W
TJ = 150°CPDIP PackageLow-K Test PCBθJA = 104°C/W
SOIC PackageLow-K Test PCBθJA = 176°C/W
SOT-23 PackageLow-K Test PCBθJA = 324°C/W
NOTE A: Results are with no air flow and using JEDEC Standard Low-K test PCB.
Figure 53. Maximum Power Dissipation vs Free-Air Temperature
Device TLV2465A is Obsolete
SLOS220J − JULY 1998 − REVISED FEBRUARY 2004
29WWW.TI.COM
APPLICATION INFORMATION
macromodel information
Macromodel information provided was derived using Microsim Parts Release 8, the model generationsoftware used with Microsim PSpice. The Boyle macromodel (see Note 2) and subcircuit in Figure 54 aregenerated using the TLV246x typical electrical and operating characteristics at TA = 25°C. Using thisinformation, output simulations of the following key parameters can be generated to a tolerance of 20% (in mostcases):
Maximum positive output voltage swing Maximum negative output voltage swing Slew rate Quiescent power dissipation Input bias current Open-loop voltage amplification
Unity-gain frequency Common-mode rejection ratio Phase margin DC output resistance AC output resistance Short-circuit output current limit
NOTE 2: G. R. Boyle, B. M. Cohn, D. O. Pederson, and J. E. Solomon, “Macromodeling of Intergrated Circuit Operational Amplifiers”, IEEEJournal of Solid-State Circuits, SC-9, 353 (1974).
+
−
+
−
+
−
+
− +
−
.SUBCKT TLV246X 1 2 3 4 5C1 11 12 2.46034E−12C2 6 7 10.0000E−12CSS 10 99 443.21E−15DC 5 53 DYDE 54 5 DYDLP 90 91 DXDLN 92 90 DXDP 4 3 DXEGND 99 0 POLY (2) (3,0) (4,0) 0 .5 .5FB 7 99 POLY (5) VB VC VE VLP+ VLN 0 21.600E6 −1E3 1E3 22E6 −22E6GA 6 0 11 12 345.26E−6GCM 0 6 10 99 15.4226E−9ISS 10 4 DC 18.850E−6HLIM 90 0 VLIM 1KJ1 11 2 10 JX1J2 12 1 10 JX2R2 6 9 100.00E3
RD1 3 11 2.8964E3RD2 3 12 2.8964E3R01 8 5 5.6000R02 7 99 6.2000RP 3 4 8.9127RSS 10 99 10.610E6VB 9 0 DC 0VC 3 53 DC .7836VE 54 4 DC .7436VLIM 7 8 DC 0VLP 91 0 DC 117VLN 0 92 DC 117.MODEL DX D (IS=800.00E−18).MODEL DY D (IS=800.00E−18 Rs = 1m Cjo=10p).MODEL JX1 NJF (IS=1.0000E−12 BETA=6.3239E−3+ VTO=−1).MODEL JX2 NJF (IS=1.0000E−12 BETA=6.3239E−3+ VTO=−1).ENDS
VDD+
RP
IN −2
IN+1
GND
RD1
11
J1 J2
10
RSSISS
3
12
RD2DP
VD
DC
4
C1
53
EGNDFB
HLIM
90
DLP
91
DLN
92
VLNVLP
99
CSS
+
−VE
DE
54
OUT
+
−+
−
R2 6
9
VB
C2
GA
VLIM
8
5
RO1
RO2
7
GCM
Figure 54. Boyle Macromodels and Subcircuit
PSpice and Parts are trademarks of MicroSim Corporation.
Device TLV2465A is Obsolete
SLOS220J − JULY 1998 − REVISED FEBRUARY 2004
30 WWW.TI.COM
macromodel information (continued)
.subckt TLV_246Y 1 2 3 4 5 6c1 11 12 2.4603E−12c2 72 7 10.000E−12css 10 99 443.21E−15dc 70 53 dyde 54 70 dydlp 90 91 dxdln 92 90 dxdp 4 3 dxegnd 99 0 poly(2) (3,0) (4,0) 0 .5 .5fb 7 99 poly(5) vb vc ve vlp vln 0
21.600E6 −1E3 1E3 22E6 −22E6ga 72 0 11 12 345.26E−6gcm 0 72 10 99 15.422E−9iss 74 4 dc 18.850E−6hlim 90 0 vlim 1Kj1 11 2 10 jx1j2 12 1 10 jx2r2 72 9 100.00E3rd1 3 11 2.8964E3rd2 3 12 2.8964E3ro1 8 70 5.6000ro2 7 99 6.2000
rp 3 71 8.9127rss 10 99 10.610E6rs1 6 4 1Grs2 6 4 1Grs3 6 4 1Grs4 6 4 1Gs1 71 4 6 4 s1xs2 70 5 6 4 s1xs3 10 74 6 4 s1xs4 74 4 6 4 s2xvb 9 0 dc 0vc 3 53 dc .7836ve 54 4 dc .7436vlim 7 8 dc 0vlp 91 0 dc 117vln 0 92 dc 117.model dx D(Is=800.00E−18).model dy D(Is=800.00E−18 Rs=1m Cjo=10p).model jx1 NJF(Is=1.0000E−12 Beta=6.3239E−3 Vto=−1).model jx2 NJF(Is=1.0000E−12 Beta=6.3239E−3 Vto=−1).model s1x VSWITCH(Roff=1E8 Ron=1.0 Voff=2.5 Von=0.0).model s2x VSWITCH(Roff=1E8 Ron=1.0 Voff=0 Von=2.5).ends
Figure 54. Boyle Macromodels and Subcircuit (Continued)
Device TLV2465A is Obsolete
PACKAGE OPTION ADDENDUM
www.ti.com 31-Oct-2013
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status(1)
Package Type PackageDrawing
Pins PackageQty
Eco Plan(2)
Lead/Ball Finish(6)
MSL Peak Temp(3)
Op Temp (°C) Device Marking(4/5)
Samples
5962-0051201Q2A ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 5962-0051201Q2ATLV2460MFKB
5962-0051201QHA ACTIVE CFP U 10 1 TBD A42 N / A for Pkg Type -55 to 125 0051201QHATLV2460M
5962-0051201QPA ACTIVE CDIP JG 8 1 TBD A42 N / A for Pkg Type -55 to 125 0051201QPATLV2460M
5962-0051202Q2A ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 5962-0051202Q2ATLV2460AMFKB
5962-0051202QHA ACTIVE CFP U 10 1 TBD A42 N / A for Pkg Type -55 to 125 0051202QHATLV2460AM
5962-0051202QPA ACTIVE CDIP JG 8 1 TBD A42 N / A for Pkg Type -55 to 125 0051202QPATLV2460AM
5962-0051203Q2A ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 5962-0051203Q2ATLV2461MFKB
5962-0051203QHA ACTIVE CFP U 10 1 TBD A42 N / A for Pkg Type -55 to 125 0051203QHATLV2461M
5962-0051203QPA ACTIVE CDIP JG 8 1 TBD A42 N / A for Pkg Type -55 to 125 0051203QPATLV2461M
5962-0051204Q2A ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 5962-0051204Q2ATLV2461AMFKB
5962-0051204QHA ACTIVE CFP U 10 1 TBD A42 N / A for Pkg Type -55 to 125 0051204QHATLV2461AM
5962-0051204QPA ACTIVE CDIP JG 8 1 TBD A42 N / A for Pkg Type -55 to 125 0051204QPATLV2461AM
5962-0051205Q2A ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 5962-0051205Q2ATLV2462MFKB
PACKAGE OPTION ADDENDUM
www.ti.com 31-Oct-2013
Addendum-Page 2
Orderable Device Status(1)
Package Type PackageDrawing
Pins PackageQty
Eco Plan(2)
Lead/Ball Finish(6)
MSL Peak Temp(3)
Op Temp (°C) Device Marking(4/5)
Samples
5962-0051205QHA ACTIVE CFP U 10 1 TBD A42 N / A for Pkg Type -55 to 125 0051205QHATLV2462M
5962-0051205QPA ACTIVE CDIP JG 8 1 TBD A42 N / A for Pkg Type -55 to 125 0051205QPATLV2462M
5962-0051206Q2A ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 5962-0051206Q2ATLV2462AMFKB
5962-0051206QHA ACTIVE CFP U 10 1 TBD A42 N / A for Pkg Type -55 to 125 0051206QHATLV2462AM
5962-0051206QPA ACTIVE CDIP JG 8 1 TBD A42 N / A for Pkg Type -55 to 125 0051206QPATLV2462AM
5962-0051207Q2A ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 5962-0051207Q2ATLV2463MFKB
5962-0051207QCA ACTIVE CDIP J 14 1 TBD A42 N / A for Pkg Type -55 to 125 5962-0051207QCATLV2463MJB
5962-0051208Q2A ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 5962-0051208Q2ATLV2463AMFKB
5962-0051208QCA ACTIVE CDIP J 14 1 TBD A42 N / A for Pkg Type -55 to 125 5962-0051208QCATLV2463AMJB
TLV2460AIDR ACTIVE SOIC D 8 2500 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM -40 to 125 2460AI
TLV2460AIDRG4 ACTIVE SOIC D 8 2500 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM -40 to 125 2460AI
TLV2460AIP ACTIVE PDIP P 8 50 Pb-Free(RoHS)
CU NIPDAU N / A for Pkg Type -40 to 125 TLV2460AI
TLV2460AIPE4 ACTIVE PDIP P 8 50 Pb-Free(RoHS)
CU NIPDAU N / A for Pkg Type -40 to 125 TLV2460AI
TLV2460AMFKB ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 5962-0051202Q2ATLV2460AMFKB
PACKAGE OPTION ADDENDUM
www.ti.com 31-Oct-2013
Addendum-Page 3
Orderable Device Status(1)
Package Type PackageDrawing
Pins PackageQty
Eco Plan(2)
Lead/Ball Finish(6)
MSL Peak Temp(3)
Op Temp (°C) Device Marking(4/5)
Samples
TLV2460AMJGB ACTIVE CDIP JG 8 1 TBD A42 N / A for Pkg Type -55 to 125 0051202QPATLV2460AM
TLV2460AMUB ACTIVE CFP U 10 1 TBD A42 N / A for Pkg Type -55 to 125 0051202QHATLV2460AM
TLV2460AQD OBSOLETE SOIC D 8 TBD Call TI Call TI -40 to 125
TLV2460AQDR OBSOLETE SOIC D 8 TBD Call TI Call TI -40 to 125
TLV2460AQDRG4 ACTIVE SOIC D 8 2500 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM V2460A
TLV2460AQPW OBSOLETE TSSOP PW 8 TBD Call TI Call TI -40 to 125 V2460A
TLV2460AQPWG4 ACTIVE TSSOP PW 8 150 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM V2460A
TLV2460AQPWR OBSOLETE TSSOP PW 8 TBD Call TI Call TI -40 to 125 V2460A
TLV2460AQPWRG4 ACTIVE TSSOP PW 8 2000 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM V2460A
TLV2460CD ACTIVE SOIC D 8 75 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM 0 to 70 2460C
TLV2460CDBVR ACTIVE SOT-23 DBV 6 3000 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM 0 to 70 VAOC
TLV2460CDBVRG4 ACTIVE SOT-23 DBV 6 3000 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM 0 to 70 VAOC
TLV2460CDBVT ACTIVE SOT-23 DBV 6 250 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM 0 to 70 VAOC
TLV2460CDBVTG4 ACTIVE SOT-23 DBV 6 250 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM 0 to 70 VAOC
TLV2460CDG4 ACTIVE SOIC D 8 75 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM 0 to 70 2460C
TLV2460CDR ACTIVE SOIC D 8 2500 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM 0 to 70 2460C
TLV2460CDRG4 ACTIVE SOIC D 8 2500 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM 0 to 70 2460C
TLV2460CP ACTIVE PDIP P 8 50 Pb-Free(RoHS)
CU NIPDAU N / A for Pkg Type 0 to 70 TLV2460C
TLV2460CPE4 ACTIVE PDIP P 8 50 Pb-Free(RoHS)
CU NIPDAU N / A for Pkg Type 0 to 70 TLV2460C
TLV2460ID ACTIVE SOIC D 8 75 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM -40 to 125 2460I
PACKAGE OPTION ADDENDUM
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Addendum-Page 4
Orderable Device Status(1)
Package Type PackageDrawing
Pins PackageQty
Eco Plan(2)
Lead/Ball Finish(6)
MSL Peak Temp(3)
Op Temp (°C) Device Marking(4/5)
Samples
TLV2460IDBVR ACTIVE SOT-23 DBV 6 3000 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM -40 to 125 VAOI
TLV2460IDBVRG4 ACTIVE SOT-23 DBV 6 3000 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM -40 to 125 VAOI
TLV2460IDBVT ACTIVE SOT-23 DBV 6 250 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM -40 to 125 VAOI
TLV2460IDBVTG4 ACTIVE SOT-23 DBV 6 250 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM -40 to 125 VAOI
TLV2460IDG4 ACTIVE SOIC D 8 75 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM -40 to 125 2460I
TLV2460IDR ACTIVE SOIC D 8 2500 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM -40 to 125 2460I
TLV2460IDRG4 ACTIVE SOIC D 8 2500 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM -40 to 125 2460I
TLV2460IP ACTIVE PDIP P 8 50 Pb-Free(RoHS)
CU NIPDAU N / A for Pkg Type -40 to 125 TLV2460I
TLV2460IPE4 ACTIVE PDIP P 8 50 Pb-Free(RoHS)
CU NIPDAU N / A for Pkg Type -40 to 125 TLV2460I
TLV2460MFKB ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 5962-0051201Q2ATLV2460MFKB
TLV2460MJG ACTIVE CDIP JG 8 1 TBD A42 N / A for Pkg Type -55 to 125 TLV2460MJG
TLV2460MJGB ACTIVE CDIP JG 8 1 TBD A42 N / A for Pkg Type -55 to 125 0051201QPATLV2460M
TLV2460MUB ACTIVE CFP U 10 1 TBD A42 N / A for Pkg Type -55 to 125 0051201QHATLV2460M
TLV2460QD OBSOLETE SOIC D 8 TBD Call TI Call TI -40 to 125
TLV2460QDR OBSOLETE SOIC D 8 TBD Call TI Call TI -40 to 125
TLV2460QPW OBSOLETE TSSOP PW 8 TBD Call TI Call TI -40 to 125 V2460Q
TLV2460QPWG4 ACTIVE TSSOP PW 8 150 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM V2460Q
TLV2460QPWR OBSOLETE TSSOP PW 8 TBD Call TI Call TI -40 to 125 V2460Q
TLV2460QPWRG4 ACTIVE TSSOP PW 8 2000 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM V2460Q
PACKAGE OPTION ADDENDUM
www.ti.com 31-Oct-2013
Addendum-Page 5
Orderable Device Status(1)
Package Type PackageDrawing
Pins PackageQty
Eco Plan(2)
Lead/Ball Finish(6)
MSL Peak Temp(3)
Op Temp (°C) Device Marking(4/5)
Samples
TLV2461AID ACTIVE SOIC D 8 75 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM -40 to 125 2461AI
TLV2461AIDG4 ACTIVE SOIC D 8 75 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM -40 to 125 2461AI
TLV2461AIDR ACTIVE SOIC D 8 2500 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM -40 to 125 2461AI
TLV2461AIDRG4 ACTIVE SOIC D 8 2500 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM -40 to 125 2461AI
TLV2461AIP ACTIVE PDIP P 8 50 Pb-Free(RoHS)
CU NIPDAU N / A for Pkg Type -40 to 125 TLV2461AI
TLV2461AIPE4 ACTIVE PDIP P 8 50 Pb-Free(RoHS)
CU NIPDAU N / A for Pkg Type -40 to 125 TLV2461AI
TLV2461AMFKB ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 5962-0051204Q2ATLV2461AMFKB
TLV2461AMJGB ACTIVE CDIP JG 8 1 TBD A42 N / A for Pkg Type -55 to 125 0051204QPATLV2461AM
TLV2461AMUB ACTIVE CFP U 10 1 TBD A42 N / A for Pkg Type -55 to 125 0051204QHATLV2461AM
TLV2461AQD OBSOLETE SOIC D 8 TBD Call TI Call TI -40 to 125 V2461A
TLV2461AQDG4 ACTIVE SOIC D 8 75 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM V2461A
TLV2461AQDR OBSOLETE SOIC D 8 TBD Call TI Call TI -40 to 125 V2461A
TLV2461AQDRG4 ACTIVE SOIC D 8 2500 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM V2461A
TLV2461AQPWR OBSOLETE TSSOP PW 8 TBD Call TI Call TI -40 to 125 V2461A
TLV2461AQPWRG4 ACTIVE TSSOP PW 8 2000 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM V2461A
TLV2461CD ACTIVE SOIC D 8 75 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM 0 to 70 2461C
TLV2461CDBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM 0 to 70 VAPC
TLV2461CDBVRG4 ACTIVE SOT-23 DBV 5 3000 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM 0 to 70 VAPC
PACKAGE OPTION ADDENDUM
www.ti.com 31-Oct-2013
Addendum-Page 6
Orderable Device Status(1)
Package Type PackageDrawing
Pins PackageQty
Eco Plan(2)
Lead/Ball Finish(6)
MSL Peak Temp(3)
Op Temp (°C) Device Marking(4/5)
Samples
TLV2461CDBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM 0 to 70 VAPC
TLV2461CDBVTG4 ACTIVE SOT-23 DBV 5 250 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM 0 to 70 VAPC
TLV2461CDG4 ACTIVE SOIC D 8 75 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM 0 to 70 2461C
TLV2461CDR ACTIVE SOIC D 8 2500 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM 0 to 70 2461C
TLV2461CDRG4 ACTIVE SOIC D 8 2500 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM 0 to 70 2461C
TLV2461CP ACTIVE PDIP P 8 50 Pb-Free(RoHS)
CU NIPDAU N / A for Pkg Type 0 to 70 TLV2461C
TLV2461CPE4 ACTIVE PDIP P 8 50 Pb-Free(RoHS)
CU NIPDAU N / A for Pkg Type 0 to 70 TLV2461C
TLV2461ID ACTIVE SOIC D 8 75 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM -40 to 125 2461I
TLV2461IDBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM -40 to 125 VAPI
TLV2461IDBVRG4 ACTIVE SOT-23 DBV 5 3000 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM -40 to 125 VAPI
TLV2461IDBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM -40 to 125 VAPI
TLV2461IDBVTG4 ACTIVE SOT-23 DBV 5 250 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM -40 to 125 VAPI
TLV2461IDG4 ACTIVE SOIC D 8 75 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM -40 to 125 2461I
TLV2461IDR ACTIVE SOIC D 8 2500 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM -40 to 125 2461I
TLV2461IDRG4 ACTIVE SOIC D 8 2500 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM -40 to 125 2461I
TLV2461IP ACTIVE PDIP P 8 50 Pb-Free(RoHS)
CU NIPDAU N / A for Pkg Type -40 to 125 TLV2461I
TLV2461IPE4 ACTIVE PDIP P 8 50 Pb-Free(RoHS)
CU NIPDAU N / A for Pkg Type -40 to 125 TLV2461I
TLV2461MFKB ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 5962-0051203Q2A
PACKAGE OPTION ADDENDUM
www.ti.com 31-Oct-2013
Addendum-Page 7
Orderable Device Status(1)
Package Type PackageDrawing
Pins PackageQty
Eco Plan(2)
Lead/Ball Finish(6)
MSL Peak Temp(3)
Op Temp (°C) Device Marking(4/5)
Samples
TLV2461MFKB
TLV2461MJGB ACTIVE CDIP JG 8 1 TBD A42 N / A for Pkg Type -55 to 125 0051203QPATLV2461M
TLV2461MUB ACTIVE CFP U 10 1 TBD A42 N / A for Pkg Type -55 to 125 0051203QHATLV2461M
TLV2461QD OBSOLETE SOIC D 8 TBD Call TI Call TI -40 to 125 V2461Q
TLV2461QDG4 ACTIVE SOIC D 8 75 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM V2461Q
TLV2461QDR OBSOLETE SOIC D 8 TBD Call TI Call TI -40 to 125 V2461Q
TLV2461QDRG4 ACTIVE SOIC D 8 2500 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM V2461Q
TLV2461QPWR OBSOLETE TSSOP PW 8 TBD Call TI Call TI -40 to 125 V2461Q
TLV2461QPWRG4 ACTIVE TSSOP PW 8 2000 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM V2461Q
TLV2462AID ACTIVE SOIC D 8 75 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM -40 to 125 2462AI
TLV2462AIDG4 ACTIVE SOIC D 8 75 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM -40 to 125 2462AI
TLV2462AIDR ACTIVE SOIC D 8 2500 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM -40 to 125 2462AI
TLV2462AIDRG4 ACTIVE SOIC D 8 2500 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM -40 to 125 2462AI
TLV2462AIP ACTIVE PDIP P 8 50 Pb-Free(RoHS)
CU NIPDAU N / A for Pkg Type -40 to 125 TLV2462AI
TLV2462AIPE4 ACTIVE PDIP P 8 50 Pb-Free(RoHS)
CU NIPDAU N / A for Pkg Type -40 to 125 TLV2462AI
TLV2462AMFKB ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 5962-0051206Q2ATLV2462AMFKB
TLV2462AMJG ACTIVE CDIP JG 8 1 TBD A42 N / A for Pkg Type -55 to 125 TLV2462AMJG
TLV2462AMJGB ACTIVE CDIP JG 8 1 TBD A42 N / A for Pkg Type -55 to 125 0051206QPATLV2462AM
TLV2462AMUB ACTIVE CFP U 10 1 TBD A42 N / A for Pkg Type -55 to 125 0051206QHATLV2462AM
PACKAGE OPTION ADDENDUM
www.ti.com 31-Oct-2013
Addendum-Page 8
Orderable Device Status(1)
Package Type PackageDrawing
Pins PackageQty
Eco Plan(2)
Lead/Ball Finish(6)
MSL Peak Temp(3)
Op Temp (°C) Device Marking(4/5)
Samples
TLV2462AQD ACTIVE SOIC D 8 75 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM -40 to 125 V2462A
TLV2462AQDG4 ACTIVE SOIC D 8 75 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM V2462A
TLV2462AQDRG4 ACTIVE SOIC D 8 2500 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM V2462A
TLV2462AQPWR ACTIVE TSSOP PW 8 2000 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM -40 to 125 V2462A
TLV2462AQPWRG4 ACTIVE TSSOP PW 8 2000 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM V2462A
TLV2462CD ACTIVE SOIC D 8 75 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM 0 to 70 2462C
TLV2462CDG4 ACTIVE SOIC D 8 75 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM 0 to 70 2462C
TLV2462CDGK ACTIVE VSSOP DGK 8 80 Green (RoHS& no Sb/Br)
CU NIPDAU |CU NIPDAUAG
Level-1-260C-UNLIM 0 to 70 AAI
TLV2462CDGKG4 ACTIVE VSSOP DGK 8 80 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM 0 to 70 AAI
TLV2462CDGKR ACTIVE VSSOP DGK 8 2500 Green (RoHS& no Sb/Br)
CU NIPDAU |CU NIPDAUAG
Level-1-260C-UNLIM 0 to 70 AAI
TLV2462CDGKRG4 ACTIVE VSSOP DGK 8 2500 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM 0 to 70 AAI
TLV2462CDR ACTIVE SOIC D 8 2500 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM 0 to 70 2462C
TLV2462CDRG4 ACTIVE SOIC D 8 2500 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM 0 to 70 2462C
TLV2462CP ACTIVE PDIP P 8 50 Pb-Free(RoHS)
CU NIPDAU N / A for Pkg Type 0 to 70 TLV2462CP
TLV2462CPE4 ACTIVE PDIP P 8 50 Pb-Free(RoHS)
CU NIPDAU N / A for Pkg Type 0 to 70 TLV2462CP
TLV2462ID ACTIVE SOIC D 8 75 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM -40 to 125 2462I
TLV2462IDG4 ACTIVE SOIC D 8 75 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM -40 to 125 2462I
TLV2462IDGK ACTIVE VSSOP DGK 8 80 Green (RoHS& no Sb/Br)
CU NIPDAU |CU NIPDAUAG
Level-1-260C-UNLIM -40 to 125 AAJ
PACKAGE OPTION ADDENDUM
www.ti.com 31-Oct-2013
Addendum-Page 9
Orderable Device Status(1)
Package Type PackageDrawing
Pins PackageQty
Eco Plan(2)
Lead/Ball Finish(6)
MSL Peak Temp(3)
Op Temp (°C) Device Marking(4/5)
Samples
TLV2462IDGKG4 ACTIVE VSSOP DGK 8 80 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM -40 to 125 AAJ
TLV2462IDGKR ACTIVE VSSOP DGK 8 2500 Green (RoHS& no Sb/Br)
CU NIPDAU |CU NIPDAUAG
Level-1-260C-UNLIM -40 to 125 AAJ
TLV2462IDGKRG4 ACTIVE VSSOP DGK 8 2500 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM -40 to 125 AAJ
TLV2462IDR ACTIVE SOIC D 8 2500 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM -40 to 125 2462I
TLV2462IDRG4 ACTIVE SOIC D 8 2500 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM -40 to 125 2462I
TLV2462IP ACTIVE PDIP P 8 50 Pb-Free(RoHS)
CU NIPDAU N / A for Pkg Type -40 to 125 TLV2462IP
TLV2462IPE4 ACTIVE PDIP P 8 50 Pb-Free(RoHS)
CU NIPDAU N / A for Pkg Type -40 to 125 TLV2462IP
TLV2462MFKB ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 5962-0051205Q2ATLV2462MFKB
TLV2462MJGB ACTIVE CDIP JG 8 1 TBD A42 N / A for Pkg Type -55 to 125 0051205QPATLV2462M
TLV2462MUB ACTIVE CFP U 10 1 TBD A42 N / A for Pkg Type -55 to 125 0051205QHATLV2462M
TLV2462QDG4 ACTIVE SOIC D 8 75 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM V2462Q
TLV2462QDR OBSOLETE SOIC D 8 TBD Call TI Call TI -40 to 125 V2462Q
TLV2462QDRG4 ACTIVE SOIC D 8 2500 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM V2462Q
TLV2462QPWG4 ACTIVE TSSOP PW 8 150 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM V2462Q
TLV2462QPWR ACTIVE TSSOP PW 8 2000 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM -40 to 125 V2462Q
TLV2462QPWRG4 ACTIVE TSSOP PW 8 2000 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM V2462Q
TLV2463AIDR ACTIVE SOIC D 14 2500 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM -40 to 125 TLV2463AI
PACKAGE OPTION ADDENDUM
www.ti.com 31-Oct-2013
Addendum-Page 10
Orderable Device Status(1)
Package Type PackageDrawing
Pins PackageQty
Eco Plan(2)
Lead/Ball Finish(6)
MSL Peak Temp(3)
Op Temp (°C) Device Marking(4/5)
Samples
TLV2463AIDRG4 ACTIVE SOIC D 14 2500 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM -40 to 125 TLV2463AI
TLV2463AMFKB ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 5962-0051208Q2ATLV2463AMFKB
TLV2463AMJ ACTIVE CDIP J 14 1 TBD A42 N / A for Pkg Type -55 to 125 TLV2463AMJ
TLV2463AMJB ACTIVE CDIP J 14 1 TBD A42 N / A for Pkg Type -55 to 125 5962-0051208QCATLV2463AMJB
TLV2463AQD OBSOLETE SOIC D 14 TBD Call TI Call TI -40 to 125 V2463AQ
TLV2463AQDG4 ACTIVE SOIC D 14 50 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM V2463AQ
TLV2463AQDR OBSOLETE SOIC D 14 TBD Call TI Call TI -40 to 125 V2463AQ
TLV2463AQDRG4 ACTIVE SOIC D 14 2500 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM V2463AQ
TLV2463AQPWR OBSOLETE TSSOP PW 14 TBD Call TI Call TI -40 to 125 2463AQ
TLV2463AQPWRG4 ACTIVE TSSOP PW 14 2000 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM 2463AQ
TLV2463CD ACTIVE SOIC D 14 50 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM 0 to 70 TLV2463C
TLV2463CDG4 ACTIVE SOIC D 14 50 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM 0 to 70 TLV2463C
TLV2463CDGS ACTIVE VSSOP DGS 10 80 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM 0 to 70 AAK
TLV2463CDGSG4 ACTIVE VSSOP DGS 10 80 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM 0 to 70 AAK
TLV2463CDGSR ACTIVE VSSOP DGS 10 2500 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM 0 to 70 AAK
TLV2463CDGSRG4 ACTIVE VSSOP DGS 10 2500 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM 0 to 70 AAK
TLV2463CDR ACTIVE SOIC D 14 2500 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM 0 to 70 TLV2463C
TLV2463CDRG4 ACTIVE SOIC D 14 2500 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM 0 to 70 TLV2463C
PACKAGE OPTION ADDENDUM
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Addendum-Page 11
Orderable Device Status(1)
Package Type PackageDrawing
Pins PackageQty
Eco Plan(2)
Lead/Ball Finish(6)
MSL Peak Temp(3)
Op Temp (°C) Device Marking(4/5)
Samples
TLV2463CN ACTIVE PDIP N 14 25 Pb-Free(RoHS)
CU NIPDAU N / A for Pkg Type 0 to 70 TLV2463CN
TLV2463CNE4 ACTIVE PDIP N 14 25 Pb-Free(RoHS)
CU NIPDAU N / A for Pkg Type 0 to 70 TLV2463CN
TLV2463ID ACTIVE SOIC D 14 50 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM -40 to 125 TLV2463I
TLV2463IDG4 ACTIVE SOIC D 14 50 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM -40 to 125 TLV2463I
TLV2463IDGS ACTIVE VSSOP DGS 10 80 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM -40 to 125 AAL
TLV2463IDGSG4 ACTIVE VSSOP DGS 10 80 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM -40 to 125 AAL
TLV2463IDGSR ACTIVE VSSOP DGS 10 2500 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM -40 to 125 AAL
TLV2463IDGSRG4 ACTIVE VSSOP DGS 10 2500 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM -40 to 125 AAL
TLV2463IN ACTIVE PDIP N 14 25 Pb-Free(RoHS)
CU NIPDAU N / A for Pkg Type -40 to 125 TLV2463IN
TLV2463INE4 ACTIVE PDIP N 14 25 Pb-Free(RoHS)
CU NIPDAU N / A for Pkg Type -40 to 125 TLV2463IN
TLV2463MFKB ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 5962-0051207Q2ATLV2463MFKB
TLV2463MJB ACTIVE CDIP J 14 1 TBD A42 N / A for Pkg Type -55 to 125 5962-0051207QCATLV2463MJB
TLV2463QD OBSOLETE SOIC D 14 TBD Call TI Call TI -40 to 125 V2463Q
TLV2463QDG4 ACTIVE SOIC D 14 50 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM V2463Q
TLV2463QDR OBSOLETE SOIC D 14 TBD Call TI Call TI -40 to 125 V2463Q
TLV2463QDRG4 ACTIVE SOIC D 14 2500 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM V2463Q
TLV2463QPWR OBSOLETE TSSOP PW 14 TBD Call TI Call TI -40 to 125 V2463Q
TLV2463QPWRG4 ACTIVE TSSOP PW 14 2000 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM V2463Q
PACKAGE OPTION ADDENDUM
www.ti.com 31-Oct-2013
Addendum-Page 12
Orderable Device Status(1)
Package Type PackageDrawing
Pins PackageQty
Eco Plan(2)
Lead/Ball Finish(6)
MSL Peak Temp(3)
Op Temp (°C) Device Marking(4/5)
Samples
TLV2464AID ACTIVE SOIC D 14 50 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM -40 to 125 2464AI
TLV2464AIDG4 ACTIVE SOIC D 14 50 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM -40 to 125 2464AI
TLV2464AIDR ACTIVE SOIC D 14 2500 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM -40 to 125 2464AI
TLV2464AIDRG4 ACTIVE SOIC D 14 2500 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM -40 to 125 2464AI
TLV2464AIN ACTIVE PDIP N 14 25 Pb-Free(RoHS)
CU NIPDAU N / A for Pkg Type -40 to 125 TLV2464AIN
TLV2464AINE4 ACTIVE PDIP N 14 25 Pb-Free(RoHS)
CU NIPDAU N / A for Pkg Type -40 to 125 TLV2464AIN
TLV2464AIPW ACTIVE TSSOP PW 14 90 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM -40 to 125 TY2464A
TLV2464AIPWG4 ACTIVE TSSOP PW 14 90 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM -40 to 125 TY2464A
TLV2464AIPWR ACTIVE TSSOP PW 14 2000 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM -40 to 125 TY2464A
TLV2464AIPWRG4 ACTIVE TSSOP PW 14 2000 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM -40 to 125 TY2464A
TLV2464CD ACTIVE SOIC D 14 50 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM 0 to 70 TLV2464C
TLV2464CDG4 ACTIVE SOIC D 14 50 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM 0 to 70 TLV2464C
TLV2464CDR ACTIVE SOIC D 14 2500 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM 0 to 70 TLV2464C
TLV2464CDRG4 ACTIVE SOIC D 14 2500 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM 0 to 70 TLV2464C
TLV2464CN ACTIVE PDIP N 14 25 Pb-Free(RoHS)
CU NIPDAU N / A for Pkg Type 0 to 70 TLV2464CN
TLV2464CNE4 ACTIVE PDIP N 14 25 Pb-Free(RoHS)
CU NIPDAU N / A for Pkg Type 0 to 70 TLV2464CN
TLV2464CPW ACTIVE TSSOP PW 14 90 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM 0 to 70 TV2464
TLV2464CPWG4 ACTIVE TSSOP PW 14 90 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM 0 to 70 TV2464
PACKAGE OPTION ADDENDUM
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Addendum-Page 13
Orderable Device Status(1)
Package Type PackageDrawing
Pins PackageQty
Eco Plan(2)
Lead/Ball Finish(6)
MSL Peak Temp(3)
Op Temp (°C) Device Marking(4/5)
Samples
TLV2464CPWR ACTIVE TSSOP PW 14 2000 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM 0 to 70 TV2464
TLV2464CPWRG4 ACTIVE TSSOP PW 14 2000 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM 0 to 70 TV2464
TLV2464ID ACTIVE SOIC D 14 50 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM -40 to 125 TLV2464I
TLV2464IDG4 ACTIVE SOIC D 14 50 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM -40 to 125 TLV2464I
TLV2464IDR ACTIVE SOIC D 14 2500 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM -40 to 125 TLV2464I
TLV2464IDRG4 ACTIVE SOIC D 14 2500 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM -40 to 125 TLV2464I
TLV2464IN ACTIVE PDIP N 14 25 Pb-Free(RoHS)
CU NIPDAU N / A for Pkg Type -40 to 125 TLV2464IN
TLV2464INE4 ACTIVE PDIP N 14 25 Pb-Free(RoHS)
CU NIPDAU N / A for Pkg Type -40 to 125 TLV2464IN
TLV2464IPW ACTIVE TSSOP PW 14 90 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM -40 to 125 TY2464
TLV2464IPWG4 ACTIVE TSSOP PW 14 90 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM -40 to 125 TY2464
TLV2464IPWR ACTIVE TSSOP PW 14 2000 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM -40 to 125 TY2464
TLV2464IPWRG4 ACTIVE TSSOP PW 14 2000 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM -40 to 125 TY2464
TLV2465CD ACTIVE SOIC D 16 40 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM 0 to 70 TLV2465C
TLV2465CDG4 ACTIVE SOIC D 16 40 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM 0 to 70 TLV2465C
TLV2465CDR ACTIVE SOIC D 16 2500 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM 0 to 70 TLV2465C
TLV2465CDRG4 ACTIVE SOIC D 16 2500 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM 0 to 70 TLV2465C
TLV2465CPWR ACTIVE TSSOP PW 16 2000 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM 0 to 70 2465C
TLV2465CPWRG4 ACTIVE TSSOP PW 16 2000 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM 0 to 70 2465C
PACKAGE OPTION ADDENDUM
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Addendum-Page 14
Orderable Device Status(1)
Package Type PackageDrawing
Pins PackageQty
Eco Plan(2)
Lead/Ball Finish(6)
MSL Peak Temp(3)
Op Temp (°C) Device Marking(4/5)
Samples
TLV2465ID ACTIVE SOIC D 16 40 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM -40 to 125 TLV2465I
TLV2465IDG4 ACTIVE SOIC D 16 40 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM -40 to 125 TLV2465I
TLV2465IDR ACTIVE SOIC D 16 2500 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM -40 to 125 TLV2465I
TLV2465IDRG4 ACTIVE SOIC D 16 2500 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM -40 to 125 TLV2465I
TLV2465IN ACTIVE PDIP N 16 25 Pb-Free(RoHS)
CU NIPDAU N / A for Pkg Type -40 to 125 TLV2465IN
TLV2465INE4 ACTIVE PDIP N 16 25 Pb-Free(RoHS)
CU NIPDAU N / A for Pkg Type -40 to 125 TLV2465IN
TLV2465IPW ACTIVE TSSOP PW 16 90 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM -40 to 125 2465I
TLV2465IPWG4 ACTIVE TSSOP PW 16 90 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM -40 to 125 2465I
TLV2465IPWR ACTIVE TSSOP PW 16 2000 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM -40 to 125 2465I
TLV2465IPWRG4 ACTIVE TSSOP PW 16 2000 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM -40 to 125 2465I
(1) The marketing status values are defined as follows:ACTIVE: Product device recommended for new designs.LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.PREVIEW: Device has been announced but is not in production. Samples may or may not be available.OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availabilityinformation and additional product content details.TBD: The Pb-Free/Green conversion plan has not been defined.Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement thatlead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used betweenthe die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weightin homogeneous material)
PACKAGE OPTION ADDENDUM
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Addendum-Page 15
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuationof the previous line and the two combined represent the entire Device Marking for that device.
(6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finishvalue exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on informationprovided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken andcontinues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF TLV2460, TLV2460A, TLV2460AM, TLV2460M, TLV2461, TLV2461A, TLV2461AM, TLV2461M, TLV2462, TLV2462A, TLV2462AM,TLV2462M, TLV2463, TLV2463A, TLV2463AM, TLV2463M, TLV2464A :
• Catalog: TLV2460A, TLV2460, TLV2461A, TLV2461, TLV2462A, TLV2462, TLV2463A, TLV2463
• Automotive: TLV2460-Q1, TLV2460A-Q1, TLV2460A-Q1, TLV2460-Q1, TLV2461-Q1, TLV2461A-Q1, TLV2461A-Q1, TLV2461-Q1, TLV2462-Q1, TLV2462A-Q1, TLV2462A-Q1,TLV2462-Q1, TLV2463-Q1, TLV2463A-Q1, TLV2463A-Q1, TLV2463-Q1, TLV2464A-Q1
• Enhanced Product: TLV2462A-EP, TLV2462A-EP, TLV2464A-EP
• Military: TLV2460M, TLV2460AM, TLV2461M, TLV2461AM, TLV2462M, TLV2462AM, TLV2463M, TLV2463AM
NOTE: Qualified Version Definitions:
• Catalog - TI's standard catalog product
• Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects
• Enhanced Product - Supports Defense, Aerospace and Medical Applications
• Military - QML certified for Military and Defense Applications
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device PackageType
PackageDrawing
Pins SPQ ReelDiameter
(mm)
ReelWidth
W1 (mm)
A0(mm)
B0(mm)
K0(mm)
P1(mm)
W(mm)
Pin1Quadrant
TLV2460AIDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
TLV2460AIDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
TLV2460CDBVR SOT-23 DBV 6 3000 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3
TLV2460CDBVT SOT-23 DBV 6 250 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3
TLV2460CDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
TLV2460IDBVR SOT-23 DBV 6 3000 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3
TLV2460IDBVT SOT-23 DBV 6 250 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3
TLV2460IDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
TLV2460IDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
TLV2461AIDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
TLV2461AIDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
TLV2461CDBVR SOT-23 DBV 5 3000 178.0 9.0 3.3 3.2 1.4 4.0 8.0 Q3
TLV2461CDBVR SOT-23 DBV 5 3000 180.0 9.0 3.15 3.2 1.4 4.0 8.0 Q3
TLV2461CDBVT SOT-23 DBV 5 250 180.0 9.0 3.15 3.2 1.4 4.0 8.0 Q3
TLV2461CDBVT SOT-23 DBV 5 250 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3
TLV2461CDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
TLV2461IDBVR SOT-23 DBV 5 3000 178.0 9.0 3.3 3.2 1.4 4.0 8.0 Q3
TLV2461IDBVR SOT-23 DBV 5 3000 180.0 9.0 3.15 3.2 1.4 4.0 8.0 Q3
PACKAGE MATERIALS INFORMATION
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Pack Materials-Page 1
Device PackageType
PackageDrawing
Pins SPQ ReelDiameter
(mm)
ReelWidth
W1 (mm)
A0(mm)
B0(mm)
K0(mm)
P1(mm)
W(mm)
Pin1Quadrant
TLV2461IDBVT SOT-23 DBV 5 250 180.0 9.0 3.15 3.2 1.4 4.0 8.0 Q3
TLV2461IDBVT SOT-23 DBV 5 250 178.0 9.0 3.3 3.2 1.4 4.0 8.0 Q3
TLV2461IDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
TLV2461IDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
TLV2462AIDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
TLV2462CDGKR VSSOP DGK 8 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1
TLV2462CDGKR VSSOP DGK 8 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1
TLV2462CDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
TLV2462IDGKR VSSOP DGK 8 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1
TLV2462IDGKR VSSOP DGK 8 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1
TLV2462IDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
TLV2463AIDR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1
TLV2463AQPWRG4 TSSOP PW 14 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1
TLV2463CDGSR VSSOP DGS 10 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1
TLV2463CDR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1
TLV2463IDGSR VSSOP DGS 10 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1
TLV2463QPWRG4 TSSOP PW 14 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1
TLV2464AIDR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1
TLV2464AIPWR TSSOP PW 14 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1
TLV2464CDR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1
TLV2464CPWR TSSOP PW 14 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1
TLV2464IDR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1
TLV2464IPWR TSSOP PW 14 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1
TLV2465CDR SOIC D 16 2500 330.0 16.4 6.5 10.3 2.1 8.0 16.0 Q1
TLV2465CPWR TSSOP PW 16 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1
TLV2465IDR SOIC D 16 2500 330.0 16.4 6.5 10.3 2.1 8.0 16.0 Q1
TLV2465IPWR TSSOP PW 16 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 31-Dec-2013
Pack Materials-Page 2
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
TLV2460AIDR SOIC D 8 2500 367.0 367.0 35.0
TLV2460AIDR SOIC D 8 2500 340.5 338.1 20.6
TLV2460CDBVR SOT-23 DBV 6 3000 180.0 180.0 18.0
TLV2460CDBVT SOT-23 DBV 6 250 180.0 180.0 18.0
TLV2460CDR SOIC D 8 2500 340.5 338.1 20.6
TLV2460IDBVR SOT-23 DBV 6 3000 180.0 180.0 18.0
TLV2460IDBVT SOT-23 DBV 6 250 180.0 180.0 18.0
TLV2460IDR SOIC D 8 2500 367.0 367.0 35.0
TLV2460IDR SOIC D 8 2500 340.5 338.1 20.6
TLV2461AIDR SOIC D 8 2500 367.0 367.0 35.0
TLV2461AIDR SOIC D 8 2500 340.5 338.1 20.6
TLV2461CDBVR SOT-23 DBV 5 3000 180.0 180.0 18.0
TLV2461CDBVR SOT-23 DBV 5 3000 182.0 182.0 20.0
TLV2461CDBVT SOT-23 DBV 5 250 182.0 182.0 20.0
TLV2461CDBVT SOT-23 DBV 5 250 180.0 180.0 18.0
TLV2461CDR SOIC D 8 2500 340.5 338.1 20.6
TLV2461IDBVR SOT-23 DBV 5 3000 180.0 180.0 18.0
TLV2461IDBVR SOT-23 DBV 5 3000 182.0 182.0 20.0
TLV2461IDBVT SOT-23 DBV 5 250 182.0 182.0 20.0
TLV2461IDBVT SOT-23 DBV 5 250 180.0 180.0 18.0
PACKAGE MATERIALS INFORMATION
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Pack Materials-Page 3
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
TLV2461IDR SOIC D 8 2500 367.0 367.0 35.0
TLV2461IDR SOIC D 8 2500 340.5 338.1 20.6
TLV2462AIDR SOIC D 8 2500 340.5 338.1 20.6
TLV2462CDGKR VSSOP DGK 8 2500 358.0 335.0 35.0
TLV2462CDGKR VSSOP DGK 8 2500 364.0 364.0 27.0
TLV2462CDR SOIC D 8 2500 340.5 338.1 20.6
TLV2462IDGKR VSSOP DGK 8 2500 358.0 335.0 35.0
TLV2462IDGKR VSSOP DGK 8 2500 364.0 364.0 27.0
TLV2462IDR SOIC D 8 2500 340.5 338.1 20.6
TLV2463AIDR SOIC D 14 2500 367.0 367.0 38.0
TLV2463AQPWRG4 TSSOP PW 14 2000 367.0 367.0 35.0
TLV2463CDGSR VSSOP DGS 10 2500 358.0 335.0 35.0
TLV2463CDR SOIC D 14 2500 367.0 367.0 38.0
TLV2463IDGSR VSSOP DGS 10 2500 358.0 335.0 35.0
TLV2463QPWRG4 TSSOP PW 14 2000 367.0 367.0 35.0
TLV2464AIDR SOIC D 14 2500 333.2 345.9 28.6
TLV2464AIPWR TSSOP PW 14 2000 367.0 367.0 35.0
TLV2464CDR SOIC D 14 2500 333.2 345.9 28.6
TLV2464CPWR TSSOP PW 14 2000 367.0 367.0 35.0
TLV2464IDR SOIC D 14 2500 333.2 345.9 28.6
TLV2464IPWR TSSOP PW 14 2000 367.0 367.0 35.0
TLV2465CDR SOIC D 16 2500 367.0 367.0 38.0
TLV2465CPWR TSSOP PW 16 2000 367.0 367.0 35.0
TLV2465IDR SOIC D 16 2500 367.0 367.0 38.0
TLV2465IPWR TSSOP PW 16 2000 367.0 367.0 35.0
PACKAGE MATERIALS INFORMATION
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Pack Materials-Page 4
MECHANICAL DATA
MCER001A – JANUARY 1995 – REVISED JANUARY 1997
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
JG (R-GDIP-T8) CERAMIC DUAL-IN-LINE
0.310 (7,87)0.290 (7,37)
0.014 (0,36)0.008 (0,20)
Seating Plane
4040107/C 08/96
5
40.065 (1,65)0.045 (1,14)
8
1
0.020 (0,51) MIN
0.400 (10,16)0.355 (9,00)
0.015 (0,38)0.023 (0,58)
0.063 (1,60)0.015 (0,38)
0.200 (5,08) MAX
0.130 (3,30) MIN
0.245 (6,22)0.280 (7,11)
0.100 (2,54)
0°–15°
NOTES: A. All linear dimensions are in inches (millimeters).B. This drawing is subject to change without notice.C. This package can be hermetically sealed with a ceramic lid using glass frit.D. Index point is provided on cap for terminal identification.E. Falls within MIL STD 1835 GDIP1-T8
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