GII THIU PLC S7-1200

1. Gii thiu chung v PLC S7-1200

1.1. Khi nim chung PLC s7-1200

Nm 2009, Siemens ra dng sn phm S7-1200 dng thay th dn cho S7-200. So

vi S7-200 th S7-1200 c nhng tnh nng ni tri:

-S7-1200 l mt dng ca b iu khin logic lp trnh (PLC) c th kim sot

nhiu ng dng t ng ha. Thit k nh gn, chi ph thp, v mt tp lnh mnh lm

cho chng ta c nhng gii php hon ho hn cho ng dng s dng vi S7-1200

-S7-1200 bao gm mt microprocessor, mt ngun cung cp c tch hp sn,

cc u vo/ra (DI/DO).

-Mt s tnh nng bo mt gip bo v quyn truy cp vo c CPU v chng

trnh iu khin:

+Tt c cc CPU u cung cp bo v bng password chng truy cp vo PLC

+Tnh nng know-how protection bo v cc block c bit ca mnh

-S7-1200 cung cp mt cng PROFINET, h tr chun Ethernet v TCP/IP.

Ngoi ra bn c th dng cc module truyn thong m rng kt ni bng RS485 hoc

RS232.

-Phn mm dng lp trnh cho S7-1200 l Step7 Basic. Step7 Basic h tr ba

ngn ng lp trnh l FBD, LAD v SCL. Phn mm ny c tch hp trong TIA

Portal 11 ca Siemens.

-Vy lm mt d n vi S7-1200 ch cn ci TIA Portal v phn mm ny

bao gm c mi trng lp trnh cho PLC v thit k giao din HMI

1.2. Cc module trong h PLC S7-1200

1.2.1. Gii thiu v cc module CPU

Cc module CPU khc nhau c hnh dng, chc nng, tc x l lnh, b nh

chng trnh khc nhau.

PLC S7-1200 c cc loi sau:

1.2.2. Sign board ca PLC SIMATIC S7-1200

Sign board: SB1223 DC/DC

-Digital inputs / outputs

-DI 2 x 24 VDC 0.5A

-DO 2x24 VDC 0.5A

Sign boards : SB1232AQ

- Ng ra analog

-AO 1 x 12bit

-+/- 10VDC, 0 20mA

Cards ng dng:

-CPU tn hiu thch ng vi cc ng dng

-Thm im ca k thut s I/O hoc tng t vi CPU nh cc yu cu ng dng

-Kch thc ca CPU s khng thay i

1.2.3. Module xut nhp tn hiu s

1.2.4. Module xut nhp tn hiu tng t

1.2.5. Module truyn thng

2. Lm vic vi phn mm Tia Portal

2.1. Gii thiu SIMATIC STEP 7 Basic tch hp lp trnh PLC v HMI

Step 7 basic h thng k thut ng b m bo hot ng lin tc hon ho.

Mt h thng k thut mi

Thng minh v trc quan cu hnh phn cng k thut v cu hnh mng, lp trnh,

chn on v nhiu hn na.

Li ch vi ngi dng:

-Trc quan : d dng tm hiu v d dng hot ng

-Hiu qu : tc v k thut

-Chc nng bo v : Kin trc phn mm to thnh mt c s n nh cho s i

mi trong tng lai.

2.2. Kt ni qua giao thc TCP/IP

- lp trnh SIMATIC S7-1200 t PC hay Laptop cn mt kt ni TCP/IP

- PC v SIMATIC S7-1200 c th giao tip vi nhau, iu quan trng l cc a

ch IP ca c hai thit b phi ph hp vi nhau

2.3. Cch to mt Project

Bc 1: t mn hnh desktop nhp p chn biu tng Tia Portal V11

Bc 2 : Click chut vo Create new project to d n.

Bc 3 : Nhp tn d n vo Project name sau nhn create

Bc 4 : Chn configure a device

Bc 5 : Chn add new device

Bc 6 : Chn loi CPU PLC sau chn add

Bc 7 : Project mi c hin ra

2.4. TAG ca PLC / TAG local

Tag ca PLC

-Phm vi ng dng : gi tr Tag c th c s dng mi khi chc nng trong PLC

-ng dng : binary I/O, Bits of memory

-nh ngha vng : Bng tag ca PLC

-Miu t : Tag PLC c i din bng du ngoc kp

Tag Local

-Phm vi ng dng : gi tr ch c ng dng trong khi c khai bo, m t

tng t c th c s dng trong cc khi khc nhau cho cc mc ch khc nhau.

-ng dng : tham s ca khi, d liu static ca khi, d liu tm thi

-nh ngha vng : khi giao din

-Miu t : Tag c i din bng du #

S dng Tag trong hot ng

-Layout : bng tag PLC cha cc nh ngha ca cc Tag v cc hng s c gi tr

trong CPU. Mt bng tag ca PLC c t ng to ra cho mi CPU c s dng

trong project.

-Colum : m t biu tng c th nhp vo di chuyn vo h thng hoc c th

ko nh nh mt lnh chng trnh

-Name : ch c khai bo v s dng mt ln trn CPU

-Data type : kiu d liu ch nh cho cc tag

-Address : a ch ca tag

-Retain : khai bo ca tag s c lu tr li

-Comment : comment miu t ca tag

Nhm tag : to nhm tag bng cch chn add new tag table

Tm v thay th tag PLC

Ngoi ra cn c mt s chc nng sau:

-Li tag

-Gim st tag ca plc

-Hin / n biu tng

-i tn tag : Rename tag

-i tn a ch tag : Rewire tag

-Copy tag t th vin Global

3. Lm vic vi mt trm PLC

3.1. Quy nh a ch IP cho module CPU

IP TOOL c th thay i IP address ca PLC S7-1200 bng 1 trong 2 cch.

Phng php thch hp c t ng xc nh bi trng thi ca a ch IP :

-Gn mt a ch IP ban u : Nu PLC S7-1200 khng c a ch IP, IP TOOL

s dng cc chc nng thit lp chnh cp pht mt a ch IP ban u cho PLC S7-

1200.

-Thay i a ch IP : nu a ch IP tn ti, cng c IP TOOL s sa i cu

hnh phn cng (HW config) ca PLC S7-1200.

3.2. chng trnh xung CPU

t mn hnh son tho chng trnh bng cch kch vo biu tng download

trn thanh cng c ca mn hnh

Chn cu hnh Type of the PG/PC interface v PG/PC interface nh hnh di

sau nhn chn load

Chn start all nh hnh v v nhn finish

3.3. Gim st v thc hin chng trnh

gim st chng trnh trn mn hnh son tho kch chn Monitor trn thanh

cng c.

Hoc cch 2 lm nh hnh di

Sau khi chn monitor chng trnh son tho xut hin nh sau:

4. K thut lp trnh

4.1. Vng qut chng trnh

PLC thc hin chng trnh theo chu trnh lp. Mi vng lp c gi l vng

qut. Mi vng qut c bt u bng giai on chuyn d liu t cc cng vo s

ti vng b m o I, tip theo l giai on thc hin chng trnh. Trong tng vng

qut chng trnh c thc hin t lnh u tin n lnh kt thc ca khi OB1.

Sau giai on thc hin chng trnh l giai on chuyn cc ni dng ca b m o

Q ti cc cng ra s. Vng qut kt thc bng giai on truyn thng ni b v kim

tra li.

Ch rng b m I v Q khng lin quan ti cc cng vo / ra tng t nn cc

lnh truy nhp cng tng t c thc hin trc tip vi cng vt l ch khng

thng qua b m.

4.2. Cu trc lp trnh

4.2.1. Khi t chc OB OGANIZATION BLOCKS

-Organization blocks (OBs) : l giao din gia hot ng h thng v chng

trnh ngi dng. Chng c gi ra bi h thng hot ng, v iu khin theo qu

trnh:

+X l chng trnh theo qu trnh

+Bo ng kim sot x l chng trnh

+X l li

-Startup oB, Cycle OB, Timing Error OB v Diagnosis OB : c th chn v lp

trnh cc khi ny trong cc project. Khng cn phi gn cc thng s cho chng v

cng khng cn gi chng trong chng trnh chnh.

-Process Alarm OB v Time Interrupt OB : Cc khi OB ny phi c tham s

ha khi a vo chng trnh. Ngoi ra, qu trnh bo ng OB c th c gn cho

mt s kin ti thi gian thc hin bng cch s dng cc lnh ATTACH, hoc tch

bit vi lnh DETACH.

-Time Delay Interrupt OB : OB ngt thi gian tr c th c a vo d n v

lp trnh. Ngoi ra, chng phi c gi trong chng trnh vi lnh SRT_DINT,

tham s l khng cn thit

-Start Information : Khi mt s OB c bt u, h iu hnh c ra thng tin

c thm nh trong chng trnh ngi dng, iu ny rt hu ch cho vic chn

on li, cho d thng tin c c ra c cung cp trong cc m t ca cc khi OB

4.2.2. Hm chc nng FUNCTION

-Funtions (FCs) l cc khi m khng cn b nh. D liu ca cc bin tm thi

b mt sau khi FC c x l. Cc khi d liu ton cu c th c s dng lu

tr d liu FC.

-Functions c th c s dng vi mc ch

+Tr li gi tr cho hm chc nng c gi

+Thc hin cng ngh chc nng, v d : iu khin ring vi cc hot ng

nh phn

+Ngoi ra, FC c th c gi nhiu ln ti cc thi im khc nhau trong mt

chng trnh. iu ny to iu kin cho lp trnh chc nng lp i lp li phc tp.

-FB (function block) : i vi mi ln gi, FB cn mt khu vc nh. Khi mt FB

c gi, mt Data Block (DB) c gn vi instance DB. D liu trong Instance DB

sau truy cp vo cc bin ca FB. Cc khu vc b nh khc nhau c gn cho

mt FB nu n c gi ra nhiu ln.

-DB (data block) : DB thng cung cp b nh cho cc bin d liu . C hai

loi ca khi d liu DB : Global DBs ni m tt c cc OB, FB v FC c th c

c d liu lu tr, hoc c th t mnh ghi d liu vo DB, v instance DB c

gn cho mt FB nht nh.

5. Gii thiu cc tp lnh

5.1. Bit logic (tp lnh tip im)

1)tip im thng h

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D

Tip im thng h s ng khi gi tr ca

bit c a ch l n bng 1

Ton hng n: I, Q, M, L, D

2)tip im thng ng

L

A

D

Tip im thng ng s ng khi gi tr

ca bit c a ch n l 0

Ton hng n: I, Q, M, L, D

3)lnh OUT

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A

D

Gi tr ca bit c a ch l n s bng 1 khi u

vo ca lnh ny bng 1 v ngc li

Ton hng n : Q, M, L, D

Ch s dng mt lnh out cho 1 a ch

4)Lnh OUT o

L

A

D

Gi tr ca bit c a ch l n s bng 1 khi u

vo ca lnh ny bng 0 v ngc li

Ton hng n : Q, M, L, D

Ch s dng mt lnh out not cho 1 a ch

5)Lnh logic NOT

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Lnh o trng thi ng vo / ra

6)Lnh SET

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Gi tr ca cc bit c a ch l n s bng

1 khi u vo ca lnh ny bng 1 Khi u

vo ca lnh bng 0 th bit ny vn gi

nguyn trng thi.

Ton hng n: Q, M, L, D

7)lnh Reset

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Gi tr ca cc bit c a ch l n s bng

0 khi u vo ca lnh ny bng 1. Khi u

vo ca lnh bng 0 th cc bit ny vn

gi nguyn trng thi.

Ton hng n: Q, M, L, D

8)Lnh set nhiu bit

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Gi tr ca cc bit c a ch u tin l

OUT s bng 1 khi u vo ca lnh ny

bng 1 Khi u vo ca lnh bng 0 th

cc bit ny vn gi nguyn trng thi.

Trong s bit l gi tr ca n

Ton hng OUT: Q, M, L, D

n : l hng s

9)lnh reset nhiu bit

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Gi tr ca cc bit c a ch u tin l

OUT s bng 0 khi u vo ca lnh ny

bng 1 Khi u vo ca lnh bng 0 th

cc bit ny vn gi nguyn trng thi.

Trong s bit l gi tr ca n

Ton hng OUT: Q, M, L, D

n : l hng s

10)Tip im pht hin xung cnh ln dng 1

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Tip im pht hin cnh ln s pht ra mt

xung khi u vo tip im P c s chuyn

i t mc thp ln mc cao

Trng thi ca tn hiu c lu li vo

M_BIT

rng ca xung ny bng thi gian ca

mt chu k qut.

11)Tip im pht hin xung cnh ln dng 2

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Thay i trng thi tn hiu pha trc khng

nh hng n IN

Pht hin s thay i trng thi ca 1 tn hiu

IN t 0 ln 1

Trng thi ca tn hiu IN c lu li vo

M_BIT

rng ca xung ny bng thi gian ca

mt chu k qut.

12)Tip im pht hin xung cnh xung dng 1

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Tip im pht hin cnh xung s pht ra

mt xung khi u vo tip im ny c s

chuyn i t mc cao xung mc thp

Trng thi ca tn hiu c lu li vo

M_BIT

rng ca xung ny bng thi gian ca

mt chu k qut.

13)tip im pht hin xung cnh xung dng 2

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Thay i trng thi tn hiu pha trc khng

nh hng n IN

Pht hin s thay i trng thi ca 1 tn hiu

IN t 1 xung 0

Trng thi ca tn hiu IN c lu li vo

M_BIT

rng ca xung ny bng thi gian ca

mt chu k qut.

14)lnh SR fliplop

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Mch cht RS u tin Reset

15)lnh RS fliplop

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Mch cht RS u tin Set

5.2. S dng b Timer

S dng lnh Timer to mt chng trnh tr nh thi. S lng ca Timer

ph thuc vo ngi s dng v s lng vng nh ca CPU. Mi timer s dng 16

byte IEC_Timer d liu kiu cu trc DB. Step 7 t ng to khi DB khi ly khi

Timer

Kch thc v tm ca kiu d liu Time l 32 bit, lu tr nh l d liu Dint :

T#-14d_20h_31m_23s_648ms n T#24d_20h_31m_23s_647ms hay l -

2.147.483.648 ms n 2.147.483.647 ms.

1)Timer to xung - TP

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Timer TP to mt chui xung vi rng xung

t trc. Thay i PT, IN khng nh hng khi

Timer ang chy.

Khi u vo IN c tc ng vo timer s to ra

mt xung c rng bng thi gian t PT

2)Timer tr sn ln c nh - Timer TONR

L

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Thay i PT khng nh hng khi Timer ang vn

hnh, ch nh hng khi timer m li

Khi ng vo IN chuyn sang FALSE khi vn hnh th

timer s dng nhng khng t li b nh th. Khi

chn IN TRUE tr li th Timer bt u tnh thi gian

t gi tr thi gian tch ly.

3)timer tr khng nh - TON

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Khi ng vo IN ngng tc ng th reset v dng

hot ng Timer.

Thay i PT khi Timer vn hnh khng c nh

hng g

4)timer tr sn xung TOF

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Khi ng vo IN ngng tc ng th reset v dng

hot ng Timer.

Thay i PT khi Timer vn hnh khng c nh hng

g

5.3. S dng b Counter

Lnh Counter c dng m cc s kin ngoi hay cc s kin qu trnh

trong PLC. Mi Counter s dng cu trc lu tr ca khi d liu DB lm d liu

ca Counter. Step 7 t ng to khi DB khi ly lnh.

Tm gi tr m ph thuc vo kiu d liu m bn chn la. Nu gi tr m l

mt s Interger khng du, c th m xung ti 0 hoc m ln ti tm gii hn. Nu

gi tr m l mt s interder c du, c th m ti gi tr m gii hn hoc m ln

ti mt s dng gii hn.

1)Counter m ln - CTU

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Gi tr b m CV c tng ln 1 khi tn hiu

ng vo CU chuyn t 0 ln 1. Ng ra Q c tc

ng ln 1 khi CV>=PV. Nu trng thi R = Reset

c tc ng th b m CV = 0.

2)Counter m xung CTD

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Gi tr b m c gim 1 khi tn hiu ng vo CD

chuyn t 0 ln 1. Ng ra Q c tc ng ln 1 khi

CV =PV. Nu trng thi R =

Reset c tc ng th b m CV = 0.

Gi tr b m CV c gim 1 khi tn hiu ng

vo CD chuyn t 0 ln 1. Ng ra QD c tc

ng ln 1 khi CV

5.4. So snh

1)Lnh so snh

So snh 2 kiu d liu ging nhau, nu lnh so snh tha th ng ra s l mc 1 =

TRUE

Kiu d liu so snh l : SInt, Int, Dint, USInt, UDInt, Real, LReal, String, Char,

Time, DTL, Constant.

L

A

D

Lnh so snh dng so snh hai gi tr IN1 v IN2

bao gm IN1 = IN2, IN1 >= IN2, IN1 IN2 hoc IN1 IN2

So snh 2 kiu d liu ging nhau, nu lnh so snh

tha th ng ra s l mc 1 = TRUE (tc ng mc

cao) v ngc li

Kiu d liu so snh l : SInt, Int, Dint, USInt,

UDInt, Real, LReal, String, Char, Time, DTL,

Constant.

2)Lnh trong khong In range

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Tham s : MIN, VAL, MAX

Kiu d liu so snh : SInt, Int, Dint, USInt, UInt,

UDInt, Real, LReal, Constant

So snh 2 kiu d liu ging nhau, nu so snh

MIN

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Tham s : MIN, VAL, MAX

Kiu d liu so snh : SInt, Int, Dint, USInt, UInt,

UDInt, Real, LReal, Constant

So snh 2 kiu d liu ging nhau, nu so snh MIN

> VAL hoc MAX < VAL tha th tc ng mc

cao v ngc li

4)Lnh OK

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Tham s : IN

Kiu d liu : Real, LReal

Lnh OK kim tra tnh hp l ca ton t

5)Lnh NOT OK

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Tham s : IN

Kiu d liu : Real, LReal

Lnh NOT_OK kim tra tnh khng hp l ca ton

t

5.5. Ton hc

1)Lnh tnh ton

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Cng dng : thc hin php ton t cc gi tr

ng vo IN1, IN2, IN(n) theo cng thc

OUT=(+,-,*,/) ri xut kt qu ra ng ra

OUT.

Cc thng s ng vo dng trong khi phi

chung nh dng

2)Lnh cng, tr, nhn, chia

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Lnh cng ADD : OUT = IN1 + IN2

Lnh tr SUB : OUT = IN1 IN2

Lnh nhn MUL : OUT = IN1*IN2

Lnh chia DIV : OUT = IN1/IN2

Tham s IN1, IN2 phi cng kiu d liu : SInt, Int,

Dint, USInt, UInt, UDInt, Real, LReal, Constant

Tham s OUT c kiu d liu : SInt, Int, Dint,

USInt, UInt, UDInt, Real, LReal

Tham s ENO = 1 nu khng c li xy ra trong qu

trnh thc thi. Ngc li ENO = 0 khi c li, mt s

li xy ra khi thc hin lnh ny :

-Kt qu ton hc nm ngoi phm vi ca kiu d

liu.

-Chia cho 0 (IN2 = 0)

-Real/LReal : Nu mt trong nhng gi tr u vo

l NaN sau c tr v NaN.

-ADD Real/LReal : Nu c hai gi tr IN l INF c

du khc nhau, y l mt khai bo khng hp l v

c tr v NaN

-SUB Real/LReal : Nu c hai gi tr IN l INF cng

du, y l mt khai bo khng hp l v c tr

v NaN

-MUL Real/LReal : Nu mt trong 2 gi tr l 0

hoc l INF, y l khai bo khng hp l v c

tr v NaN.

-DIV Real/LReal : Nu c hai gi tr IN bng khng

hoc INF, y l khai bo khng hp l v c tr

v NaN.

3)Lnh ly phn d

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Lnh Modulo s ly phn d ca php ton. Gi tr

ng vo IN1 chia cho IN2 v gi tr phn d s

c lu vo OUT

Tham s:

EN : Bool

ENO : Bool

IN1 : SINT, INT, DINT, USINT, UINT, UDINT

IN2 : SINT, INT, DINT, USINT, UINT, UDINT

OUT : SINT, INT, DINT, USINT, UINT, UDINT

4)Lnh ph nh

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D

Lnh NEG o ngc du hiu s hc ca gi tr

trong tham s v lu tr cc kt qu trong tham s

OUT

Tham s :

EN : Bool cho php ng vo

ENO: Bool cho php ng ra

-ENO = 1 : khng c li

-ENO = 0: kt qu gi tr nm ngoi tm gi tr ca

kiu d liu

IN : ton t u vo SInt, INt, Dint, Real, LReal,

Constant

OUT : ton t u ra Sint, Int, Dint, Real, LReal

5)Lnh tng, gim

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Tng / gim gi tr kiu s Interger ln / xung mt

n v

Tham s :

EN : cho php ng vo

IN/OUT : ton t ng vo v ra

ENO : cho php ng ra

-ENO = 1 : khng c li

-ENO = 0: kt qu nm ngoi tm gi tr ca kiu d

liu

6)Lnh gi tr tuyt i

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Tinh gi tr tuyt i ca mt s nguyn hoc s

thc ca tham s IN v lu tr kt qu vo tham

s OUT

Tham s :

EN : cho php ng vo

IN : Ton t ng vo

OUT : Ton t ng ra

ENO : Cho php ng ra

7)Lnh gi tr nh nht v ln nht

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Lnh MIN/MAX so snh cc gi tr u vo v tr

li gi tr nh nht/ ln nht u ra

Tham s :

EN : cho php ng vo

IN : Ton t u vo, c th ln ti 32 u vo

OUT : Ton t ng ra

ENO : cho php ng ra

8)Lnh gii hn

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Cng dng : Gii hn gi tr ca ng vo IN trong

khong ca ng vo MIN v MAX. Nu gi tr ca

IN p ng MIN < IN MAX th gi tr ca MAX c

copy vo OUT

Lnh ch c thc hin khi tn hiu ng vo l 1 ti

ng vo EN, Nu lnh c thc hin m khng c

li xy ra th ti ng ra ENO cng c gi tr bng 1.

Ng ra ENO c trng thi 0 nu 1 trong s cc iu

kin sau y khng tha mn :

-Ng vo EN c tn hiu 0

-Cc thng s nhp vo khng ng nh dng

-Cc ton hng khng ng gi tr

-Gi tr Min ln hn gi tr Max

9)Lnh ton hc s thc du chm ng

5.6. Di chuyn MOVE

1)Lnh MOVE

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Lnh Move di chuyn ni dung ng vo IN n

ng ra OUT m khng lm thay i gi tr ng IN

Tham s:

EN : cho php ng vo

ENO : cho php ng ra

IN : ngun gi tr n

OUT1: Ni chuyn n

Lnh Move_BLK sao chp cc ni dung ca mt

vng nh IN n mt b nh xc nh khc. S

lng cc gi tr c sao chp c quy nh

trong COUNT. Hot ng sao chp theo hng

tng dn cc a ch

Tham s:

EN : cho php ng vo

ENO : cho php ng ra

IN : ngun gi tr n

COUNT : s gi tr sao chp

OUT1: Ni chuyn n

2)Lnh lm y FILL

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Cng dng : dng lp y mt vng nh vi ni

dung ti mt vng nh khc. Lnh Fill block di

chuyn ni dung ca mt vng nh ti mt vng

nh xc nh. Hnh ng vn chuyn cc bin sao

chp theo hng tng dn

3)Lnh o Swap

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Cng dng : i th t ca 2 byte hay 4 byte thnh

phn ca mt Word hay mt Dword. N khng lm

i th t ca cc bit trong mi byte

5.7. Chuyn i

1)Lnh CONV

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Cng dng : chuyn i t kiu d liu ny sang

kiu d liu khc

Tham s :

IN : gi tr ng vo

OUT : gi tr sau khi chuyn i

2)Lnh lm trn ROUND v ct b TRUNCATE

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Lnh ROUND : Chuyn i s thc thnh s

Interger. Cc phn phn s ca s thc c lm

trn n s nguyn gn nht. Nu s thc nm

gia 2 s nguyn th s thc ny c lm trn

thnh s nguyn chn. V d ROUND (10.5) = 10,

ROUND (11.5) = 12.

Lnh TRUNC : chuyn i s thc thnh s

interger. Phn phn s ca s thc b ct b

3)Lnh CEILING v FLOOR

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Lnh CEIL : chuyn i s thc thnh s nguyn

nh nht ln hn hay bng s thc

Lnh FLOOR : Chuyn i s thc thnh s

nguyn nh hn hya bng s thc .

5.8. Lnh iu khin chng trinh

1)Lnh nhy JUMP v nhn LABEL

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Cng dng : Dng chng trnh ang chy v tip

tc trn mt network khc, network ny c xc

nh bi 1 jump label.

2)Lnh iu khin thc thi RET

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D

Cng dng : dng vic thc thi trong mt khi

hm v ch c tip tc sau khi c lnh gi khi

hm .

3)Lnh Re trigger gim st qut chu k

L

A

D

Cng dng : Khi ng li vic gim st chu

k ca CPU. Thi gian gim st c cu hnh

trong phn cng. Vic khi ng li thi gian

gim st chu k ngn chn li.

4)Lnh ngng qut chu k

L

A

D

Cng dng : t PLC v ch STOP, do vy

ngng vic thc hin chng trnh

5)Lnh ly li GET ERROR

L

A

D

Cng dng : Truy vn cc li xy ra trong

mt khi

5.9. Ton t word logic

1)Lnh AND, OR v XOR

L

A

D

Cng dng :

-Lnh AND kt hp cc gi tr ng vo IN1 v IN2

theo cc bit tng ng theo php AND logic, xut

kt qu ti OUT

- Lnh OR kt hp cc gi tr ng vo IN1 v IN2

theo cc bit tng ng theo php OR logic, xut

kt qu ti OUT

- Lnh XOR kt hp cc gi tr ng vo IN1 v

IN2 theo cc bit tng ng theo php XOR logic,

xut kt qu ti OUT

2)Lnh o INVERT

L

A

D

Cng dng : o bit tn hiu ti ng vo IN. Gi tr

ca nhng bit ly b s c gi ti ng ra

3)Lnh SELECT, MULTIPLEX v DEMULTIPLEX

L

A

D

Cng dng :

-Lnh SEL : Da vo tn hiu ng vo G, lnh SEL

la chn ng vo IN1 hoc IN0 v di chuyn ni

dung ca n vo ng ra OUT.

+Nu G = 0 OUT = IN0

+Nu G = 1 OUT = IN1

-Lnh MUX : Sao chp ni dung ca mt ng vo

xc nh ti ng ra OUT. Nu gi tr ca tham s K

ln hn s ng vo hin hu th ni dung ca tham

s ELSE s c sao chp ti ng ra OUT

5.10. Dch chuyn v xoay vng

1)Lnh dch phi

L

A

D

Cng dng : Dch chuyn ni dung ca ton hng ti

ng vo IN theo tng bit sang bn phi v truy xut

kt qu ra ng ra OUT.

Thng s N xc nh s bit dch chuyn

2)Lnh dch tri

L

A

D

Cng dng : Dch chuyn ni dung ca ton hng ti

ng vo IN theo tng bit sang bn tri v truy xut

kt qu ra ng ra OUT.

Thng s N xc nh s bit dch chuyn

3)Lnh quay phi

L

A

D

Cng dng : Xoay ni dung ca mt ton hng ti

ng vo IN theo tng bit v hng bn phi v truy

xut ti ng ra OUT

Thng s N xc nh s bit dch chuyn

4)Lnh quay tri

L

A

D

Cng dng : Xoay ni dung ca mt ton hng ti

ng vo IN theo tng bit v hng bn tri v truy

xut ti ng ra OUT

Thng s N xc nh s bit dch chuyn