20110603 pfc senless eng 복구됨 - samsung us reserves the right to make changes in its products...

S3FM02G

PFC(Power Factor Correction) & PMSM Sensorless Control

Revision 1.00

June 2011

AApppplliiccaattiioonn NNoottee

2011 Samsung Electronics Co., Ltd. All rights reserved.

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Revision History

Revision No. Date Description Author(s)

V1.0 2011 06/15 Creation Woncheol Lee

List of Terms

Terms Descriptions

List of Acronyms

Acronyms Descriptions

S3FM02G_AN_REV 1.00 1 SYSTEM ANALYSIS

1-6

1 System Analysis

1.1 PFC System Theory

A conventional AC motor drive system consists of rectifier that converts the AC power to DC power and inverter that converts DC power to VVVF(Variable Voltage and Variable Frequency) AC power. In conversion process, AC to DC conversion is performed by a circuit composed of a diode rectifier and a bulk capacitor. The rectifier circuit does not cause phase differences of input AC voltage and current. But the input current is containing a lot of harmonics. It is a too distorted peak current, so the motor drive system containing rectifier circuit has low PF(Power Factor). To eliminate harmonics in the input current the PFC(Power Factor Correction) is applied into the motor drive system. In typical AC power system distortion power factor is a measure of how much the harmonic distortion of a load current decreases the average power transferred to the load. The conventional PF is the ratio of the active power and apparent power, also it can be defined as the cosine of the angle between the current and the voltage. This power factor is also known as the DPF(Displacement Power Factor). So it is denoted by:

In expression (1), the conventional measurement of the power factor is relevant only for loads that are linear and the waveforms are purely sinusoidal. With the increase in non-linear loads, this definition of the power factor is not adequate. This is because the harmonics have an impact on the power factor. In fact, the DPF is a phase angle difference between voltage and current. This is a useful term, when the load is linear in the nature. However it is not a very meaningful term with non-linear loads such as inverter fed motor drive system, power supply, etc. In motor drive system containing rectifier circuit the phase angle difference is almost zero. So is to be maximum value "1", therefore PF should be almost 1. But real measuring PF is around 0.65 because of harmonic components of current. Thus, the THD(Total Harmonic Distortion) should also be considered while calculating power factor.

In expression (2), THD is the total harmonic distortion of the load current. This definition assumes that the voltage stays undistorted (sinusoidal, without harmonics). And the distortion power factor is the distortion component associated with the harmonic voltages and currents presents. It is defined as the ratio of the fundamental component of the AC current to the total effective current, and it describes how the harmonic distortion of a load

)1(coscos

rmsrms

rmsrms

IV

IV

powerApparent

powerActiveDPF

)(:

)(:

rmscurrentInputI

rmsvoltageInputV

rms

rms

)2(1

1 1

2

rms

rms

iI

I

THDfactorpowerdistortion

cos

)(:

)(:

1 rmscurrentinputofcomponentlFundamentaI

rmscurrentInputI

rms

rms


1-7

current decreases the average power transferred to the load. The result when multiplied with the displacement power factor (DPF) is the overall, true power factor or just power factor (PF):

In expression (3), if AC voltage and current are same phase angle and the fundamental component of current is dominant, PF will be close to unity power factor. Therefore PFC(Power Factor Correction) should be to control the current so that the current waveform is proportional to the voltage waveform(a sine wave). The purpose of making the power factor as close to unity (1) as possible is to make the load circuitry that is power factor corrected appear purely resistive (apparent power equal to real power). In this case, the voltage and current are in phase and the reactive power consumption is zero. This enables the most efficient delivery of electrical power from the power company to the consumer.

The PFC converter is a power electronic system that controls the amount of power drawn by a load in order to obtain a power factor as close as possible to unity power factor. To satisfy this purpose there are various solution such as semi-bridge type, buck type, buck-boost type, flyback type, etc. In the case of under few hundred watt power electronic system, boost type PFC converter is popular. Actually the boost type PFC converter is inserted between the bridge rectifier and the main input capacitors in this system. The boost type PFC converter is very simple topology and easy to control PF.

1.2 PFC Hardware Block

The hardware is designed to drive the 3-phase AC/BLDC motor. This application notes describes PFC uses with a 3 -phase SPMSM(Surface mounted Permanent Magnet Synchronous Motor).

Figure 1-1 shows the PFC control system block. In this figure, The input AC rms voltage is 220Vrms(60hz) and input voltage to the boost converter is the full-rectified AC voltage(Vrec). No EMI filtering is applied following the bridge rectifier, so the input voltage to the boost converter swings at twice frequency of input voltage from zero volts to the peak value of the AC input and back to zero.

In Figure 1-1, the input voltage(Vrec) is measured at AIN04 to generate the period of input voltage waveform. Also the output DC voltage(VDC_LINK) is filtered by bulky capacitor EC5, it is sampled at ADC input pin(AIN06), the input current waveform is measured at AIN05. FET power switch(Q1) is controlled by Tpwm0. The name of Individual part is same with the part name used in real system. The control of PFC converter is added input current control to output voltage control of boost converter.

)3(cos 11 rms

rms

rms

rms

I

I

I

IDPFPF


1-8

Figure 1-1 PFC Control System Block

1.3 PFC Control Block

Figure 1-2 shows the PFC control block diagram composed output voltage controller and input current controller. Voltage controller is implemented every voltage control period(1msec). The reference voltage of output DC-Link voltage(VDC_REF) is 350V, the user is able to set this reference value. But this value is limited by motor rated voltage used in this drive system. The value 'A' is calculated as the sum of its proportional value and integral value with difference between measured output voltage(VDC_REAL) and reference voltage(VDC_REF). The value 'B' is concluded as Sin Table value that is resolved by calculating length of zero crossing signal with input voltage (VREC). The sine table value is scaled by 0~16384 for fixed calculation. The value 'B' is used for IDC to synchronize with VREC. The value 'C' is filtered signal of VREC by LPF(Low Pass Filter) which bandwidth is 10[Hz]. It is RMS value of VREC.

The current reference calculation algorithm uses the values(A,B,C), calculated as A*B/C. Namely The IDC_REF is calculated as multiplication of the output value of voltage controller and phase angle of input voltage then, it divided by RMS voltage of input voltage. This input current reference is corrected during the period of current control(25usec, 40kHz).

The IPWM is calculated as the sum of its proportional value and integral value with difference between measured input current(IDC_REAL) and reference current(IDC_REF). The output of PFC controller is given by adding IPWM and IFF(Feed Forward component) that is a kind of disturbance. Because the performance of PI control is not enough to cover PFC control, when the zero crossing signal is around zero position. So when the feed forward component is added to the output of the current controller, we can get the more faster response. Thus obtained current control output will be the PWM counter value.


1-9

+

-

+

-

++

+-

+

Figure 1-2 PFC Control Block Diagram

Reference

Sangsun Kim, Enjeti, P.N., "Control of multiple single phase PFC modules with a single low-cost DSP" APEC '03. Eighteenth Annual IEEE ,Page(s): 375 - 381 vol.1

P. C. Todd, “UC3854 Controlled Power Factor Correction Circuit Design,” Application Note U-134, Unitrode Corporation/ Texas Instruments.

1.4 PMSM Sensor-Less System Theory

The motor control means a control action to control the rotor position using the encoder(or hall effect sensor) signal. This rotor position information is utilized to transformation of coordinate in the FOC(Field Orientation Control), and it is used for angular speed calculation by processing the encoder information.

The sensorless control in motor drive system means that all of the motor control algorithm does not use position sensor. Because the motor drive control in the specific condition overcomes restrictions placed on some applications that cannot mount position or speed sensors.

The sensorless control depends on the kind of motor and application. Therefore the motor drive designer should choose the appropriate sensorless control technique depending on the application. In this report, rotor flux estimation algorithm to utilize the most simple algorithm, Voltage Modeling algorithm, was applied to sensorless FOC.

Figure 1-3 shows sensorless FOC block diagram applied to this drive system. This block is composed of the flux observer and PLL(Phase Locked Loop). The flux observer estimates the position of the rotor flux linkage by utilizing the voltage and current information of motor The PLL converges rotor position and angular speed by utilizing the estimated the rotor flux linkage.


1-10

**, sqs

sds VV

sqs

sds ii ,

sqs

sds ,

r

Figure 1-3 Sensorless Control Block Diagram

1.5 PMSM Sensor-Less Control Block

First of all, the description of the flux observer is important. The stator flux linkage on the stationary reference frame is given by :

These equations are expressed as the stator flux linkage on the synchronous rotating reference frame in equation (5) and (6). The results are given by :

In equation (5) and (6), R means rotating coordination transformation.

The rotor flux linkage on the synchronous rotating reference frame is given by :

As a result, the rotor flux linkages on the stationary frame are given by :

)4(

)3(

0

0

T s

qsss

qssqs

T sdss

sds

sds

diRV

diRV

)6(*

)5(*

sds

eqs

sds

eds

R

R

)8(

)7(

eqsqs

eqs

eqr

edsds

eds

edr

iL

iL

)10(sin

)9(cos1

1

feqr

sqr

fedr

sdr

R

R


1-11

By using equation (9) and (10), the estimated position of the rotor flux is given by :

The equations are expressed as the block diagram in figure 1-4.

sR

ssV

s

1

sL

ssi

ss

sr

Figure 1-4 Open Loop Flux Observer Block Diagram

The figure 1-4 shows the flux observer part in figure 1-3. But the flux observer in figure 1-4 is basically open loop control scheme. So the open loop observer always contains errors. The closed loop flux observer consequently is suggested in figure 1-5.

sRssV

s

1

sL

ssi

ss

)(

R

)(

R

sr

1)(

Rs

kk i

p 1)(

R

*er

*sr

sr

Figure 1-5 Close Loop Flux Observer Block Diagram

The figure 1-6 shows the closed loop flux observer reduced conceptual block diagram in figure 1-5.

)11(tan 1

sdr

sqr


1-12

s

1

sr

s

kk i

p

*sr

s

Vmr _

Figure 1-6 Close Loop Flux Observer Conceptual Block Diagram

The *sr is the command of flux observer,

s

vmr _ is the disturbance component and sr is the output of this

block diagram. In this block the

s

vmr _ is the estimated value from voltage block in figure 1-5. As you can see in

figure 1-6, the structure of block diagram is similar to typical PI controller. Consequently when the rotating

frequency(rotor speed) is located in the bandwidth of this controller, the output will follows the command *s

r . On

the other hand, when it exceeds the bandwidth, the output will be close to disturbance

s

vmr _. This bandwidth is

obtained as the gain calculation of PI control.

The output(회전자 지령 자속 추령 값

sr ) of the flux observer can be represented as the transfer function of

the command(회전자 지령 *s

r ) and disturbance(전압 모델 회전자 자속

s

vmr _). The result of the calculation is

given by :

The first term in the equation (12) is similar to transfer function of HPF(High Pass Filter), the second term is

similar to transfer function of BPF(Band Pass Filter). In other words, the *s

r will be dominant term in the low

frequency region,

s

vmr _ will be dominant in the high frequency region. In equation 12, the bandwidth

frequencies of these filters will be adjustable by using cutoff frequency. Therefore we can get various combination of filter design by calculating the gain of PI controller in figure 1-6. If you design the filter by using the consept of second order Butterworth filter. The gain of the controller is given by :

In equation (13) and (14) the c is the cutoff frequency of 2nd order Butterworth filter. The greater cutoff

)12(*2_2

2

sr

ip

ipsvmr

ip

sr KsKs

KsK

KsKs

s

)14(

)13(22

ci

cp

K

K


1-13

frequency, the flux estimation does not facilitate. The smaller cutoff frequency, the output of observer is heavily influenced by the noise contained in estimated rotator flux of voltage model. So we changed the cutoff frequency depending on the speed of rotor.

The PLL block in figure 1-3 can be expressed as the block diagram in figure 1-7. The estimated rotor position is calculated in the equation (11) by using estimated rotor flux. But the estimated position is sensitive value and contains a lot of noise component. Therefore it is necessary to compensate the estimation value by using PLL.

s

1*

flux

1tan

sqr

sdr ,

r

r

s

kkPLL i

p :

Figure 1-7 Phase Locked Loop Block Diagram

The position estimation calculated by the rotor flux estimated in the flux observer can be renamed as the *flux

. And it is given by :

The final estimated rotating speed of rotor flux

r is calculated by the PLL scheme using the 2nd Butterworth

filter, then the position of rotor flux estimation

is calculated by the integral of the estimated speed

r . The gains of the filter also is obtained by using equation (13) and (14). In summary, the sensroless scheme applied into this system estimated the rotor flux in the stationary frame by utilizing voltage command of inverter, measured current and estimated rotor position. And the estimated rotor flux was applied to calculating the rotor speed, finally the rotor position is obtained by integral of the rotor speed.

Reference

설승기, "전기기기제어론",홍릉과학출판사, Chapter 5~6

)15(tan 1*

sdr

sqr

flux

S3FM02G_AN_REV 1.00 2 HARDWARE IMPLEMENTATION

2-1

2 Hardware Implementation

2.1 Overview of Hardware Implementation

The figure 2-1 shows the total system block diagram.

Figure 2-1 Hardware Block

The single phase 220V 60Hz input voltage is fully rectified by DM1. The rectified voltage is sampled at ADC input pin AIN04. In this system, we can control the power factor using the rectified voltage and the combination of L1, Q1 and D5. The boosted voltage(DC link voltage) is filtered by EC5. The boosted voltage is sensed at ADC input pin AIN06. The input current is sensed at AIN06 with shunt register R11. The PFC current control feedback loop is accomplished by sensing the voltage across R11. The internal peripheral IMC1(Inverter Motor Control1) supplies the PWM pulses for IPM1(Intelligence Power Module1) for motor drive. The current for motor control is sensed with the shunt registers(RS1, RS2, RS3) located at lower side of IPM1. The encoder pulses are only used for monitoring. The SCI2 is activated for RS-232 communication used for PC monitoring. The SPI0 is activated to communicate to an external DAC(Digital Analog Converter) for analog waveform monitoring. The transferred


2-2

analog waveform information can be monitored through the oscilloscope. Using the GPIO, input state selection and output state with LED is used for monitoring. In this figure, blue and green line mean signal lines, the yellow box is the photo coupler for electrical isolation. The blue line is the primary side, the green line is the secondary side.

2.2 Voltage Sensing Circuit

The figure 2-2 shows the sensing part of rectified voltage(VREC) and DC link voltage(VDC_LINK). The VREC is renamed as Bridge_out in the schematic circuit, also the VDC_LINK is renamed as DC_LINK_P. In the figure 2-2, the DC_LINK_P is sensed through resister tree that the VDC_LINK of 450V is divided as 5V. The divided voltage is connected to AIN06(DC_BUS_MCU) through the LPF. When the Bridge_out voltage is 400V, the DC_input voltage will be 5V. The DC_input voltage is connected to AIN04(DC_input_MCU) through the LPF.

Figure 2-2 Voltage Sensing Circuit

2.3 Current Sensing Circuit

The current sensing circuit consist motor phase current sensing part of DC current sensing for PFC control.

C11103K 1

2

GND

DC_input

R24 1k,J,201212

R2049.9K,F,32161

2

R2249.9K,F,32161

2

R18499K,F,3216 1

2

R16499K,F,3216 1

2

R2614k,F,3216 1

2

Bridge_out

C12103K 1

2

GND

R25 1k,J,201212 DC_BUS

R2149.9K,F,32161

2

R2349.9K,F,32161

2

R19499K,F,3216 1

2

R17499K,F,3216 1

2

R2712.4k,F,3216 1

2

R29non,32161

2

R30non,32161

2

GNDGND

DC_LINK_P

+5V_A

GNDGND

D7KDR731S

21

3DC_input DC_input

C18472

12

R55 240,F,2012DC_input_MCU

GND

D6KDR731S

21

3

+5V_A

GND

C17472

12

DC_BUS DC_BUSR54 240,F,2012

DC_BUS_MCU


2-3

Figure 2-3 Motor Phase Current Sensing Circuit

The figure 2-3 shows the motor phase current sensing part. In this figure, N_U, N_V, N_W are the low side switch source port of IPM. The RS1, RS2, RS3 are shunt register for sensing the phase current. The shunt register is used as 0.039[ohm]. The sensed currents are individually amplified by three internal OPAMP. For example using U phase, The IU_OPAMP_N, IU_OPAMP_P, IU_OPAMP are mapped for internal OPAMP. The gain of the internal OPAMP is set for 7.09. When the phase current is range of +10[A]~-10[A], the amplified value will be +5[v]-0[v].

Figure 2-4 PFC DC Current Sensing Circuit

The figure 2-4 shows the PFC DC current sensing circuit. In this figure, to measure the DC current the shunt register(0.1[ohm]) is implemented in this system. And internal OPAMP is used for amplification of low voltage across the shunt register. The gain of OPAMP is 4.53 and when the DC current swings in the range of +13[A] ~ 0[A] the output of OPAMP swings from +5[V] to 0[V]. The output of OPAMP should be inverted in the source program, because the implemented OPAMP is inverting amplifier.

2.4 Intelligent Power Module Connection Circuit

The figure 2-5 shows the IPM connection circuit. The PWM signal generated in IMC(PWM_U_U, PWM_V_U, PWM_W_U, PWM_U_D, PWM_V_D, PWM_W_D) is modulated as SVPWM and is connected in IPM1. The U, V, W mean the motor phase current line, the phase current is sensed at the shunt register RS1, RS2, RS3. The RTS1 is the over current detection shunt register for IPM fault detection. The implemented IPM is the PS2194-4S of Mitsubishi.

* RS1

NPR2_0.039

12

100[W]_NPR2_R0.039_200[mV] : 5.13[A]

* RS2

NPR2_0.039

12

* RS3

NPR2_0.039

12

NU

NWNV

N_UVW

N_UN_VN_W

N_UVW

IU_OPAMP_P

N_UVW

N_U

IU_OPAMP

R315.1k,F,2012

R30240,F,2012

NU

IU_OPAMP_N

R3468k,F,2012

IU_OPAMP_P

+5V_A

D2KDR731S

21

3

GNDGND

C9472

12

+5V_A

IU_MCU

*

R11

BPR58/0.1ohm

1 2

PFC_Current_Sen GND

PFC_Current_Sen

PFC_CurrentGND PFC_OPAMPPFC_OPAMP_P

R38240,F,2012

R3917.4k,F,2012 R41

68k,F,2012

GNDGND

D4KDR731S

21

3

+5V_A

C12472

12

+5V_A


2-4

Figure 22-5 Intelligent Power Module Connection Circuit

2.5 +15[V] Boost Circuit for Switch Gate Drive

The power source(+5[V]) of control board is regulated on SMPS that the input source is AC 220[V]. Also the +15[V] source is necessary to establish the power sources of IPM and gate drive circuit in the FET switch(Q1). Therefore, the +15[V] power source is established by the switching regulator( MC33063A) with the input control power source(5[V]). The figure 2-6 shows the boost converter that the input is 5[V] and the output is 15[V].

Figure 2-6 +15[V] Boost Circuit

PWM_U_UR4 0,J,2012 1 2PWM_U_U

PWM_V_UR5 0,J,2012 1 2PWM_V_U

IPM1PS21964-4S

NC1

V_

UF

B2

V_V

FB

3V

_WF

B4

Up5

Vp6

Wp7

Vp_v cc8

Vnc9

Un10

Vn11

Wn12

Vn_v cc13

Fo14

CIN

15

Vnc16

NC17

NW18NV19NU20

W21

V22

U23

P24

NC25

PWM_W_U PWM_W_UR6 0,J,2012 1 2

R7 0,J,2012 1 2PWM_U_D PWM_U_DR8 0,J,2012 1 2PWM_V_D PWM_V_DR9 0,J,2012 1 2

* RS1

NPR2_0.039

12

100[W]_NPR2_R0.039_200[mV] : 5.13[A]

PWM_W_D PWM_W_D

* RS2

NPR2_0.039

12

* RS3NPR2_0.039

12

NU

NWNV

N_UVW

+15V

+15V

/IPM_FLT

V_W

FB

/IPM_FLT

V_

UF

BV

_VF

B

R102K,F,2012

12

C4102K

12

*

RTS1BPR58_0.068

1 2

GND

GND

100[W]_BPR58_R0.068_Amax:6.25 (Trip:7.05)[A]

N_UN_V

DC_link_P

N_W

N_UVW

VG_VFB

CQ1224K,630V_MDDSA2J224k(Hitachi AIC)

12

G_UFB U

G_WFB W

+5V

C13NON

1 2

C8 102K12

GND

SD1 KDR400S2 3

L2DSC-7850U-221M

1 2

GND

R12680,F,20121 2

R137.5K,F,20121 2

GND

+15V

+15V

U2

MC33063A/SO

COMP5

TCAP3

VCC6

DC8

PK7

SWC1

SWE2

R150.5ohm,R51, 6432

1 2


2-5

2.6 RS-232 Circuit for PC Monitoring

The figure 2-7 shows the monitoring circuit utilizing the RS-232 communication standard. The USART1_TX_1 , USART1_RX_1 are the transferred and received signal from MCU. In this figure, the photo-couplers are implemented for electrical isolation.

Figure 2-7 RS-212 Circuit

2.7 DAC Circuit for Analog Monitoring

The figure 2-8 shows the analog monitoring circuit with utilizing the internal peripheral SPI. The SSPCLK, SSPMOSI, SSPFSS signals are for SPI communication. Also the signal pins of SPI are isolated by photo-coupler. The isolated signals will be input signals in the DAC7554(12bits Digital to Analog Converter). The DAC generates the waveforms at VoutA~VoutD output pins by converting the digital signals from MCU with SPI format into analog signals that are analytical on the oscilloscope. The output level of DAC7554 swings from 0 to+5[V]. So for more identifiable waveforms, the output signals are amplified from +10[V] to -10[V] by the additional OPAMP(TL084).

USART_RX_1

USART_TX_1

+5V_DAC

232USART_TX_1

232USART_RX_1

GND

+5V

R75470, J, 2012

R741k, J, 2012

R77470, J, 2012

C25100

12

R761k, J, 2012

C26100

12

VCC

GND

PC16TLP115

1

2 345

VCC

GND

PC17TLP115

1

2345

GND_DAC

B39 1041 2

+5V_DAC

GND_DACGND_DAC

U7

3232_16pin

C1+1

V+2

C1-3

C2+4

C2-5

V-6

T2out7

R2in8

R2out9 T2in

10T1in

11

R1out12

R1in13T1out14

GND15

VCC16

232USART_RX_1232USART_TX_1

B37 1041 2

B38 1041 2

B40 1041 2

P1

9p_dsub/FEMALE/R-angle

594837261

+5V +5V_DAC

R781k, J, 2012R79

470, J, 2012C27100

12

SPICLKVCC

GND

PC18TLP115

1

2 345

R83470, J, 2012 SPIMOSI

R811k, J, 2012

C29100

12

VCC

GND

PC19TLP115

1

2 345

R86470, J, 2012 /SPI_EN

R851k, J, 2012

C32100

12

VCC

GND

PC20TLP115

1

2 345

SSPCLK SSPCLK

SSPM OSISSPMOSI

SSPFSSSSPFSS

GND_DAC

VoutA

VoutDVoutCVoutB

10MSOP(DGS)

U9

DAC7554

VoutA1

VoutB2

GND3

VoutC4

VoutD5

SCLK6

DIN7

VDD8

/SYNC9

REFIN10

+5V_DACGND_DAC

SPICLKSPIMOSI/SPI_EN


2-6

Figure 2-8 Analog Monitoring Circuit

2.8 Encoder Connection Circuit

The figure 2-9 shows the encoder connection circuit. The encoder type implemented in this system is Line Drive type, the Line Receiver is implemented by utilizing photo-coupler. The PHA, PHB, PHC signals are the input signal of internal peripheral ENC in the MCU. The encoder signals only are used for system monitoring.

Figure 2-9 Encoder Connection Circuit

2.9 Hall Sensor Connection Circuit

The figure 2-10 shows the hall sensor connection circuit. The hall signal type implemented in this system is Line Drive type, the Line Receiver is implemented by utilizing photo-coupler. The HU, HV, HW signals are the input signal of internal peripheral GPIO in the MCU. The encoder signals only are used for system monitoring.

2V_REF

VoutATP7CH1

-

+

U11A

TL084

3

21

411

TP9GNDGND(SLIK)

CH1(SLIK)

GND_DAC

-15V_DAC

+15V_DAC

C33 10012

R8920.5k, F, 2012

R87 82k, F, 2012

R90 10k, J, 2012

C36471

12

C20100

12

/ENCA

C21100

12

R56220, J, 2012

+5V

+5V

PHB

PHA

PHC

ENCA

/ENCB

ENCB

/ENCC

ENCC

D8KDS226

23

+5V

D9KDS226

23

D11KDS226

23

VCC

GND

PC11TLP115

1

2 345

VCC

GND

PC12TLP115

1

2 345

VCC

GND

PS1TLP115

1

2 345

R59220, J, 2012

R62220, J, 2012

R571k, J, 2012

R601k, J, 2012

R631k, J, 2012

R581k, J, 2012

R611k, J, 2012

R641k, J, 2012

GND

C19100

12

GND

GND


2-7

Figure 2-10 Hall Sensor Connection Circuit

GND

GND

C23100

12

GND

C24100

12

+5V

+5V

HW

HV

HUVCC

GND

PC13TLP115

1

2 345

VCC

GND

PC14TLP115

1

2 345

+5V

VCC

GND

PC15TLP115

1

2 345

/ENCV

ENCV

/ENCU

ENCU

D14KDS226

23

/ENCW

ENCW

D12KDS226

23

D13KDS226

23

R65220, J, 2012

R68220, J, 2012

R661k, J, 2012

R71220, J, 2012 R72

1k, J, 2012

R691k, J, 2012

R671k, J, 2012

R731k, J, 2012

R701k, J, 2012

C22100

12

S3FM02G_AN_REV 1.00 3 SOFTWARE IMPLEMENTATION

3-8

3 Software Implementation

3.1 Initialization Routine

The figure shows the flow chart after the Power On to Main Loop. In this figure, the Core Init performs setting related to the MCU clock. The System_Init deals with internal peripheral settings containing interrupt settings such as GPIO, DMA, IMC, OPAMP, ADC 12bit and ADC 10bit. In this system, the implemented real time interrupts are 4 interrupts. The priority #1 is the Timer0 interrupt to control PFC algorithm and to generate PWM in TPWM0 every 25[usec](40kHz switching). The priority #2 is the IMC_Zero interrupt for motor control is performed every 125[usec](8[kHz] switching). As well as motor control routine, additional control routine for PFC control are contained In IMC Zero interrupt routine. The third priority interrupt is Timer2 Period End interrupt to perform the motor speed control and DC Link voltage control for PFC. The 4th interrupt is Timer1 Period End interrupt to perform additional control needed for motor drive system such as speed command calculation. The Variable Init routine performs the variable defines and pre-calculation of various gain value for more efficiency. And ADC offset calculation is performed for ADC offset compensation containing H/W circuit.

Figure 3-1 Initialization Flow Chart


3-9

3.2 Main Routine

The figure 3-2 shows the Main Loop flow chart. After the initial routine, the Main Loop is infinitely proceeded as the following order in the figure 3-2. The LED Toggle represents the operating state. The Read IO performs the read action of IO state. The status Handling decides the operating status depending on the IO state. The Command Handling determines the corresponding operation mode depending on the operating state. The Wirte IO adjusts the output IO depending on the operating state and operation mode. The corresponding action is performed in the background infinitely.

Figure 3-2 Main Routine Flow Chart

3.3 Timer0 Period End Interrupt Routine (for PFC Current Control)

+

-

+

-

++

+-

+

Figure 1-2 PFC Control Block Diagram(for Reference)


3-10

The Timer0 generates the interrupt PWM counter value every 25[usec] period for PFC current control. In figure 1-2, the calculations related in the PFC control only represents as the black line. This interrupt routine calculates the current command for PFC current control and performs the PFC control using the calculated current command. The figure 3-3 shows the Timer0 Period End Interrupt routine flow chart. The boost voltage control in Timer2 is represented as the blue line. The RMS voltage calculation and Sin Table calculation updated every IMC1 interrupt period(125[usec]) is represented as green line.

Figure 3-3 Timer0 Period End Interrupt Routine Flow Chart


3-1

The example code for PFC control part in figure 3-3 are follows by :

pfc.F0I_I_DC_REF = (pfc.F7I_VDC_PWM_REF / (pfc.F4_ABS_VAC_IN_flt+1) * pfc.F14_VABS_SIN_TABLE ) >>17 ; pfc.F0I_I_DC_real = ((0xFFF - (CSP_ADC0_GET_CRR1(ADC0) & 0xFFF))<<3) - pfc.F0I_I_DC_offset;

pfc.F0I_I_DC_ERR = pfc.F0I_I_DC_REF - pfc.F0I_I_DC_real;

pfc.F16_I_Iterm += (pfc.F0I_I_DC_ERR * pfc.F16i_I_iGain);

pfc.F16_I_Pterm = pfc.F0I_I_DC_ERR * pfc.F16i_I_pGain;

pfc.F0_I_DC_PWM_REF = (pfc.F16_I_Pterm + pfc.F16_I_Iterm)>>16;

pfc.F0_I_FF = ((pfc.F4_V_DC_LINK_REF - (pfc.F10_ABS_VAC_IN>>6)) * MAX_PFC_PWM_LIMIT) /

pfc.F4_V_DC_LINK_REF;

pfc.F0_I_DC_PWM_REF = pfc.F0_I_DC_PWM_REF + pfc.F0_I_FF;

3.4 IMC Zero Interrupt Routine (for Motor Current Control)

The IMC Zero interrupt is updated every 125[usec] period. The figure 3-4 shows the IMC Zero interrupt routine flow chart. The solid line means the calculation using the data in the previous step, on the other hand the dotted line means the calculation is independent on previous step. The blue line represents sensorless control part depending on figure 1-3. The following example code is implementation of sensorless control part in d-axis current.

pwm.F14_SIN_Value = est.F14_SIN_Est;

pwm.F14_COS_Value = est.F14_COS_Est;

est.F31_LAMdrs_ref = pwm.F14_COS_Value * est.F17_Ke ;

F31_temp = (est.F31_LAMdrs_ref - est.F31_LAMdrs);

est.F25_Edss = est.F25_Edss +

( (est.F13to8_Kp_Fst * ((F31_temp - est.F31_LAMdserr_old) >> 14)) >> (5-est.Kp_Fst_Shift) ) +

( (est.F16to8_Ki_Fst * (F31_temp >> 14)) >> (8-est.Ki_Fst_Shift) ) ;

est.F31_LAMdserr_old = F31_temp;

F14_temp = ( est.F25_Edss - (est.F25i_Rs_i * pwm.F0I_Idss) ) >> 11;

est.F17_LAMdss += ( F18_Tsamp_cc_div2 * (F14_temp + est.F14_Vdss + est.F14_Vdss_old << 1)) >> 16;

est.F14_Vdss = F14_temp;

est.F31_LAMdse = (pwm.F14_COS_Value * est.F17_LAMdss) + (pwm.F14_SIN_Value * est.F17_LAMqss);

est.F17_LAMdre = ( est.F31_LAMdse - (est.F31i_Ls_i * pwm.F0I_Idse) ) >> 14;

est.F31_LAMdrs = ((pwm.F14_COS_Value * est.F17_LAMdre) - (pwm.F14_SIN_Value * est.F17_LAMqre));

F16_temp = est.F16_Theta_flux - ( est.F16_Theta_est + ((F22_Tsamp_cc * est.F4_Wr_est)>>10) );

est.F4_Wr_est_integ += ( (est.F0_Ki_wr * F16_Tsamp_cc * (F16_temp>>16)) >>12) ;

est.F4_Wr_est = ( est.F0_Kp_wr * (F16_temp>>12) ) + est.F4_Wr_est_integ;

F16_temp = est.F16_Theta_est + ((F16_Tsamp_cc * est.F4_Wr_est)>>4);

est.F16_Theta_est = F16_temp;

est.F0S_Wrpm_est = ( (est.F4_Wr_est/610) * est.F12_rad2rpm_divPP)>>12;

est.F0S_Wrpm_est_LPF +=

((est.F0S_Wrpm_est+F0S_Wrpm_est_old-(est.F0S_Wrpm_est_LPF<<1))*lpf.F15_Alpha_EST_Speed ) >> 15;

F0S_Wrpm_est_old = est.F0S_Wrpm_est ;


3-1

Figure 3-4 IMC Zero Interrupt Routine Flow Chart


3-1

)_( REALSPDSPD

*dsei

pK

s

K i

*dseV

dsei

cK

pK

*qseV

qsei

s

K i

*qsei

Figure 3-5 Current Control Block

The red line block in figure 3-4 can be represented to block diagram in figure 3-5. The PI current control part in figure 3-5 is represented by following example codes.

pwm.F0I_Id_Err = pwm.F0I_Id_Ref - pwm.F0I_Idse;

pwm.F22_Vd_Integral += ( (pwm.F0I_Id_Err * pwm.F24i_I_iGain) >> 2);

F22_Vdse_Ref_tmp = pwm.F22_Vd_Integral + (pwm.F0I_Id_Err*pwm.F22i_I_pGain)

- ( ((pwm.F0I_Iqse * enc.F0_RPM_real) * pwm.F26i_I_cGain) >> 4) ;

pwm.F9_Vdse_Ref = F22_Vdse_Ref_tmp >> 13;

The green line block in figure 3-4 means calculation related to the PFC control in figure 1-2. As mentioned before, these blocks represent the RMS voltage calculation block and zero crossing detection block for phase matching between input voltage and current

3.5 Timer2 Period End Interrupt Routine (for Motor Speed Control & DC link Voltage Control)

The Timer2 Period End interrupt routine will be updated every period and it jumps to service routine for motor speed control. In addition, it contains voltage control for boosting DC link voltage. The figure 3-6 shows the Timer2 Period End interrupt routine flow chart. When the Timer2 interrupt is activated motor speed calculated by M/T method for monitoring. The real motor speed is estimated by sensroless control block in figure 3-4.


3-2

Figure 3-6 Timer2 Period End Interrupt Routine Flow Chart

The figure shows the speed control block. It is implemented by IP controller with anti-windup gain.

s

K i

pK

aK

*SPD

)_( REALSPDSPD

*qi

Figure 3-7 Speed Control Block


3-3

The IP speed control part with anti-windup gain in figure 3-7 is represented by following example codes.

enc.F0S_RPM_err = enc.F0S_RPM_ref - enc.F0S_RPM_LPF_enc;

enc.F13S_Spd_Integral +=

(((enc.F0S_RPM_err<<4) - (enc.F4Si_S_aGain *F0I_IqRef_Anti)) * enc.F24_S_iGain ) >> 15;

F0I_IqRef_tmp =

((((enc.F0S_RPM_err << 13) + enc.F13S_Spd_Integral) >> 9 ) * enc.F12sI_S_pGain ) >> 16 ;

F0I_IqRef_tmp2 = F0I_IqRef_tmp;

if(F0I_IqRef_tmp2 > (pwm.F0I_Iq_Ref_Lim)){F0I_IqRef_tmp2 = pwm.F0I_Iq_Ref_Lim;}

else if(F0I_IqRef_tmp2 < -(pwm.F0I_Iq_Ref_Lim)){F0I_IqRef_tmp2 = -(pwm.F0I_Iq_Ref_Lim);}

F0I_IqRef_Anti = F0I_IqRef_tmp - F0I_IqRef_tmp2;

pwm.F0I_Iq_Ref = F0I_IqRef_tmp2;

The blue line block in figure 3-6 represents voltage control for PFC control. It is matched for the blue line in figure 1-2. The voltage output obtained in this block will be used for the input command PFC current controller. The voltage control part in figure 3-6 is represented by following example codes.

pfc.F4_V_DC_LINK_ERR = pfc.F4_V_DC_LINK_REF - pwm.F4_DC_link_LPF;

pfc.F4_V_Iterm += ((pfc.F4_V_DC_LINK_ERR * pfc.F10_V_DC_iGain) >>10);

pfc.F4_V_Pterm = (pfc.F4_V_DC_LINK_ERR * pfc.F10_V_DC_pGain) >>10 ;

pfc.F4_V_DC_PWM_REF = pfc.F4_V_Pterm + pfc.F4_V_Iterm;

S3FM02G_AN_REV 1.00 4 APPLICATION SETUP

4-4

4 Application Setup

4.1 Introduction

This application exercises control of SPMSM sensroless control with flux observer using the S3FM02G.

4.2 Warning

This application operates in an environment that includes dangerous voltages and rotating machinery. Be aware that the power stage and control board are not electrically isolated from the mains voltage - they are live with risk of electric shock when touched. But photo-coupler was used at human interfaces(ON/OFF switch, Speed UP/DOWN button, Fault Reset button, Mode change button, LED interface) and external interfaces(encoder interface, USART interface, SSP interface) for safety.

When you check the waveform of DAC output, you need not an isolation transformer for AC side. But An isolation transformer should be used when you use oscilloscope operating with AC power ground. If an isolation transformer is not used, power stage grounds and oscilloscope grounds are at different potentials, unless the oscilloscope is floating. Note that probe grounds and, therefore, the case of a floated oscilloscope are subjected to dangerous voltages. The user should be aware that:

• Before moving scope probes, making connections, etc., it is generally advisable to power down the high-voltage supply.

• To avoid inadvertently touching live parts, use plastic covers.

• When high voltage is applied, using only one hand for operating the test setup minimizes the possibility of electrical shock.

• Operation in lab setups that have grounded tables and/or chairs should be avoided.

• Wearing safety glasses, avoiding ties, name tags and jewelry, using shields,and operation by personnel trained in high-voltage lab techniques are also advisable.

• Power FET, the PFC coil, and the motor can reach temperatures hot enough to cause burns.

When powering down; due to storage in the bus capacitors, dangerous voltages are present until the power-on LED is off.

4.3 Application Outline

The system is designed to drive 3-pahse Surface mounted Permanent Magnet Synchronous Motor. The application has the following specifications:

• PMSM sensorless vector control

• 110 or 230V AC Supply


4-5

• Targeted for S3FM02G motor control board

• Running on 3-phase PMSM at 180V, 3-Phase AC High-Voltage Power Stage

• Speed control loop(speed up/down)

• Minimum speed of 250, 400, or 300 rpm

• Maximum speed of 3000 rpm

• Manual interface (PWM ON/OFF switch, UP/DOWN push buttons control, LED indication for status)

• Over-voltage, under-voltage, over-current and over-heating fault protection

• Hardware fault detection

• Analog waveform monitoring with Oscilloscope(External DAC output)

4.4 Application Description

This application performs a sensorless control of the SPMSM with PFC on the S3FM02G MCU. In the application, the IMC module is set to independent mode with a 8kHz switching frequency for motor drive, the timer module is set to independent mode (TPWM) with a 40kHz switching frequency for PFC converter. The quadrature siganls and hall signals are individually read from the Input register of the Encoder and GPIO. This PMSM Motor Control Application can operate in two modes:

1. Variable speed reference mode

The motor drive is controlled by RUN/STOP(PWM enable/disable) switch(SW 3). The motor speed is set by the UP(SW 4) and DOWN(SW 6) push buttons.

If the motor operation is disabled, the LED2 will be toggled. The READY S/W(SW2) will eliminate the operation disable state. When motor operation is enabled, the LED3 will be toggled. Refer to Table 4-1 for motor drive system states.

2. Programmed speed reference mode

The speed reference repeats the CW/CCW trapezoidal reference periodically. The start of motor spinning is operated by open-loop control. When the motor speed arrived at mode change speed, the control mode will be change to sensorless control mode.

The operation mode can be changed by push button(SW7) in Figure 4-1. The SW7 is only acceptable in Ready state.

Table 4- 1 Motor drive system state

System state Motor state LED state

Ready Stopped and PWM OFF LED 5 ON

Running Open-loop control and PWM ON LED 5 ON, LED 3 Toggled

Running Sensorless Vector control and PWM ON LED 5 On, LED 3 Toggled, LED 4 Toggled

Fault Stop LED 2 Toggled


4-6

Figure 4- 1 The swiches and LED at board

The sequence of sensorless control application consists of the following sequences:

1. The AC input power applied to board

- Check the Power LED (LED1) ON, the relay ON(sound), the state LED5 ON.(READY state)

2. The SW3 Turn On

- The PWM enable, motor spinning(variable speed reference of sensorless control mode)

- When the fault LED(LED2) is toggled(fault mode), push the SW2.(the fault elimination)

3. The speed Up/Down

- SW4 is speed reference up switch, SW6 is the speed reference down switch.

4. The SW3 Turn Off

- The PWM disable, motor stop

- Push the SW7, the operation mode will be changed(programmed speed reference mode of sensorless)

5. The SW3 Turn On

- The motor CW/CCW spinning(LED4 On-sensorless control)

- The open loop control(I/F control) under the 1500[rpm](LED4 Off)

6. The PFC is always activated.


4-7

4.5 Application Set-Up

Figure 4-2 illustrates the hardware set-up for the PFC and PMSM sensorless control application with Flux Estimation.

Figure 4- 2 Set up of the PFC and PMSM sensorless control application using S3FM02G

The system consists of the following components:

• PMSM HIGEN AC SERVO MOTOR FMA CN02-AB00(Encoder and Hall signal-Line drive output)

• S3FM02G Motor control board:

• IPM(Intelligent Power Module) power board

• Brake Set using the friction.

.

20110603 pfc senless eng 복구됨 - samsung us reserves the right to make changes in its products...

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