5Ãì o ã ªçt2 e|Êë òw·Úh §êa ¢ ?´0(©&sa Â«%Ôb;

To learn more about ON Semiconductor, please visit our website at www.onsemi.com

Please note: As part of the Fairchild Semiconductor integration, some of the Fairchild orderable part numbers will need to change in order to meet ON Semiconductor’s system requirements. Since the ON Semiconductor product management systems do not have the ability to manage part nomenclature that utilizes an underscore (_), the underscore (_) in the Fairchild part numbers will be changed to a dash (-). This document may contain device numbers with an underscore (_). Please check the ON Semiconductor website to verify the updated device numbers. The most current and up-to-date ordering information can be found at www.onsemi.com. Please email any questions regarding the system integration to [email protected].

Is Now Part of

ON Semiconductor and the ON Semiconductor logo are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent-Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.

http://www.onsemi.com

mailto:Fairchild_questions%40onsemi.com?subject=System%20Intergration

March 2016

FD

P51N

25 / FD

PF

51N25 —

N-C

han

nel U

niF

ET

TM

MO

SF

ET

©2008 Fairchild Semiconductor Corporation FDP51N25 / FDPF51N25 Rev. 1.8

www.fairchildsemi.com1

FDP51N25 / FDPF51N25 N-Channel UniFETTM MOSFET 250 V, 51 A, 60 mΩ

Features• RDS(on) = 48 mΩ (Typ.) @ VGS = 10 V, ID = 25.5 A

• Low Gate Charge (Typ. 55 nC)

• Low Crss (Typ. 63 pF)

Applications

• PDP TV

• Lighting

• Uninterruptible Power Supply

• AC-DC Power Supply

DescriptionUniFETTM MOSFET is Fairchild Semiconductor’s high voltage MOSFET family based on planar stripe and DMOS technology. This MOSFET is tailored to reduce on-state resistance, and to provide better switching performance and higher avalanche energy strength. This device family is suitable for switching power converter applications such as power factor correction (PFC), flat panel display (FPD) TV power, ATX and electronic lamp ballasts.

Absolute Maximum Ratings TC = 25°C unless otherwise noted.

*Drain current limited by maximum junction temperature.

Thermal Characteristics

Symbol ParameterFDP51N25

FDPF51N25 FDPF51N25YDTUFDPF51N25RDTU Unit

VDSS Drain-Source Voltage 250 V

ID Drain Current - Continuous (TC = 25°C)- Continuous (TC = 100°C)

5130

51*30*

AA

IDM Drain Current - Pulsed (Note 1) 204 204* A

VGSS Gate-Source voltage ± 30 V

EAS Single Pulsed Avalanche Energy (Note 2) 1111 mJ

IAR Avalanche Current (Note 1) 51 A

EAR Repetitive Avalanche Energy (Note 1) 32 mJ

VISO Insulation withstand voltage (RMS) from all three leads to external heat sink (t=0.3sec; TC = 25°C) N/A 2500 V

dv/dt Peak Diode Recovery dv/dt (Note 3) 4.5 V/ns

PD Power Dissipation (TC = 25°C)- Derate Above 25°C

3203.7

380.3

WW/°C

TJ, TSTG Operating and Storage Temperature Range -55 to +150 °C

TL Maximum Lead Temperature for Soldering,1/8” from Case for 5 Seconds

300 °C

Symbol ParameterFDP51N25

FDPF51N25FDPF51N25YDTUFDPF51N25RDTU Unit

RθJC Thermal Resistance, Junction-to-Case, Max. 0.39 3.3 °C/W

RθJA Thermal Resistance, Junction-to-Ambient, Max. 62.5 62.5 °C/W

GS

D

TO-220FY-formed

TO-220F

GDS

G

S

D

TO-220

GDS GS

D

TO-220FLG-formed

FD

P51N

25 / FD

PF

51N25 —

N-C

han

nel U

niF

ET

TM

MO

SF

ET



Package Marking and Ordering Information

Electrical Characteristics TC = 25°C unless otherwise noted.

Notes:

1. Repetitive rating: pulse-width limited by maximum junction temperature.

2. L = 0.68 mH, IAS = 51 A, VDD = 50 V, RG = 25 Ω, starting TJ = 25°C.

3. ISD ≤ 51 A, di/dt ≤ 200 A/μs, VDD ≤ BVDSS, starting TJ = 25°C.

4. Essentially independent of operating temperature typical characteristics.

Part Number Top Mark Package Packing Method Reel Size Tape Width Quantity

FDP51N25 FDP51N25 TO-220 Tube N/A N/A 50 units

FDPF51N25 FDPF51N25 TO-220F Tube N/A N/A 50 units

FDPF51N25YDTU FDPF51N25TO-220F

(Y-formed)Tube N/A N/A 50 units

FDPF51N25RDTU FDPF51N25TO-220F

(LG-formed)Tube N/A N/A 50 units

Symbol Parameter Conditions Min. Typ. Max. Unit

Off Characteristics

BVDSS Drain-Source Breakdown Voltage VGS = 0 V, ID = 250 μA, TJ = 25 °C 250 -- -- V

ΔBVDSS / ΔTJ

Breakdown Voltage Temperature Coefficient

ID = 250 μA, Referenced to 25°C -- 0.25 -- V/°C

IDSS Zero Gate Voltage Drain Current VDS = 250 V, VGS = 0 VVDS = 200 V, TC = 125°C

----

----

110

μAμA

IGSSF Gate-Body Leakage Current, Forward VGS = 30 V, VDS = 0 V -- -- 100 nA

IGSSR Gate-Body Leakage Current, Reverse VGS = -30 V, VDS = 0V -- -- -100 nA

On Characteristics

VGS(th) Gate Threshold Voltage VDS = VGS, ID = 250 μA 3.0 -- 5.0 V

RDS(on) Static Drain-SourceOn-Resistance

VGS = 10 V, ID = 25.5 A -- 0.048 0.060 Ω

gFS Forward Transconductance VDS = 40 V, ID = 25.5 A -- 43 -- S

Dynamic Characteristics

Ciss Input Capacitance VDS = 25 V, VGS = 0 V,f = 1 MHz

-- 2620 3410 pF

Coss Output Capacitance -- 530 690 pF

Crss Reverse Transfer Capacitance -- 63 90 pF

Switching Characteristics

td(on) Turn-On Delay Time VDD = 125 V, ID = 51 A,VGS = 10 V, RG = 25 Ω

(Note 4)

-- 62 135 ns

tr Turn-On Rise Time -- 465 940 ns

td(off) Turn-Off Delay Time -- 98 205 ns

tf Turn-Off Fall Time -- 130 270 ns

Qg Total Gate Charge VDS = 200 V, ID = 51 A,VGS = 10 V

(Note 4)

-- 55 70 nC

Qgs Gate-Source Charge -- 16 -- nC

Qgd Gate-Drain Charge -- 27 -- nC

Drain-Source Diode Characteristics and Maximum Ratings

IS Maximum Continuous Drain-Source Diode Forward Current -- -- 51 A

ISM Maximum Pulsed Drain-Source Diode Forward Current -- -- 204 A

VSD Drain-Source Diode Forward Voltage VGS = 0 V, IS = 51 A -- -- 1.4 V

trr Reverse Recovery Time VGS = 0 V, IS = 51 A,dIF/dt =100 A/μs

-- 178 -- ns

Qrr Reverse Recovery Charge -- 4.0 -- μC

FD

P51N

25 / FD

PF

51N25 —

N-C

han

nel U

niF

ET

TM

MO

SF

ET



Typical Performance Characteristics

Figure 1. On-Region Characteristics Figure 2. Transfer Characteristics

Figure 3. On-Resistance Variation vs. Figure 4. Body Diode Forward Voltage Drain Current and Gate Voltage Variation vs. Source Current

and Temperatue

Figure 5. Capacitance Characteristics Figure 6. Gate Charge Characteristics

10-1 100 101100

101

102

VGS

Top : 15.0 V 10.0 V

8.0 V 7.0 V 6.5 V 6.0 V

Bottom : 5.5 V

* Notes : 1. 250μs Pulse Test

2. TC = 25oC

I D,

Dra

in C

urre

nt [

A]

VDS

, Drain-Source Voltage [V]

2 4 6 8 10 12100

101

102

150oC

25oC

-55oC

* Notes :1. V

DS = 40V

2. 250μs Pulse Test

I D,

Dra

in C

urre

nt [

A]

VGS

, Gate-Source Voltage [V]

0 25 50 75 100 125 150

0.04

0.06

0.08

0.10

0.12

0.14

VGS

= 20V

VGS

= 10V

* Note : TJ = 25oC

RD

S(O

N) [

Ω],

Dra

in-S

ourc

e O

n-R

esis

tanc

e

ID, Drain Current [A]

0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8100

101

102

150oC

* Notes :1. V

GS = 0V

2. 250μs Pulse Test

25oC

I DR,

Rev

erse

Dra

in C

urre

nt [

A]

VSD

, Source-Drain voltage [V]

10-1 100 1010

2000

4000

6000C

iss = C

gs + C

gd (C

ds = shorted)

Coss

= Cds

+ Cgd

Crss

= Cgd

* Note ; 1. V

GS = 0 V

2. f = 1 MHzC

rss

Coss

Ciss

Cap

acita

nces

[pF

]

VDS


0 10 20 30 40 50 600

2

4

6

8

10

12

VDS

= 125V

VDS

= 50V

VDS

= 200V

* Note : ID = 51A

VG

S,

Gat

e-S

ourc

e V

olta

ge

[V]

QG, Total Gate Charge [nC]

FD

P51N

25 / FD

PF

51N25 —

N-C

han

nel U

niF

ET

TM

MO

SF

ET



Typical Performance Characteristics (Continued)

Figure 7. Breakdown Voltage Variation Figure 8. On-Resistance Variation vs. Temperature vs. Temperature

Figure 9-1. Maximum Safe Operating Area Figure 9-2. Maximum Safe Operating Area for FDP51N25 for FDPF51N25 / FDPF51N25YDTU

Figure 10. Maximum Drain Current vs. Case Temperature

-100 -50 0 50 100 150 2000.8

0.9

1.0

1.1

1.2

* Notes :1. V

GS = 0 V

2. ID = 250 μA

BV

DS

S,

(Nor

mal

ized

)

Dra

in-S

ourc

e B

reak

dow

n V

olta

ge

TJ, Junction Temperature [oC]

-100 -50 0 50 100 150 2000.0

0.5

1.0

1.5

2.0

2.5

3.0

* Notes :1. V

GS = 10 V

2. ID = 25.5 A

RD

S(O

N),

(Nor

ma

lized

)

Dra

in-S

ourc

e O

n-R

esis

tanc

e

TJ, Junction Temperature [oC]

100 101 10210-2

10-1

100

101

102

100 ms

1 ms

10 μs

DC

10 ms

100 μs

Operation in This Area is Limited by R

DS(on)

* Notes :

1. TC = 25 oC

2. TJ = 150 oC

3. Single Pulse

I D,

Dra

in C

urre

nt [

A]

VDS


100 101 10210-2

10-1

100

101

102

100 ms

1 ms

10 μs

DC

10 ms

100 μs

Operation in This Area is Limited by R

DS(on)

* Notes :

1. TC = 25 oC

2. TJ = 150 oC

3. Single Pulse

I D,

Dra

in C

urre

nt [

A]

VDS


25 50 75 100 125 1500

10

20

30

40

50

60

I D,

Dra

in C

urre

nt [

A]

TC, Case Temperature [oC]

FD

P51N

25 / FD

PF

51N25 —

N-C

han

nel U

niF

ET

TM

MO

SF

ET



Typical Performance Characteristics (Continued)

Figure 11-1. Transient Thermal Response Curve for FDP51N25

Figure 11-2. Transient Thermal Response Curve for FDPF51N25 / FDPF51N25YDTU

10-5

10-4

10-3

10-2

10-1

100

101

10-2

10-1

* Notes :

1. ZθJC

(t) = 0.39 0C/W Max.

2. Duty Factor, D=t1/t

2

3. TJM

- TC = P

DM * Z

θJC(t)single pulse

D=0.5

0.02

0.2

0.05

0.1

0.01

ZθJ

C(t

), T

herm

al R

espo

nse

t1, Square W ave Pulse Duration [sec]

t1

PDM

t2

ZθJ

C(t

), T

herm

al R

esp

onse

[oC

/W]

10-5 10-4 10-3 10-2 10-1 100 10110-2

10-1

100

* Notes :

1. ZθJC

(t) = 3.3 0C/W Max.

2. Duty Factor, D=t1/t

2

3. TJM

- TC = P

DM * Z

θJC(t)

single pulse

D=0.5

0.02

0.2

0.05

0.1

0.01

ZθJ

C(t

), T

herm

al R

espo

nse

t1, Square Wave Pulse Duration [sec]

t1

PDM

t2

ZθJ

C(t

), T

herm

al R

espo

nse

[oC

/W]

FD

P51N

25 / FD

PF

51N25 —

N-C

han

nel U

niF

ET

TM

MO

SF

ET



Figure 12. Gate Charge Test Circuit & Waveform

Figure 13. Resistive Switching Test Circuit & Waveforms

Figure 14. Unclamped Inductive Switching Test Circuit & Waveforms

VGS

VDS

10%

90%

td(on) tr

t on t off

td(off) tf

VDD

10V

VDS

RL

DUT

RG

VGS

VGS

VDS

10%

90%

td(on) tr

t on t off

td(off) tf

VDD

10V

VDS

RL

DUT

RG

VGS

VGS

Charge

VGS

10VQg

Qgs Qgd

3mA

VGS

DUT

VDS

300nF

50KΩ

200nF12V

Same Typeas DUT

Charge

VGS

10VQg

Qgs Qgd

3mA

VGS

DUT

VDS

300nF

50KΩ

200nF12V

Same Typeas DUT

EAS = L IAS2----

21 --------------------

BVDSS - VDD

BVDSS

VDD

VDS

BVDSS

t p

VDD

IAS

VDS (t)

ID (t)

Time

10V DUT

RG

L

I D

t p

EAS = L IAS2----

21

EAS = L IAS2----

21----21 --------------------

BVDSS - VDD

BVDSS

VDD

VDS

BVDSS

t p

VDD

IAS

VDS (t)

ID (t)

Time

10V DUT

RG

LL

I DI D

t p

VGSVGS

IG = const.

FD

P51N

25 / FD

PF

51N25 —

N-C

han

nel U

niF

ET

TM

MO

SF

ET



Figure 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT

VDS

+

_

DriverRG

Same Type as DUT

VGS • dv/dt controlled by RG

• ISD controlled by pulse period

VDD

LI SD

10VVGS

( Driver )

I SD

( DUT )

VDS

( DUT )

VDD

Body Diode

Forward Voltage Drop

VSD

IFM , Body Diode Forward Current

Body Diode Reverse Current

IRM

Body Diode Recovery dv/dt

di/dt

D =Gate Pulse Width

Gate Pulse Period--------------------------

DUT

VDS

+

_

DriverRG

Same Type as DUT

VGS • dv/dt controlled by RG

• ISD controlled by pulse period

VDD

LLI SD

10VVGS

( Driver )

I SD

( DUT )

VDS

( DUT )

VDD

Body Diode

Forward Voltage Drop

VSD

IFM , Body Diode Forward Current

Body Diode Reverse Current

IRM

Body Diode Recovery dv/dt

di/dt

D =Gate Pulse Width

Gate Pulse Period--------------------------D =Gate Pulse Width

Gate Pulse Period--------------------------

B4.904.50

3

3.403.20

3.283.08

B10.369.96

2.54 2.54

1.471.24

0.900.70

7.00

2.14

1

0.50 M A

A B2.662.42

B16.0715.67

0.70

6.886.48

1 X 45°

2.962.56

B0.600.45

B4.804.20

B8.507.50

R1.00

R1.00

B4.503.50

NOTES:

A. EXCEPT WHERE NOTED CONFORMS TO EIAJ SC91A.

B DOES NOT COMPLY EIAJ STD. VALUE. C. ALL DIMENSIONS ARE IN MILLIMETERS. D. DIMENSIONS ARE EXCLUSIVE OF BURRS,

MOLD FLASH AND TIE BAR PROTRUSIONS. E. DIMENSION AND TOLERANCE AS PER ASME

Y14.5-1994. F. DRAWING FILE NAME: TO220N03REV2

B4.904.50

16.0015.60

3.403.20

3.283.08

B10.369.96

1.471.24

0.900.70

2.54 2.54

7.00

2.14

1 3

0.50 M A

A B2.662.42

B16.0715.67

2.962.56

0.70

6.886.48

1 X 45°

B0.600.45

B10.009.00

B6.004.00

B10.459.45

R0.30

B 4.00 MIN

R0.30

NOTES:




Y14.5-1994. F. DRAWING FILE NAME: TO220Q03REV2

10.67

9.65

16.30

13.90

3.40

2.50

1.62

1.10

6.69

6.06

"A1"

4.70

4.00

2.85

2.10

0.60

0.36

14.04

12.70

Ø4.00

3.50

5°

3°

5°

3°

9.40

8.13

14.30

11.50

8.65

7.59

3 2 1

1 2 3

NOTES:

A) REFERENCE JEDEC, TO-220, VARIATION AB

B) ALL DIMENSIONS ARE IN MILLIMETERS.

C) DIMENSIONS COMMON TO ALL PACKAGE

SUPPLIERS EXCEPT WHERE NOTED [ ].

D) LOCATION OF MOLDED FEATURE MAY VARY

(LOWER LEFT CORNER, LOWER CENTER

AND CENTER OF THE PACKAGE)

E DOES NOT COMPLY JEDEC STANDARD VALUE.

F) "A1" DIMENSIONS AS BELOW:

SINGLE GAUGE = 0.51 - 0.61

DUAL GAUGE = 1.10 - 1.45

G) DRAWING FILE NAME: TO220B03REV9

H PRESENCE IS SUPPLIER DEPENDENT

I) SUPPLIER DEPENDENT MOLD LOCKING HOLES

IN HEATSINK.

C

16.51

15.42

[2.46]

SUPPLIER "A" PACKAGE

SHAPE

SUPPLIER "B" PACKAGE

SHAPE

1.00

0.55

SEE NOTE "F"

E

E

E

E

2.67

2.40

2.13

2.06

OPTIONAL

CHAMFER

1.62

1.42

H

IF PRESENT, SEE NOTE "D"

NOTE "I"

FRONT VIEWS

BOTTOM VIEW

BACK VIEW

SIDE VIEW

4.10

2.70

B4.904.50

16.0015.60

10.059.45

3.403.20

3.283.08

B10.369.96

1.471.24

0.900.70

0.450.25

30°

2.54 2.54

7.00

2.14

(3.23) B

1 3

SEE NOTE "F"

0.50 M A

A B2.662.42

B16.0715.67

2.962.56

B0.600.45

0.70

6.886.48

1 X 45°

SEE NOTE "F"

NOTES:




Y14.5-1994. F. OPTION 1 - WITH SUPPORT PIN HOLE. OPTION 2 - NO SUPPORT PIN HOLE. G. DRAWING FILE NAME: TO220M03REV5

www.onsemi.com1

ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patentcoverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein.ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liabilityarising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/orspecifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customerapplication by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are notdesigned, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classificationin a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorizedapplication, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, andexpenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if suchclaim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. Thisliterature is subject to all applicable copyright laws and is not for resale in any manner.

PUBLICATION ORDERING INFORMATIONN. American Technical Support: 800−282−9855 Toll FreeUSA/Canada

Europe, Middle East and Africa Technical Support:Phone: 421 33 790 2910

Japan Customer Focus CenterPhone: 81−3−5817−1050

www.onsemi.com

LITERATURE FULFILLMENT:Literature Distribution Center for ON Semiconductor19521 E. 32nd Pkwy, Aurora, Colorado 80011 USAPhone: 303−675−2175 or 800−344−3860 Toll Free USA/CanadaFax: 303−675−2176 or 800−344−3867 Toll Free USA/CanadaEmail: [email protected]

ON Semiconductor Website: www.onsemi.com

Order Literature: http://www.onsemi.com/orderlit

For additional information, please contact your localSales Representative

© Semiconductor Components Industries, LLC

http://www.onsemi.com/

www.onsemi.com/site/pdf/Patent-Marking.pdf

5Ãì o ã ªçt2 e|Êë òw·Úh §êa ¢ ?´0(©&sa Â«%Ôb;

Documents