address arithmetic in lisp...associative descriptor scheme 一 for the exploitation of address...
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lSE-TR一・80-19
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ASSOCIATIVE DESCRIPTOR SCHEME 一 FOR THE EXPLOITATION OF
ADDRESS ARITHMETIC iN LISP
by
Tetsuo lda
Kozo ltano
December 15 , 1980
Associative Descriptor Scheme 一 for the
exploitation of address arithmetic in Lisp
Tetsuo Ida★ and Kozo 工tano★★
★エnf。r血ati・n Science Lab・rat。ry
工nst:itute of Physical and Chemical Research
2-1, Hirosawa, Wako-shir Saitama 35Zr Japan
★★エnstitute・f lnf・rmati。n Science and Electr。nics
コU1}ユversity of Tsukuba
Sakura-mura, Niihari-gun, Zbaraki 305, Japan
一 1 一
Abstract
We present an associative descriptor scheme to take advan-
tage of address arithmetic in accessing lists and vectors. The
scheme employs an associative table for storing descriptors for
lists and ▽ectors. 工n parallel with each access to the struc-
ture with its base and index, the associative descriptor is
searched for the size of the structqre and hardware range check
is performed. This operation hence can be done with little or
no overhead . in accessing the structure. This scherne is stra-
ightforwardly applied to fast inqexed access to vectors and also
to fast random access’ of any list element when combined with
CDR-coding. This fact further suggests a method for uniform
handling of a lis七 and a ▽ector. 工mplemen’ヒation aspect of the
scherne using parallel hashing is also discussed.
Key Words and Phrases
コ ロLisp, archi七ecture f・r Lisp’range check haゆare’assoc■a七■▽e
memory, hashing
一一 2 一
1. 工ntroduction
Exploitation of address arithmetic capability Yo access a
word in linear structure has long been a common practise. :t
has been limited in Lisp en▽ironment二 due to the o▽erhead of
range check and to the storage s’ヒructure of a list・
’Array. feature’ does exist since the earliest impleraenta-
tion of Lisp [1], but a need for efficient irnplementation of
’indexed accesEl?A was fully recongnized only recently by develop-
ers of a Lisp-based large scale formula manipulation sys’ヒem [2]・
Along this line Fitch and Norman implemented Lisp in which vec一
七〇rs (one-dimensional arrays) play essen’ヒial role in speeding up.
’big-nurn’ @arithmetic [3]. Effor『ヒs ha▽e been made to establish a
vector as a basic and well-defined Standard data type in Lisp
[4] .
On the other hand, a technique.of accessing a random ele-
ment of a lis・ヒ was suggested, although not seriously considered
so far r in the researches on microprogrammed Lisp machines [5].
工n recen七 implelnentations of Lisp on such machinesr elements of
a list are arranged in adゴacent locations, where▽er possible, by
replacing the . link’ pointer (called CDR-link in Lisp) by a few
bit tag Eor economizing the stor’ ≠№?D [Phis rnethod r known as
* By ”indexed addressing (or access)” in this paper we rnean rnem-ory addressing (or access) by the address obtained frorn the ad-di・ヒion of head address of a linear contiguous area in‘ ’ヒ‡he ad-dress space and a positional positi▽e index from the head・ 工tdoes not necessarily imply ・ヒhe mode of addressing 5pecified inthe’ instruction words, as is often found in conventional com-pUter architecture.
一 3 一
’Halfword Lisp’ [6] or ’CDR-coding’[5], shows the possibility. of
use of indexed addressing セ。 obtain a random element of a list.
Keller also noted the possibil’ity of random access to the
linear structure of a list in the CDR-coding scheme [7]r bgt
discarding the CDR-coding scherne r proposed new data structures
tuple and conc; tuples for representing what is essentially a
fixed lin’ear list for taking advantage of indexed random access
and conc for avoiding long threaded list structures (or more po-
sitively exploiting the resulting strudture in parallel cornput-
ing) .
Observing the developments towards incorporating indexed
access eqpability to Lisp in the arena of software, we investi-
gate in this paper the issue of the indexed addressing from ar-
chitectural point of view. Because the inefficiency involved in
’ヒhe indexed access to eit二her lists or vectors is at・ヒibuted to
the range check of whe,ther the computed address is in the range
of ’ヒhe intended linear contiguous area of the s・ヒorage’ we first
focus on range check and propose the use of hardware range
checker.
In section 2 we consider the case for speeding up the
reference of an elemen’ヒ o茸 a vector and present an associative,
descriptor scheme for the range check. Then in section 3 we
discuss how the .sgheme can be applied to speeding up the refer-
ence of a random elemen’ヒ of a liSt. Further in section 4 We
discuss irnplementation aspect of the scheme.
一 4 一
2. Speed-up of vector ’ ?撃?高?獅煤@referencing
Speeding up the element reference and cornplete range check.
on conventional systerns is a conflicting requirement and often
the latter is sacrificed for ’ヒhe former. Howe▽er, range check
is indispensable in the programming environment where vectors
(possibly many and small) are created and deleted dynamically
and their range is generally undetermined a’煤@compile timer such
as i.n the case・f Lisp・エllegal access七・unintended area c・uld
result in total disruption of s・ヒorage management mechanism.
The check should be made prior to or in parallel wi・ヒh the
rnemory access. With pure software means, the code for the range
check is inserted before actual mernory access. The check re-
quires time longer than the actual .memory access on conventional
archi’ヒecture, e▽en when the ▽ector l is statically allocated.
More overhead for the range check of dynamic vectors will be ex-
pected. Prograrn verifiers [8] and some optimizing compiZers [9,
for example] can remo▽e range check code in some restric・ヒed
cases of static ▽ectors, but ’ヒheir usefulness is ▽ery limited in
general cases.
At二ypical and general method to cope with the dynamic ▽ec-
tors is to provide a descriptor of a vector as shown in Fig.
1鴨a(meth。d A)・エn this case, besides c・de fetchr three mem。ry
accesses are necessary; for the upper limit, the base and the
element itself. Ahother method (rnethod B) is to.provide a
header in ’ヒhe ▽ector body and t二〇 place the upPer limit in the
header. ln rnethod Br a.vector is represented by a pointer to
- 5 一
..h}
the head of the ▽ector body (Fig・ 1-b), rather 七han by a
pointer to the descriptor in me’ヒhod A. Method B eliminates the
indirection to get to the head of the vector body but loses the
flexibility in handling, in particular sharing the part of the
▽ecセ。r b・dy『 奄刀@difficulセ. In b・th cases七he mem。ry access t・
obtain the limit and subsequent check of’the index with the
limit rnust precede the 耳1emory access to a vector element・
The ab。ve defects can be rem。▽ed by pr。viding descript。rs
in an ass。ciati▽e table and by representing a▽ect。r by幽
pointer to ・ヒhe vector body, as shown in :Fig・ 2・ We call this
scheme ’associati▽e descripヒor scheme’. Descriptors disappear
from the software scene, in that only ▽ector bodies and the
pointers to them are present in the main memory・ Thus we can
ob▽iate ・ヒhe indirect;ion ▽ia a descriptor to get to the・▽e・c●ヒor
body withou・ヒ losing the fleXi bility・
In accessing the i-th element of the vector r we require
that
コ コ(1) access path to the assoc■at■ve memory
(to be called AM hereafter) is different from ’ヒhe one
セ。 random access main memory (to be called RM hereafter)
where the vector body is storedr
and that
(2) the sum of the access time to AM and the セime for comparison
of limit u and index i is less than or comparable to the sum
。f aadress additi。n time(base b plus index i》’and the
access ’ヒime to RM.
一 6 一
Descriptor (b u) which consists of base b and upper lirnit u is
storedロ
■n AM. The vector base is a key to interrogate AM and
lirnit u associated with the key is retrieved as a result.
reading,
工n
access to AM and RM are rnade in parallelr and by the
end of RMI read cycle the result of range
コ コ
wrユtユ.ng, access to AM should precede
Table l we gi▽e basic operations on AM.
check is reported.
the RM write cycle.
工n
In
x)
Operations for the following basic Lisp functions’ @in our
scheme are now described beZow:
GETV[v,i]: Ge’ヒ 1ヒhe i-th elemen七 〇f a vector ▽.
v points to the vector body. 1. Compute v+i and initiate SerAM[v] (cf. Table 1) simultaneou,sly. 2. 工nitiate memory read cycle wi七h address v+i.
1:9塗四四n「謝tin呈e離「996Xlli.ee)e、Se return
the read一一〇ut value when the read cycle is completed.
PUTV[vri,w]: Place the value w in the i-th element of a vector v.
1. Cornpute v+i and initiate SerAM[v] simultaneously. 2. Obtain the resultr u of SerAM[v] 3 If i>u then obey interrupt sequenee else initiate memory write cycle with address v+i and value w.
MK▽ECT[u]: Create a new ▽ector whose upper limi’ヒ is u. 1. Set v 〈一 alloc(u+1). {alloc is a functidn which allocates storage for
consecutive u+1 elements and return the head address of the allocated storage.}
2. CreAM[v,u] and return v as the result.
一一一・一一一■一■一■一■■口鴫繭一一一一■■■一一一囎9一一一一一.一朝瞬一■ロー■一,一臨一一一一一一一一ゴー一一■一一一隅一ロー一一一____●ロー__馴一_
* We use names o£ the functions on vector handling given inStandard Lisp・Report[4].*★@The interrupt sequence is not elabora・ヒed in this paper.
一7 一
To delete vector v whose descriptor is (v u), DelAM[v] (cf.
Table i) is performed.
工n list processing sharing the structure or sub-structure
is customary and important. The simplest functions which eEEect
the sharing are CDR, CDDR, ... etc.. 工t is highly desiarable
not only for the sake of more EZexible handiing of a vector but
for the sake of the notional compatibility of a list and a vec-
tor,』’ヒhat the sharing of the strucセure can be achieved with max-
irnum efflciency, like CDR on a list.. Funqtion SUBVECT[vrm]
which corresponds to CAD〈=一;PR perEorms that function. 暢
SUBVECT[vtm]: Take a sub-vector of vector v, that is the vector excluding the first m elernents of the vector v. 1. SerAM[v] and obtain limit u of vector v.
2・工fm>uthen obey interrupt sequence. 3. C:eAM[v+rn,u-m] (cf. Table 1) and return v+m as the result.
Aprob:Lem on sharing sub-s’ヒructures by modifying the already
built structures is discussed in secti。n』 R in c。nゴuncti。n with
RP]」ACD in the associative descrip’ヒor scheme.
一 8 一一
3. Linearized lists arid fast look一一up of a random elernent of a
list
工n the CDR-coding scheme mentioned in section 2, 2 bit 七ag
is used in each list w・rd t・distinguish the f・ur cases・f adゴa-
cency [5]:
’1. CDR is.the next word (CDR-NEXT).
2. The・next word is used as CDR-link (CDR-NORMAL). 3. The word is the end of list (CDR-NZL). 4・ The word is used for indire.ction (工NDIRECT)・
When n element list is structured in a way that each of the
fir s’ヒ n-l consecuti▽e words is tagged as CDR-NEXT and ・ヒhe last
word is tagged as CDR-NTL, it is called linear. A linear list
exhibits the sarne data structure as a vector body and each ele・一
ment of which can in principle be accessed by using the index
from the head of the list. That is, the i-th element can be ac-
cessed by computed address of p+i where p Poin’ヒs to the head of
the list.
This simplified version of list elemen’ヒ referencing suffers
from two defects:
(1) List structures change dynamically; fo.r exarnple when RPLACD
is operated on them, the linearity of the structures is general-
ly lost.
(2) Because the number of elernents of the list is not readily
known in many cases, upperbound range check win be difficult.
We recall that in our scherne of siection 2 the .descripto:s
are used for range check of accesses to any linear contiguous
area. Hence, provision of the descriptor to each linear list or
- 9 一
linear part.of lists (partially linear lists) s Cuch.as shown in
Fig. 3 is sufficient to check whether the addressed word is a
part of a list. That isr whenever linear lists which are meant
to be accessed by an index, a descriptor of a lisセ, consis’ヒing
of the head address and the upper lirnit is created dynamically
in AM using the primiti▽es of Table l, as in ▽ectors.. 工n the
case of a partially Linear listr a descriptor Eor that particu-
lar linear part is created.
To further elaborate our discussion, we present ・ヒhree basic
functions to be used in the assodiative descriptor scherne:
VECTL[r] ’ヒ。 create a descriptor of list r in AM,
thereby enabling the use of indexed
access capability on r r
DEvEc[v[r] to rernove a descriptor of r frorn Aly[,
if exis’ヒs, thereby disab=Ling the use of
indexed access capability on r r
SELECTN[rri] to select the i一・・ヒh elemen・ヒ of list r,
using the descriptor(s) of r s・ヒored
in AMr if any.
VECTL[r]: Let r be a list (rO rl r2 ... rk) .
After the execution of VECTL[r]r random access to an elernent of list r can utilize the address arithrnetic.
1. Set u 〈一 SerAM[r].
2. 工f u > O then goto step 6. 3. {r is ffo t in AM.} 工f the tag of the list head is IND工RECT
then terminate the aigorithm returning 一一1. 4. Scan the list from the head until finding CDR-N工L, CDR一・・NORMAL or 工NDIRECT, and obtain u’ (<k)
of the upper limit of the linear part of the list. 5. Enter (r u’) in AMr i.e. CreAM[rru’] and terminate the algorithmr returning u’ as a result.
一 10 d.
1
6. {r is linear upto the u-th element.}
Access directly the u一・th elemen’ヒ by address r+u. Scan セhe list from the u-th element until.finding CDR-NIL, CDR-NORMAL or 工ND工RECT and obtain i (〈 k 一 u) of the additional linear length of ’ヒhe remaining list. 7. EnteF (r u+.j) in AM, i.e. RepAM[:ru+i] (cf. Table 1) and
terminate the algori’ヒhm, returning u+i as a result.
(Figure 4 shows the process oE the execution of VEC[PL.)
DEVEC[P[r]: [rhis function is to from AIY[, i f any.
DelAM[r] does exactly the
remove the descriptor for r
Eunction oE DEVECT[r].
一 11 一一
SELECTN[rri]: This function selects the i-th eleMent of list r if i is less than the length of the.listr
1. Set u 〈一一 SerAM[r].
2. 工f u=一l then go to step 5・
3. 工f u〈i, goto step 6.
4. Read the word at address r+i and terrninate the algorithm. {Steps 3 and 4 are performed in parallel.}
5. Scan the iist from the head uPto the・i-th elernent and if CDR-N工L is encountered on the way then terrninate the algorithm with error else terminate the algorithmr returning ’ヒhe i-th element. 6. {r is partially lineat.} Access the u-th elernent.
7. If 七he七ag of the ’U一’ヒh e・lement is CDR-N工L
then terminate the algorithm wi’ヒh error・ 8.{Get t。七he nexセn・de.}
Set t〈一 the content of the word at address t+u+1. 9. Call recursively SELECTN[tri-u一一1] and terminate the algorithmr returning ’ヒhe result of SELECTN[t,i-u-1].
Note that (i) even when the descriptor for r is removedr r
can be acdessed as an ordinary lisセ scanning each「element of the
list and that (ii) the execution of VECCPL does not affect the
data structure in RM. Hence r CARr CADRr CDR etc. can be per-
formed as before.
In effect, ・ヒhe descrip七〇r scheme for lists is a de▽ice for
speeding up the element referencing. Programmers can have en-
tire control over the use of VEC[DL and DEVECTL on lists except
that DEVECT is also forcibly perforrned by the systern’s garbage
coilector and by thd functions which modify the structures r not-
abiy RPLACD.
When RPLACD is perfomed on the linea.r listr the related
descrip七〇r(s), if any, must be updated to reflec七 ’ヒhe fact that
’tail’ of the list is cut. The following is the algorithm of
RPLACD in our scheme. Zt is noted, howeverr that the use of
RPLACD should at best be avoided, since the execution time of
一 12 一一
RPLACD is proportional to the length of linear part of the
on which RPLACD is opera・ヒed on, not to mention harmful side
fects it would cause.
list
ef一
RPLACD[rrs]: This function replaces the CDR part of r by s.
1.
2.
3.
4.
5.
6.
7e
工f the tag of the word w pointed by r is CDR-NEXT orCDR-N工L 『ヒhen goto step 2,
else if the セag is 工NDIRECT then perform RPLACD[w,s] else perform RPLACD[r,s] in the non-CDR一一coding (traditional) scheme. コTerm■nate the algorithmr returning the result of RPLACDoperated in this st:ep.Change the tag and the data field of w into lND工RECT andCONS[CAR[r],s], respectively.DelAM[r].・Set i <一 1.
If the tag of the word at address r-i is CDR-NEXTthen goto step 6 else terminate the algorithm.工f SerAM[r-i] メ 一l then RepAM[r-i,i-1]Set i <一 i+l and go・ヒ。 step 5.
一 13 一
4. Considerations for implernentation of the associative
descriptor scheme
We shall assume that the values of index i and base b are
p:ovided by.the external logic (pqssibly registers in CPU). The
essential part of our scheme is AM. A practical method for re-
alizing large scale AM which satisfies the・requirement given in
section 2 is hashing for the following reasons:
(i) Hardware hashing can be performed very fast, mostly with
single access to hash’table rnernory (which is realized by
conventional rando.rn access rnernory),.if the.mernory is
configured to be multi-banks which are accessed in parallel
[10].
(ii) AM need only be a single-hit associative memoryr which is
sui’ヒed to hashing.
工n case that ’ヒhe number of descriptors to be entered to AM
exceeds the capacity of AMr we have following choices;
(a) to abort the computation if the load factor of AM exceeds
the prespecified value; say, O.85 一 O.95,
(b) to make overfiow area in main rnemory (RM) and prepare for
possible decrease in efficiency if AM is overflowedr
(c) to trigger garbage collection and reclairn unused descrip-
tors.
Method (c) can be combined with either method (a) or (b). 工n
conjunction with (c), we should note that all the descriptors of
lists may be deletedr if necessaryr since they only decrease the
efficiency of element referencing.
一 14 一
None of these rnethods poses. difficuities to hash associa-
ti▽e mem。ries.エt is。f c・urse necessary「 狽?≠煤@certain number。f
look-ups of AM should give rise to the cohdition to trigger the
garbage collection before the hash search turns into a practi-
cally exhaustive search on AM (or RM) if method (b) is used.
5. Concluding remarks
We sh。wed that in the asS。ciati▽e de6cript。r scheme a mem。一
ry access with complete range check can be performed without in_
ロcu「「1ng overhead・ We・apP]・ied the scheme to the speed-up of re-
ferencing lists and▽ect・rs by taking advantage。f the address
arithmetic.
Our discussi。n als・suggests a meth・d f・r handling lis七s
and vect・rs unif・rmlywhen a tag f・r CDR-c・ding is pr・▽ided in
each element of a ▽ector. Traditionally, there is distinct:dis-
ciplines on the use of lists and ▽ectors. We can either follow
the tradition and use consciously lists and ▽ectors in a differ-
ent Way’ or pursue a way for integrated use of lists and ▽ec_
tors.
(1)
(2)
Zn the latter approach, ’ ?盾撃撃盾翌奄獅〟@considerations are due:
Facilities ard necessary for reserving a certain arnount
o£ storage for initial ’CONS’ in addition’to node-wise
allocation by repeated application of ’CONS’.
We need to check the tag of the boundary word of a
vector to ensure.that the structure is not extended
by CDR一”link, because condition i>u does not aiways
imply actual range violation.
一 15 一
However, once linear structure is constructed and
fixedr there is no reason to dis’ヒinguish between
tors with regards ’狽潤frandom access capabilities
structures.
the size is
lists and vec-
and the daセa
As a natural extension we consider following themes for
further research, efficient implementa’ヒion of the tagged archi一・
tecture and developrnent of a Lisp systern based on the associa-
tive descriptor scheme.
一一 16 一
o
References ・ “、
[1】 McCarthyr e七.’al. Lisp l.5 Prograrnmer’s Manual
Cambridge, Mass.r MIT Press, 1962
[2】Cambell’J・A・and Fitch J・P・Symb。lic C・mputing with and
without Lisp’一Conference Record of the l980 Lisp Conference
Stanfordr U.S.A., 1980
[3]Fitch・」・P・arid N。rmanr A.C.・mplemen七ing Lisp in a high-
level languag∈> Software practise and Experience, 1977
[41Marti’J・B・’Hearn’A・C・・and Grisr’M・L・and Griss, C.
Standard LISP Report, UUCS-78-lO:L, Uni▽ersity of Utah, 1979
[5]Greenblattr. R・’Knightr T・,H。ll・wayr」. and M・・n, D.
The L工SP Machine, Report of Artificial 工ntelligence
Laboratoryワ Massachusetts 工nstitute of Technology, 1979
[6] Van・Der Poel’ W・ L・ A Manual of HISP for the PDP-9,
Technical U., Del:Etr Netherlands
[7] Keller, R. Di▽ide and Concer: Data Structuring in
ApPlicative Mul・ヒiprocessing Sys・ヒems, Conference Record of
the l980 LISP Conference, Stanford, U.S.A., 1980
[8]Suzuki’N・andエshihata, K・エmplementati・n・‡array b・und
checker Proc・ 4th ACM Symposiuln on principles
of programming languages, 1977
[9]C・cke・J・and Marksteinr P・W・Measurement。f pr・gram
■mprovement algorithms, Proc. 1:F工P 80, Tokyo l980
【10] 工da, T・ and Goto, E. Performance of a Parallel Hash
Hardware with Key Deletion, Proc. 工:FIP 77, Toronto l977
一 17 一
Table i Basic operations on AM
SerAM[b1 searches a descriptor with base b・工f the descriptor (b u) is found thenupper limi’ヒ u is returned else -1 is returned.
DelAM[b1 remo▽es a descrip七〇r with base b from AM,it exis七s in AM.
CreAM[b,u] crea七es a new descriptor (b u) in AM.When baSe b already exists, the descriptor is notcrea・ヒed.
RePAM[b,u1 creates a descriptor (b u) in AM. When base b=FLready exis七s the associated upPer limit isreplaced wi’ヒh u.
“’ 18 一
assress p(pointer to ”vector”) base limit
>d一一一一一一一一一一一一一一一一一一一・一一一一一一一一一
index i
b u
i一1 〈一 u
u
VECTORDESCRIPTOR
check
十
b+i
VECTORBODY
l
orr1
1
element #at address
o
b
1
b+1
i
b+i u
b+u
Figure 1-a. Representation of a Vector Using a Descriptor
address b(pointer to ”vector”)
index i i
b
十
i≦u 一葡一check b+i+1
u/
i ub+i+1 ・.”.騨.噂’鞠卿『一顧’,夢”.ロー・一. b+u+1
VECTORBODY
薗
R1
element # header Oat address b b+1
Figure 1-b. Representation of a Vector Usinq. a Header
address b(pointer to
卜一”vector’S)
assectati’ve memory
index?一一一一一一一一一一一一一一一一一
i
i
key val uer一一一一一一一一一 一一 一一一 一一 一“一一一一一Mt
b
十 r”一 1
tcheck
1 S. U
!
1
!
!
!
i 1.
!
!
!
u l
墨
1
1
1
1
b u
n l
t
l
l
r’一’一 一’一
!
!
!
1 element #i at addressL.LT, :’ J;,V:
base
ASSOCIATIVE
t
i
i
limit !
DESCRIPTOR TABLE 1
・一一・・一,_._。_.」kA旦旦(遡.△」⊆⊆五§.隻.幽.1」!.逃.牲ΩBエ..__,_、._._._.
b+董
P .1= ”.”””mm” i .”.”..””””.”.””..” u
b b+1 b+iT””1’”T””VT’”””’一” a{u
1
i
i
翻OR! !
1
」,
Figure 2. Associative Descriptor Scheme
轟
ri
N1
s :
t’ag
★ 15
X
★1
y★3
Z ASSOCIATIVEDESCRIPTORTABLE
r :
*
1 a*
1b
*
1 c*
2d
r・t :
*
1 e*
1f
*
4
S 2
●●
rl 1
r 3
●■
base 1「うmit
s =
r =
rt=
(× y
(a b
(e f
z)
cdgh
塵
NNl
e f
i)
gh i)*
2 g*
1h
3i
Figure 3.Descri.ptors for Lists in the Associati.ve Descriptor Scheme
Tag *1 一 *4 respectively.dengte theatV 狽??@beginning of section 3.
kind of tags 1 一 4 described
1
16
11
18
1し
断
r 3一1 量
8 1
1 量
tag・
base 1imit
ASSOCIATIVEDESCRIPTORTABしE
random access
scan scan
r :
element
*
1 ro*
1 rl*
1r.
2
*
1 r3*
1 r4*
1
by address r+3
scan scan ■旧ゆ ■ゆ
rs*
1 r6*
3 r7
Figure 4. Process o’ ?DExecution of VECTL[r]
This figure shows the case of k=7 and u=3 i・n the descri’ptionof VECTL[r]. The. value of i in step 6 gets 4, and after theexecution of VECTL[rl the limitof the descriptor is chaged to 7.
1
の
Nl
ロ コ
Flgure capt■ons
ロFユgure ロFlgure コ:Fユgure ロFlgure
1-a
1-b23
Figu:e 4
Representation of a vector using a descriptorRepresentation of a vector using a headerAssociative descriptor scherneDescriptors for lis・ヒs in 七he associati▽e descriptorschemeProcess of execution of VECTL[r]
Note to the figure 3 Tags *1 一 *4 respectively denote the kind of tags 1 一 4 described at the beginning of section 3.
Note to ・ヒhe figure 4 [Vhis figure shows the case oE k=7 and n=3 in the description of vEc[pL[r].
The ▽alue of i in s’ヒep 4 becomes 4, and after the execution of ▽ECTL[r] the size of ・ヒhe descriptor is changed to 7・
一 24 一
Acknowledgement
The authors thank Prof. E. Goto and the members of the
staff at工nf。rmati。n Science Lab。rat・ry’エnstitute。f Physical
and Chemical Research for helpfull discussions with them on the
subゴects◎f Lisp and architecセural requiremen七s f・r Lisp ma-
chines.
一 25 一
INSTI丁UTE OF IN FO RMATION SCIENCES AND UNIVERSITY OF TSUKUBA
SAKURA-MURA, NIIHARI・一・GUNS IBARAKI 305
ELECTRONICS
JAPAN
REPOR丁D()Cl」凹EN丁AT I ON PAGE
RE:POR田Nて脳BER
ISE-TR-80-19
讐=[T工E
Associative descriptor Scheme 一 for the exploi・tation of address
arithmetic in L工SP
AUTHOR (S)
Tetsuo 工da
Kozo ltano
REPORfV DATE
December 15, 1980
1waIN CA{1}EGORY
computer architecture
NUIbCBER OF PAGES
25
CR CATEGOR [ES6.1, 6.34, 3.74, 4.22
KEY WORDS
コ Lisp, architecture for Lisp, range check hardware, assoc■at■ve memory,
hashing
AB STRACCII
We present an associative descriptor scheme to take advantage of
address arithmetic in accessing lists and vectors. The scheme employsan associative table for storing descriptors for lists and vectors・ 工nparallel with each access to the structure with its base and index, J the
hssociative descriptor is searched for the size of the structure andhardware range check is performed. This operation hence can be donewith little or no overhead in accessing the structureb This scheme is straightforwardly applied to fast indexed access to vectors and also to fast rondom access of any list element when combined with CDR-coding.This fact further suggests a method for uniform handling of a list gnd a
vector. 工mplementation aspect of the scheme using parallel hashing is
also discussed.
SU:P P工、ED,IENtlDARY NO’IVE S