第 5 章 arm 接口设计技术

PowerPoint S3C44B0X71I/OS3C44B0X7
A10
B11
1IIC-BUS
1IIS-BUS
5PWM1

3066UART84DMARTC1ADC1IIC1SIO
IRQ
/
/
FIQ

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32.768kHz

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1875MHz
19160LQFP/160FBGA
00:8-bit 01:16-bit 10:32-bit 11:Test mode
ADDR[24:0] .
DATA[31:0] ,8/16/32
nGCS[7:0] :,..
nXBACK
ENDIAN little endianbig endian. 0:little endian 1:big endian

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3LCD
VD[7:0]LCD4LCDVD[3:0]VD[7:4]
VFRAMELCD
VMVMLCDVLINE

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nRESETnRESETS3C44B0XnRESET4MCLK
OM[3:2]OM[3:2]
00 = Crystal(XTAL0,EXTAL0), PLL on 01 = EXTCLK, PLL on 10, 11 = Chip test mode.
EXTCLKOM[3:2]3.3V.
XTAL03.3V.
EXTAL0XTAL0
TMSTAPTAP10K
TCKTAPJTAG10K
TDITAP10K

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PFPF0 –PF3PF4--PF7

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PF1
[3:2]
PF2
[5:4]
PF3
[7:6]
PF4
[9:8]
PF5
[12:10]
000 001 010nRTS1 011SIOTxD 100IISLRCK
PF6
[15:13]
000 001 010TxD1 011SIORDY 100IISDO
PF7
[18:16]
000 001 010RxD1 011SIORxD 100IISDI
PF8
[21:19]
000 001 010nCTS1 011SIOCLK 100IISCLK

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PF0~PF3PF4~PF7
rPCONF000 000 000 00 01 01 01 01 B0x55
2PDATF
val = (val>>1)|0x80 ;

7
FG:
rPCONF 001 001 001 01 01 01 01 01 B0x12555
rPCONG 01 01 01 01 01 01 01 01 B0x5555;
2PUPFPUPG
#include <string.h>
#include <stdio.h>
unsigned char led_dis[] ={0xC00xF90xA40xB0,0x990x920x820xF8,
0x80,0x900x880x83,0xC60xA10x860x8E0x8C}; //0~F

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rPCONF 0x12555
rPCONG0x5555;
  3DSTNDual Scan Tortuosity Nomograph
    4TFTThin Film Transistor

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2VLINELCDLCDLCDLCDVLINE
3VCLKLCDVCLKVCLKLCD
4VMVMLCDVMVLINE
5VD[3:0]LCD
6VD[7:4]LCD
3
4

164
13321681681648×8×4 = 256
416
LCDHOZVAL= (320×3/8)-1
CLKVALVCLKCLKVALLCDVDVCLK
HSLCDVSLCDFRMV

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VCLK2 MHz16 MHz

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I/O
rPCONC = 00 00 00 00 00 00 00 00 11 11 11 11 00 00 00 00B = 0x0000ff00;
rPUPC = 0x 00; //
int i;
U32 LCDBASEU,LCDBASEL,LCDBANK;
rPCONC00 00 00 00 00 00 00 00 11 11 11 11 00 00 00 00B = 0x0000ff00;
rPUPC = 0x 00; //
//VCLK8MHzWLH16
LCDBANK=0xc000000>>22; //((U32)LCDBuffer16)>>22;
LCDBASEU=0x0; //((U32)LCDBuffer16)&0x3fffff;
LCDBASEL=LCDBASEU+(160)*240;
((((U32)LCDBuffer16)>>1)&0x7ffffff);
// LCDBANKLCDBASEU
rLCDSADDR3= (320/2)|(0<<9); //PAGEWIDTH = 320/2OFFSIZE=0
rREDLUT=0xfca86420;
rGREENLUT=0xfca86420;
rBLUELUT=0xfffffa50;




OTI()
X
SER/DFR“1”=VREF“0”=
PD1PD0“00”=A/D“01”“00”“10”=“11”=

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PENIRQ
{
rPDATG &= 0xe7; // PG4, CS;DCLK

rPDATG |= 0x08 //DCLK PG3
rPDATG &= 0xdf; //DOUTPG5
{
ack+=1;

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416FIFOFIFOTxDnRxDnFIFO

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UART
5~81~2UCONn0

AFCUARTUARTnRTS nCTSnRTSnCTSnCTSUARTFIFOFIFOnRTSFIFOFIFOnRTS0“”
UARTMODEMnRTSnCTS

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USB127

USBUSBUSBUSB
USBUSBUSB

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2100 Mbps100 Mbps
31000 Mbps1000 Mbps(1 Gbps)

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CSMA/CD

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“0”“1”“0”“1”
“0”“1”“0”“1”“0”“1”

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4SA
61500151414
7PAD6014460…
8FCS



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18h~1Fh
ISR07h0

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PSTOP02h02
BNRY03h0
CURR07h1
DCRFIFO8
TPSR
TCRCRC
RSAR0,1RSAR08RSARl8
RBCR0,1RBCR08RBCRl8
TBCR0,1TBCR08TBCRl8

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2MAR0~MAR80xFF
3PAGE2PAGE3NE2000

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256164
0x40~0x45RTL801966×256=1536 B1
0x46~0x5F RTL801926PSTART=0x46PSTOP=0x5F
CURRBNRY CURRBNRY
PSTOP=0x60CURR1PSTART=0x46
CURR=BNRY

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BNRYPSTOP=0x60BNRYPSTART=BNRY=0x46

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RAM0x0000~0x000B12
612
0x000B

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RTL8019
RTL8019RTL8019ARMDMARTL8019RAMARM
I2C 80


CPU

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SDASCLSCLSDA
1717=07=1

ACKSCL981SCL

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“”“”“”CAN

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SIO
SIOSIODAT
DMA
DMA
SIODMA
SIODMA
SIO
4DMA0
DCNTZ1,SIODMA
DMA
SIODMA
SIO8DMA
5DMA0
DCNTZ1,SIODMA
2SIO (SIODAT)80x01D14004 0x00
3SIO (SBRDR)SIO120x01D140080x00
SIO = MCLK / 2 /( SBRDR + 1)
4SIO (IVTCNT)80x01D1400C0x008
= MCLK / 4/ ( IVTCNT +1)
5SIO DMA(DCNTZ)SIODMADCNTZ0DMADCNTZ1DCNTZ0x01D14010 0x00

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IISCDIIS
IIS 3(Serial Data)() (Word Select)(Continuous Serial Clock)

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IISLRCKIISCLK
3IISBDMA

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514

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sGAsGBsGCsGDsGKAsGKB sGKAsGKB sGKAsGKB
mGAmGBmGCmGDmGKAmGKB mGKAmGKBmGKAmGKB
mGAmGB mGA6sGKB mGB6
S3C44B0X
1FIQ→IRQ
2ABCD→ABCD →KA →KB →KA →KB

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ARM7817 0x00-0x1C ARM7IRQFIQ
S3C44B0X300x20-0xC0, S3C44B0X
INTMODIRQINTCON

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INTMOD0x01E00008
ISRpendingINTPNDI_ISPC/F_ISPC1

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rPCONG = 11 11 11 11 xx xx xx xxB
2
2
3
4

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rPCONG=11 11 11 11 xx xx xx xxB; //
rPUPG 0000xxxxB; //
rEXTINT=01x 01x 01x 01x xxx xxx xxx xxxB; //
break;
break;
rEXTINT=11x 11x 11x 11x xxx xxx xxx xxxB; //
break;
rEXTINT=000 000 000 000 xxx xxx xxx xxxB; //
break;
default:
return;

3.:A/D
4.: 0+5V0+10V -5+5V-10+10V

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AIN[7:0]8AREFTAREFBAVCOM
2.5VADC2.5 V/210 = 2.4mV

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ADCCON0x01D400000x01D400020x01D400030x20

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A/DADCDAT0x01D400080x01D4000A0x01D4000B0x00

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DAADDADA

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JTAGJTAGPCB



TAP TAP DRIR
TAP TAP Controller

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2Test Mode Selection Input (TMS)
TAP TMS TAP TMS TCK
3Test Data Input (TDI)
TDI TCK
4Test Data Output (TDO)
TDO TCK
5Test Reset Input (TRST)


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ARM7TDMIJTAG(Macrocell)3JTAG(Scan Chain) JTAGTAP
Scan Chain 0ARM7TDMI 113 0-31 31-0 EmbeddedICE-RT
Scan Chain 110 33 0-31 BREAKPT1 0 1 ARM7TDMI
Scan Chain 22 38 EmbeddedICE-RT EmbeddedICE-RT ARM7TDMI

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