一種控制 mos 門限電壓的運算放大器之設計 a method of design low-power operational...
Post on 16-Mar-2016
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MOS A Method of Design Low-Power Operational Amplifier with CDB technique Abstract 0.35um0.18um0.35um(Threshold VoltageVth)CDB(Current Driven Bulk). CDB(Current Driven Bulk) NMOS(1.)(NA)PMOS(3.)CDBcase1:Single PMOScase2: With & Without CDB comparecase3: Low voltage OPA designConclusions Simulate & Result5. LAYOUT7. 8. Department of Electronic Engineering @Feng Chia University
2. HSPICEPMOSIINJECT|VTH|gmro0751m146u607K0.001n718m159u319K0.01n710m161u314K0.1n702m163u248K1n694m162u153K10n686m157u70.4K
3. 2.6VCDB2.6V2.6V(with CDB)8029.17919.92.4245M2.4302M31.5085uW20.2306uW3dB664Hz661Hz(P.M)47.5480.158 V/us0.152 V/us(WT)6.98M6.76MDFIInject1pACIInject1nA
4. 1.5V(with CDB)1.5V5278.81.3718M23.1622uW3dB2.54K(Phase Margin)58(Slew Rate)0.05 V/us(WT)45.2M(Vb)0.7VDFIInject14nACIInject0.1nA
1. TechnologyTSMC 2P4M0.35umPower Supply1.5VPower consumption23.09uWCompensation Capacitance1pFCompensation Register100KArea0.5um*0.5um
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