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STARTUP SEQUENCE PERFORMED BY AD9889The AD9889s EDID and HDCP controller is a state ma chinewhich is implemented in the AD9889s hardware. Thefollowing list of instructions illustrates the sequence inwhich the state machine performs the EDID and HDCPhandling.

Note that in the following sequence, the term Systemalways refers to the software that is in control of thesystem and is responsible for conguring the AD9889through the I 2C port. The term User refers to the enduser of a product using an AD9889.

0. The AD9889 HDCP controller stays in reset until HPDis high.

1. When HPD is high, the AD9889 reads EDID segment 0 and sends an EDID Ready interrupt to the system.

The EDID Ready ag (0xC5[4]) is set once the EDID has been read successfully.

2. After reading the EDID the AD9889 waits for the HDCP Desired bit (0xAF[7]) to go high.

3. System software evaluates the EDID, congures theAD9889 by setting the appropriate video and audiomodes, and then sets the HDCP Desired bit to high(the status of this bit is also reected in 0xC6[3]).

The Frame Encode bit (0xAF[4]) should also be setto 1 1. The HDMI/DVI bit (0xAF[1]) should not bechanged after setting the HDCP Requested bit.

4. Once HDCP Requested is high, the AD9889 initializes the HDCP system.

The receivers BKSV is reported in the BKSV

registers (0xBF to 0xC3) and the BKSV ag isset (0x97[6]) (generates an interrupt) and the BKSV count (0xC7[6:0]) is set to 0.

The BKSV ag is also reected in 0xC7[7].

5. The system must check the BKSV against the revoca- tion list and clear the BKSV Flag (write 1 to 0x97[6])interrupt if it is not on the revocation list.

If not OK then the system should report this to the user in the video stream and not send protected content.

Revocation lists are provided as part of the

source media (i.e., on the DVD).

6. Once the BKSV ag is cleared, the AD9889 begins HDCP encryption and checks if the re ceiver is are peater.

The AD9889 checks the receivers DDC regis terbit which indicates if it is a repeater.

If not a repeater, then HDCP initialization is com- plete and the AD9889 begins HDCP management.

The status of the HDCP encryption can be veriedby reading 0xB8[6] .

If the receiver is a repeater, the AD9889 must completethe HDCP repeater authentication:

7. AD9889 reads up to 13 KSVs from the downstream repeater (the AD9889 can only process 13 at a time).

8. AD9889 signals a BKSV Flag interrupt with the BKSV count (can be up to 13).

9. System rmware reads the BKSVs from the EDIDmemory and checks them against the revocation list.

Note that the EDID and HDCP handling share the AD9889s internal memory. EDID is reread at the end of HDCP initialization.

System rmware clears the BKSV Flag interrupt.

10. AD9889 calculates the SHA-1 hash of the KSVs.

If more KSVs remain (ther e are more than 13downstream devices), then go back to Step 8.

All of the SHA-1 hash values from eachiteration (each set of 13 KSVs) are added beforethe comparion is done in Step 11.

11. AD9889 compares downstream SHA-1 hash to internal hash to verify KSV list.

12. Once all KSVs have been verified, the AD9889begins HDCP management and protected content cannow be transmitted.

1In some applications, it may be desirable to initiate HDCP without encrypting the data (for example, if an unencrypted DVD is played). In this case, the FrameEncode bit does not need to be set.

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7.A) READ

DOWNSTREAMKSVs

8.B) SET BKSV

FLAGC) REPORT KSV

COUNT

9.READ BKSVsFROM AD9889

AND EVALUATE

YESNO

BKSV FLAG = 0

BKSV INT

HDCP REQ = 1

EDID READYINTERRUPT

HPD = 1

IF HDCP REQ = 0 2

HPD = 0 1

HPD = 0

NO

ERROR INTERRUPT YES

NO

BKSV FLAG = 0

ERROR INTERRUPT(IF STATE > 6)

NO

YES

GO TO STATE 1

YES

NO

NOTES:1. ANY OCCURANCE OF HPD = 0 WILL RESET THE AD9889 EDID/HDCP CONTROLLER.2. IF BKSV IS REVOKED, THE

SYSTEM SHOULD CLEAR THE HDCP REQUEST FLAG TO ENABLE A REAUTHENTI CATION.

3. DENOTES FUNCTIONS CONTROLLED BY THE

AD9889.

4. DENOTES FUNCTIONS CONTROLLED BY THE SYSTEM SOFTWARE.

NO. OF BKV'S

YES11.SHA-1 HASH

MATCH?

MORE KSVs?

10.AD9889CALCULATESSHA-1 HASH

VALUEFOR KSVs

BKSVsREVOKED?

A) REPORT TOUSER

B) DO NOT SEND PROTECTED CONTENT

REPEATER?

12.BEGIN HDCP

MANAGEMENT(PROTECTED

CONTENT CANNOW BE

SENT)

0. RESET

1.A) READ EDID

B) EDID RDY = 1 2.

WAIT FOR HDCP REQUEST

4.A) INITIATE HDCP

B) SET BKSVFLAG

C) WRITE BKSVREGISTERS

3.A) EVALUATE

EDIDB) CONFIGURE

A/V OF AD9889C) SET HDCP REQUEST

6. BEGIN HDCPENCRYPTION

A) REPORT TOUSER

B) DO NOT SEND PROTECTED CONTENT

5.READ BKSV

FROM AD9889

BKSVREVOKED?

ERROR INTERRUPT(IF STATE

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State RegisterThe current state of the HDCP controller can be read fromthe HDCP Controller State I 2C regist er (0xC8 [3:0]). Thecodes for this register are shown in Table II.

Table II. HCDP Controller Status

Reg 0xC8 [3:0] HDCP Controller State0000 In Reset (No Hot Plug Detected)

0001 Reading EDID

0010 IDLE (Waiting for HDCP Requested)

0011 Initializing HDCP

0100 HDCP Enabled

0101 Initializing HDCP Repeater

Error ReportingIf an error occurs, the AD9889 will set the error ag (0xC5[7]),causing an interrupt. An error code is then r eported in t he

HDCP Controller Error register (0xC8 [7:4]). Table III lis tsthe possible error conditions and the corresponding 4-biterror code.

Table III. Error Code Denitions

Error Code Error Condition

0000 No Error

0001 Bad Receiver BKSV

0010 Ri Mismatch

0011 Pj Mismatch

0100 I 2C Error (usually a no-ack)

0101 Timed Out Waiting for Downstream Repeater DONE

0110 Max Cascade of Repeaters Exceeded

0111 SHA-1 Hash Check of KSV List Failed

1000 Too Many Devices Connected to Re peater Tree

Error HandlingThe AD9889s HDCP engine will automatically restartthe authentication process on any error. As long as theHDCP requested bit remains high, the HDCP engine willcontinue to reauthenticate the HDCP link. The system

should not set the HDCP requested bit low as an HDCPerror could be caused by the receiver not being enabledor selected.

It should be noted that on two-port display, a disabledport may not acknowledge an HDCP request until theuser selects that input port to be ac tive.

Other Notes The system sof tware should always clear the HDCP

Error interrupt after it has been serviced so thatsubsequent errors will generate a new interrupt.

The error code always shows the last error even ifthe error interrupt has been cleared. In other words,

the error code is only cleared by a power-on reset orreplaced by a new error code.

ADDITIONAL EDID CONTROL

EDID DenitionsExtended EDID (E-EDID) supports up to 256 segments.A segment is a 256-byte segment of EDID containing oneor two EDID blocks. A normal HDMI system will haveonly two EDID blocks and so will only use segment 0.The rst EDID block is always a base EDID 1.3 structure;the second EDID block is usually CEA 861B block denedfor HDMI systems.

EDID Tries Register (0xC9 [3:0]) The number of times the HDCP/EDID controller will tryto read the EDID is limited by the EDID Tries register.Each time an EDID read fails, this value is decremented.The default start-up value of this register is 3. Once theEDID Tries register is 0, the controller will not attemptto read the EDID until this register is set to somethingother than 0.

EDID Segment Register (0xC4)If it is necessary to read a segment other than 0, thesystem software should set the EDID Segment registerto the desired segment and wait for the EDID Ready agto return to high. This will generate an interrupt.

EDID/HDCP Shared Memory The EDID and HDCP controllers use shared memoryspace. During HDCP Repeater initialization, the EDIDmemory is overwritten and the EDID Ready ag goeslow. After initialization, the EDID is reread and the EDIDReady ag is set to 1. The setting of EDID Ready agto 1 will cause an interrupt if this interrupt is enabled.If an interrupt is not desired, the EDID interrupt shouldbe disabled after the EDID has been processed by thesystem software.

The I 2C slave address of the EDID memory can be pro-grammed in the EDID ID register (0x43). The default

value for this register is 0x7E.

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Purchase of li censed I 2C components of Analog Devices or one of its sublicensed Associated Companies conveys a license for the purchaser under the Philips I 2CPatent Rights to use these components in an I 2C system, provided that the system conforms to the I 2C Standard Specication as dened by Philips.

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