analog design and system integration lab. graduate institute of electronics engineering national...
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Analog Design and System Integration Lab.
Graduate Institute of Electronics Engineering
National Taiwan University
大學專題說明會大學專題說明會
積體電路與系統組 /電波組呂良鴻副教授博理館 622室
2NTU GIEE
Research GroupResearch Group
Lab Information: Analog Design and System Integration (ADSI) Lab Established: September 2002 Location: BL 403 Hardware: 18 PC + 2 Workstation (SUN Blade 2000)
Member: Ph. D. Students: 2 Master Students: 10 Assistant: 1
3NTU GIEE
Research InterestResearch Interest
RF/Microwave Integrated Circuits Ultra-low power RF frontend circuits RF built-in-self-test (BIST) Si-based microwave integrated circuits
High-Speed/Broadband Integrated Circuits 40GBs optical communication circuits Broadband amplifiers
Reconfigurable Wireless Systems Multi-standard/multi-band designs Power-awareness techniqeus
TFT Circuit Designs LTPS circuits on glass Flexible electronics
4NTU GIEE
RF/Microwave Integrated CircuitsRF/Microwave Integrated Circuits
Ultra-low power RF frontend circuits Building Blocks
Receiver: LNA, mixer Transmitter: PA, mixer
Research Focus Ultra-low power design Low-voltage design
Possible Applications Distributed sensor network RFID
SOC
WirelessSensing
SOC
WirelessSensing
SOC
SOC
WirelessSensing
SOC
WirelessSensing
SOC
WirelessSensing
SOC
WirelessSensing
SOC
5NTU GIEE
RF/Microwave Integrated CircuitsRF/Microwave Integrated Circuits
LNA
PA
Synthesizer
0.6 V900 W
0.6 V6 mW
To Antenna
From Antenna
VCO0.6 V
700 W
0.6 V790 W
LNALNA
PAPA
SynthesizerSynthesizer
0.6 V900 W
0.6 V6 mW
To Antenna
From Antenna
VCOVCO0.6 V
700 W
0.6 V790 W
Poly-PhaseFilter
LO
IF I
IF Q
LO I
LO Q
Mixer
Mixer
Differential to Single-Ended
Converter
OutputAmplifier
RF
This Work
VB1
VDD VDD
LO Q+LO Q-
IF Q+ IF Q-
RFoutRF+
RF-
RS CS
MN14MN5 MN6 MN7 MN8
MN15
VB2
MN11 MN12
MN13L1
L2
L3
L4
L5
L6C4
VB3
Up-conversion Mixer
Differential to Single-Ended Converter
OutputAmplifier
C1
C2
LO I+LO I-
IF I+ IF I-
MN1 MN2 MN3 MN4
MN9 MN10
VDD
VDD
C3
1.09 mm
1.09
mm
MN16
L9
L8
VM
L7
VDD
L11
MP1
C6
L10
C5
L13
MP2
C8
C7
VDD
RFin
L12
VDD
LO+LO-
L14 C10
MN17 MP3 MP4
MN18
C9
VB4
VB5
RL RL
+ IF -
LNA Down-conversion Mixer
LNA
This Work
0.9
mm
1.3 mm
RF
Mixer
LO
IF
OutputBuffer
6NTU GIEE
High Speed/Broadband Integrated CircuitsHigh Speed/Broadband Integrated Circuits
System Architecture Transmitter: MUX, retimer, frequency divider Receiver: TIA, LA, CDR Broadband amplifiers/drivers
Research Focus 40GBs optical communication components 40GBs BERT system
N
OutputData
AGC
TIA Limiter
D QFF
ClockRecovery
DM
UX
Decision Circuit
MU
X
N
D QFF
FrequencySynthesizer
PowerControl
LaserDriverRetimer
InputData
7NTU GIEE
High Speed/Broadband Integrated CircuitsHigh Speed/Broadband Integrated Circuits
Motivation: High-speed and broadband IC for 40-Gb/s optical communications Implemented in standard 0.18-m CMOS process
Achievement: Broadband distributed amplifiers:
High-speed building blocks:
32-GHz/9.5-dB 46-GHz/6.7-dB 50-GHz/9.5-dB
MUX DEMUX Frequency divider QVCO
8NTU GIEE
Reconfigurable Wireless SystemsReconfigurable Wireless Systems
Implementation of Active Inductor Advantage
Reduced areaHigh Q-factor
Research FocusTunable inductance valueNoise and linearity study
Zin
RpCp
L
Rs VBIAS
Zin
VB1
VB2
Zin
Negative Feedback Positive Feedback
Zin= Re(Zin) + jIm(Zin) ≈ R + jL
Q ≡ Im(Zin) / Re(Zin) ≈ L / R
9NTU GIEE
TFT Circuit DesignsTFT Circuit Designs
TFT AMOLED Pixel Circuits a-Si TFT pixel circuits Poly-Si TFT pixel circuits
Research Focus Threshold compensation Mobility compensation Device modeling CAD tool development
10NTU GIEE
Plans for Undergraduate Special ProjectsPlans for Undergraduate Special Projects
Models for Special Projects 2~3 students as a group for one project topic Everybody has his/her own block within the group Regular meeting once a week
Plans for Special Projects Paper survey/case study CAD tool training Circuit design and analysis Circuit simulation and layout Final report Oral Presentation