15th International Power Electronics and Motion Control Conference, EPE-PEMC 2012 ECCE Europe, Novi Sad, Serbia

Analytical Derivation of Power SemiconductorLosses in MOSFET Multilevel Inverters

Fabian Gebhardt, Hauke Vach∗, Friedrich W. Fuchs∗∗

Institute for Power Electronics and Electrical Drives / University of Kiel, Kiel, Germany,email: fge@tf.uni-kiel.de, ∗hv@tf.uni-kiel.de, ∗∗fwf@tf.uni-kiel.de

Abstract—Multilevel topologies reduce the required filtereffort and therefore the weight and volume of the system.Additionally some topologies have a built in redundance andincrease the reliability. The cooling of the power semiconduc-tors and thus the power dissipation is a crucial criterion forthe design of a PWM converter. Methods for the calculationof power semiconductor losses in two level inverters and insome three level inverter topologies are well known. Herea complete analytical calculation of power semiconductorlosses for different five level inverter topologies is presented.Conduction losses as well as switching losses are included inthe calculations. These are based on the power semiconductordatasheet information using a simplified model. The derivedequations are applied to the different topologies and theresults are compared to each other.

Keywords—multilevel inverters, losses, power semiconduc-tors.

I. INTRODUCTION

In order to design the cooling system of a PWM inverterthe determination of the expected power dissipation in thepower semiconductors is of great importance. By evaluat-ing the losses the maximum power rating and the expectedefficiency of the inverter can directly be calculated. Mainlyblocking losses as well as driving losses are neglectedwhen evaluating the converter losses. So for the calculationof the losses only two parts have to be considered, theswitching and the conduction losses [1].

The losses in power semiconductor circuits can bepredicted with different methods. One way is the completenumerical simulation of these circuits by means of specialsimulation programs which also include detailed models ofthe used power semiconductors and allow a simultaneousloss calculation. The other possibility is to calculate thebehavior of the electrical circuit analytically [2]. Oftensimplified calculations are used as this method avoidsextensive and complex mathematical problems. These sim-plified calculations give a quick result with an appropriatesolution with minimized calculation effort. Furthermorethe analytical method has the advantage of getting directinformation about the losses in each power semiconductorand their nature. With this information optimization stepscan be applied to the inverter, e.g. select the powersemiconductors in parts of the inverter well fitted to theirexpected main loss component. This method is well knownfor the two level inverter [1], [3] and the three levelinverter [4], [5].

In this contribution the subject is the complete analyticalcalculation of the power semiconductor losses occurringin different multilevel topologies, shown here for the fivelevel case. The investigated topologies are the NeutralPoint Clamped five level inverter (NPC) and the Flying

Capacitor five level inverter (FC). The aim is to predictthe losses most exactly and to have a good basis for acomparison of the different inverter topologies. Also thedependency of losses on circuit parameters and on theoperation point can be further investigated.

These investigations are done for the application ofmultilevel inverters at low voltage level (400V grid). Thusthe required blocking voltage of the power semiconductorsis very low, which allows the usage of MOSFETs. WithMOSFETs the reverse conducting channel has to be takeninto account, leading to different power loss equationswhen compared with IGBT based inverters.

In the following sections the occuring power semi-conductor losses for the mentioned multilevel topologiesare examined regarding their nature and variations due todifferent operation points. In each section the basic circuitand the used extended loss model is explained. A linearapproach is used here for the analytical expressions whichallows a quick calculation of power semiconductor lossesbased on datasheet information as it is introduced in II.The method is applied to the five level NPC inverter in IIIand to the five level FC inverter in IV. The derived analyticequations are applied to the topologies with data sheetinformation in section V and compared to each other. InSection VI a conclusion summarizes this paper and theinvestigations.

II. LOSS MODEL

A. Conduction LossesBasically the conduction losses in a MOSFET are given

by (1), here with the grid period value T , the on statedrain source restistance rDS,on and the drain current iD.Diode conduction losses can be linearily approximized bymeans of the threshold voltage vF,0, the differential ohmicresistance rF and the forward current iF as it is denotedin (2) [6].

PC,M =1

T

∫ T

0

rDS,on · i2D(t) dt (1)

PC,D =1

T

∫ T

0

(vF,0 · iF(t) + rF · i2F(t)

)dt (2)

In order to evaluate the conduction losses in convertersthe switched on time of each MOSFET must be takeninto account. This is done according to [7] by applyinga modulation function α(t) which describes the turn ontime of the MOSFET related to the switching periodover the time. Therefore the load current is assumedto be sinusoidal (current ripple neglected) and also asinusoidal carrier based modulation technique is used here.

Additionally the switching frequency is assumed to beconstant for this approach. The load current is given in (3)with the phase displacement angle ϕ, the grid peak currentvalue I and the grid angular frequency ω = 2πf = 2π

T(here: f = 50Hz).

i(t) = I sin(ωt− ϕ) (3)

This leads to (4) and (5) with the time variant modula-tion function α(t).

PC,M =I2rDS,on

T

∫ T

0

α(t) sin2(ωt− ϕ) dt (4)

PC,D =1

T

∫ T

0

(vF,0 · I sin(ωt− ϕ)

+ rF · I2 sin2(ωt− ϕ))α(t) dt (5)

The modulation function α(t) has to be derived properlyfor each converter topology and modulation technique.Also the integration limits will change with respect tothe modulation function. This is done in the followingsections.

B. Switching LossesA widely used way to calculate the switching losses in

semiconductor devices is to utilize the switching energyemitted. The switching energy depends on the actualcurrent i(t) and can be approximated to have a parabolicshape with constants of proportionality k1 and k2 givenin (6).

e(i(t)) = k1 · i(t) + k2 · (i(t))2 (6)

Often these switching energies are not given directly forMOSFETs. They can be calculated according to [8], [9]from other datasheet data or evaluated experimentally. Theswitching losses of the power semiconductors can thenbe calculated as the sum of each occuring switching lossgiven in (7) with the frequency of the PWM carrier fc andthe angles β and γ which are the limits for the switchingregions.

PS = f

bγ fcω c∑

k=dβ fcω e

e

(i

(kω

fc

))(7)

The limits β and γ must be derived from the occur-ing commutation paths. For fc f equation (7) can betransformed into a continuous form given in (8).

PS =fc2π

∫ γ

β

e(i(t))dωt (8)

Here it is assumed that the switching loss energy showslinear behavior (k2 = 0). With (3) this leads to

PS(k1)∣∣∣γβ=fc2π

∫ γ

β

k1 · i(t) dωt (9)

=fc · k1 · I

2π

∫ γ

β

sin(ωt− ϕ) dωt (10)

=fc · k1 · I

2π·(cos(β − ϕ)− cos(γ − ϕ)

). (11)

In the following sections the integration limits are derivedfor each topology.

III. ANALYTICAL CALCULATION OF LOSSES IN FIVELEVEL NEUTRAL POINT CLAMPED INVERTERS

A. Basic CircuitThe five level NPC inverter shown in Fig. 1 consists

of eight MOSFETs in each phase leg, leading to 24MOSFETs in the whole inverter. Each of them must beable to block at least Vdc

4 . The different voltage levels areconstructed by means of six clamping diodes per phaseleg connected to the dc link which consists of four seriesconnected dc link capacitors, each holding a fourth of theoverall dc link voltage which must be actively controlled.

Fig. 1. Phase leg of a five level NPC inverter

The NPC inverter is usually driven by a level shiftedsinus triangle modulation. A phase disposition multicarrierbased PWM is used here [10], [11]. The modulationfunction is given by (12) with the modulation index M .This modulation function is also applied to the othertopologies.

m(t) =M sin(ωt) (12)

For this topology four level shifted triangular carriersignals with the same frequency fc are used in combina-tion with the modulation function (12) in order to generatethe output voltage. Note that no 3rd harmonic insertion isused here and it is assumed that the dc link capacitors arealways balanced. The following derivations are only validfor M > 0.5.

B. Conduction LossesIn order to calculate the conduction losses, the modu-

lation function α(t) has to be derived for each MOSFET.Fig. 2 shows the used modulation function and the fourtriangular carrier signals. As it can be seen the times t1and t2 mark the beginning and end of the switching phaseof the MOSFET M1, so these times have to be derived:

t1 =1

ωarcsin

(0.5

M

)(13)

t2 =T

2− t1 =

1

ω

(π − arcsin

(0.5

M

))(14)

Fig. 2. Phase disposition PWM for the 5 level NPC inverter with theswitching patterns of M1 and M2 (frequency of the triangle carrier signalslowered for the purpose of clarity), inductive load current (green)

The next step is to evaluate the modulation functionfor each MOSFET. The modulation functions are not onlydepending on t1 and t2. The phase displacement angleϕ has also an influence on the modulation functions andleads to three different cases:

1) 0 ≤ ϕ < ωt12) ωt1 ≤ ϕ < ωt23) ωt2 ≤ ϕ < ωπ

When neglecting the deadtime, which is allowed forthe conduction losses, the intrinsic body diodes have noconduction losses because of the clamping diodes andthe reverse conducting ability of the MOSFETs. Thefollowing equations are only shown for inductive loadcurrents (ϕ > 0). Capacitive operation points result insimilar solutions, but lead to the same conduction losses:

PC,cap(ϕ) = PC,ind(|ϕ|) (15)

Due to symmetrical behavior some losses are equal,which is independent of the phase displacement angle:

PC,M1 = PC,M8 (16)PC,M2 = PC,M7 (17)PC,M3 = PC,M6 (18)PC,M4 = PC,M5 (19)PC,D1+ = PC,D3- (20)PC,D2+ = PC,D2- (21)PC,D3+ = PC,D1- (22)

So it is not necessary to derive the modulation functionsfor all power semiconductors. The total conduction lossesof the three phase five level NPC inverter can then becalculated with (23).

PC,5L-NPC = 6 · (PC,M1 + PC,M2 + PC,M3 + PC,M4

+ PC,D1+ + PC,D2+ + PC,D3+) (23)

In Fig. 3 the modulation functions and the resultingpower semiconductor currents are shown for M = 0.85and ϕ = 7

18π. It can be seen, that the modulation functionsare discontinuous. They are expressed mathematically forall needed cases in the following.

Fig. 3. Currents in p.u. through the MOSFETs and the clampingdiodes (blue) and resulting modulation functions (red) for M = 0.85and ϕ = 7

18π (five level NPC inverter)

First case: 0 ≤ ϕ < ωt1

αM1 =

2M sin(ωt) − 1, if ωt1 ≤ ωt < ωt2,0, otherwise.

(24)

αM2 =

2M sin(ωt), if ϕ ≤ ωt < ωt11, if ωt1 ≤ ωt < ωt2,2M sin(ωt), if ωt2 ≤ ωt < π,0, otherwise.

(25)

αM3 =

1, if ϕ ≤ ωt < π,2M sin(ωt) + 1, if π ≤ ωt < π + ϕ,0, otherwise.

(26)

αM4 =

1, if ϕ ≤ ωt < π + ϕ,0, otherwise.

(27)

αD1+ =

2M sin(ωt), if ϕ ≤ ωt < ωt1,2 − 2M sin(ωt), if ωt1 ≤ ωt < ωt2,2M sin(ωt), if ωt2 ≤ ωt < π,0, otherwise.

(28)

αD2+ =

1 − 2M sin(ωt), if ϕ ≤ ωt < ωt1,1 − 2M sin(ωt), if ωt2 ≤ ωt < π,1 + 2M sin(ωt), if π ≤ ωt < π + ϕ,0, otherwise.

(29)

αD3+ =

−2M sin(ωt), if π ≤ ωt < π + ϕ,0, otherwise.

(30)

Second case: ωt1 ≤ ϕ < ωt2

αM1 =

2M sin(ωt) − 1, if ωt1 ≤ ωt < ωt2,0, otherwise.

(31)

αM2 =

2M sin(ωt) − 1, if ωt1 ≤ ωt < ϕ,1, if ϕ ≤ ωt < ωt2,2M sin(ωt), if ωt2 ≤ ωt < π,0, otherwise.

(32)

αM3 =

2M sin(ωt) − 1, if ωt1 ≤ ωt < ϕ,1, if ϕ ≤ ωt < π,2M sin(ωt) + 1, if π ≤ ωt < π + ωt1,0, otherwise.

(33)

αM4 =

2M sin(ωt) − 1, if ωt1 ≤ ωt < ϕ,1, if ϕ ≤ ωt < π + ωt1,2M sin(ωt) + 2, if π + ωt1 ≤ ωt < π + ϕ,0, otherwise.

(34)

αD1+ =

2 − 2M sin(ωt), if ϕ ≤ ωt < ωt2,2M sin(ωt), if ωt2 ≤ ωt < π,0, otherwise.

(35)

αD2+ =

1 − 2M sin(ωt), if ωt2 ≤ ωt < π,1 + 2M sin(ωt), if π ≤ ωt < π + ωt1,0, otherwise.

(36)

αD3+ =

−2M sin(ωt), if π ≤ ωt < π + ωt1,2 + 2M sin(ωt), if π + ωt1 ≤ ωt < π + ϕ,0, otherwise.

(37)

Third case: ωt2 ≤ ϕ < π

αM1 =

2M sin(ωt) − 1, if ωt1 ≤ ωt < ωt2,0, otherwise.

(38)

αM2 =

2M sin(ωt) − 1, if ωt1 ≤ ωt < ωt2,2M sin(ωt), if ϕ ≤ ωt < π,0, otherwise.

(39)

αM3 =

2M sin(ωt) − 1, if ωt1 ≤ ωt < ωt2,1, if ϕ ≤ ωt < π,2M sin(ωt) + 1, if π ≤ ωt < π + ωt1,2M sin(ωt) + 1, if 2π − ωt1 ≤ ωt < π + ϕ,0, otherwise.

(40)

αM4 =

2M sin(ωt) − 1, if ωt1 ≤ ωt < ωt2,1, if ϕ ≤ ωt < π + ωt1,2M sin(ωt) + 2, if π + ωt1 ≤ ωt < 2π − ωt1,1, if 2π − ωt1 ≤ ωt < π + ϕ,0, otherwise.

(41)

αD1+ =

2M sin(ωt), if ϕ ≤ ωt < π,0, otherwise.

(42)

αD2+ =

1 − 2M sin(ωt), if ϕ ≤ ωt < π,1 + 2M sin(ωt), if π ≤ ωt < π + ωt1,1 + 2M sin(ωt), if 2π − ωt1 ≤ ωt < π + ϕ,0, otherwise.

(43)

αD3+ =

−2M sin(ωt), if π ≤ ωt < π + ωt1,2 + 2M sin(ωt), if π + ωt1 ≤ ωt < π + ωt2,−2M sin(ωt), if π + ωt2 ≤ ωt < π + ϕ,0, otherwise.

(44)

The resulting conduction losses can then be calculatedwith (4) for the MOSFETs and with (5) for the clampingdiodes. The resulting equations after solving the integralsare very long and thus only the conduction losses forMOSFET M1 are shown in (45) which are valid for0 ≤ ϕ < π.

PC,M1 =rDS,onI

2

24π

(12 arcsin

(1

2M

)+ 12

√4M2 − 1

− 6π +1

M2cos (2ϕ)

√4M2 − 1

3)

(45)

C. Switching LossesDue to symmetries the switching loss calculation can

be reduced as it is shown in the following equations:

PS,M1 = PS,M8 (46)PS,M2 = PS,M7 (47)

PS,M3 = PS,M6 (48)PS,M4 = PS,M5 (49)PS,D1+ = PS,D5- (50)PS,D3+ = PS,D3- (51)PS,D5+ = PS,D1- (52)PS,MD8 = PS,MD1 (53)

The switching losses of the MOSFET channel and theintrinsic body diode are separately calculated. The indexMD8 correspondents to the body diode of MOSFET M8resp. MD1 to the body diode of M1. Note that the com-mutation paths are always through the clamping diodes orthe body diodes of M8 or M1.

In the following the switching losses of the MOSFETsand diodes are written in a combined form. This meansthat the limits for the integrals are the same but not theresulting losses! The losses must be calculated with thecorresponding switching loss coefficient k1,x, e.g. k1,M1or k1,D1+ together with (11).

First case: 0 ≤ ϕ < ωt1

PS,M1/D1+ = PS (k1,M1/D1+)∣∣ωt2ωt1

(54)

PS,M2/D2+ = PS (k1,M2/D2+)∣∣ωt1ϕ

+ PS (k1,M2/D2+)∣∣πωt2

(55)

PS,M3/D3+ = PS (k1,M3/D3+)∣∣π+ϕπ

(56)

Second case: ωt1 ≤ ϕ < ωt2

PS,M1/D1+ = PS (k1,M1/D1+)∣∣ωt2ϕ

(57)

PS,M2/D2+ = PS (k1,M2/D2+)∣∣πωt2

(58)

PS,M3/D3+ = PS (k1,M3/D3+)∣∣π+ωt1π

(59)

PS,M4/MD8 = PS (k1,M4/MD8)∣∣π+ϕπ+ωt1

(60)

Third case: ωt2 ≤ ϕ < π

PS,M2/D2+ = PS (k1,M2/D2+)∣∣πϕ

(61)

PS,M3/D3+ = PS (k1,M3/D3+)∣∣π+ωt1π

+ PS (k1,M3/D3+)∣∣π+ϕπ+ωt2

(62)

PS,M4/MD8 = PS (k1,M4/MD8)∣∣π+ωt2π+ωt1

(63)

For the calculation of the coefficients of proportionalityk1,x according to [8], [9] the reverse recovery charge ofthe commutating diode has to be used for the evaluation ofthe switch on energy of the MOSFETs. The devices withthe same integration limits in (54)-(63) are commutatingtogether.

For the MOSFETs the turn on energy (with respect tothe reverse recovery charge of the commutating diode) andturn off energy has to be included in k1,Mx. For the diodesonly the turn off energy has to be included in k1,Dx.

The resulting switching losses can then be calculatedwith (64) and the total losses of the NPC inverter with(65).

PS,5L-NPC = 6 · (PS,M1 + PS,M2 + PS,M3 + PS,M4

+ PS,D1+ + PS,D2+ + PS,D3+ + PS,MD8) (64)

P5L-NPC = PC,5L-NPC + PS,5L-NPC (65)

Fig. 4. Phase leg of a five level FC inverter

IV. ANALYTICAL CALCULATION OF LOSSES IN FIVELEVEL FLYING CAPACITOR INVERTERS

A. Basic CircuitThe five level FC inverter shown in Fig. 4 consists

of eight MOSFETs in each phase leg, leading to 24MOSFETs in the whole inverter. Each of them must beable to block at least Vdc

4 . The different voltage levelsare constructed by means of three floating capacitorsconnected to a part of each phase leg. The voltage overthese flying capacitors decreases with Vdc

4 when goingfrom the outside to the inside, leading to three differentflying capacitor voltages. It is important to ensure that thecapacitor voltage is held constant on the desired value,especially when loading the outer dc link capacitance [12],[13]. Unbalances can lead to too high voltages over theMOSFETs, which can destroy the inverter. The capacitorscan be balanced by means of redundant switching states.

Flying capacitor inverters are usually operated withphase shifted PWM, in the five level case with four fullamplitude triangle carrier signals phase shifted by 90degree to each other [10], [14]. Here the phase shiftedPWM is used in combination with (12) to generate theswitching signals, not taking into account that differentswitching patterns may be used to balance the flyingcapacitor voltages by means of redundant switching states.The PWM scheme is shown in Fig. 5.

B. Conduction LossesFor the calculation of the conduction losses the mod-

ulation functions have to be derived for all MOSFETs.When neglecting the deadtime, which is allowed forthe conduction losses, the intrinsic body diodes have noconduction losses because of the reverse conducting abilityof the MOSFETs.

The losses in the FC inverter are independent of thephase displacement angle ϕ, which is caused by thephase shifted PWM scheme. Due to symmetries there areonly two modulation functions – (66) for the upper fourMOSFETs and (67) for the lower four MOSFETs. Thecurrents and modulation functions are shown in Fig. 6 forboth cases.

αM1-M4 =1

2

(1 +M sin(ωt)

)(66)

Fig. 5. Phase shifted PWM for the 5 level FC inverter with the switchingpatterns of M1 and M2 (frequency of the triangle carrier signals loweredfor the purpose of clarity), inductive load current (green)

Fig. 6. Currents in p.u. through the MOSFETs (blue) and resultingmodulation functions (red) for M = 0.85 and ϕ = 7

18π (five level FC

inverter)

αM5-M8 =1

2

(1 +M sin(ωt− π)

)(67)

Equations (66) and (67) with (4) lead to the samesolution for all MOSFET conduction losses, which isshown in (68) and the total conduction losses of the threephase FC inverter in (69).

PC,M =1

4rDS,onI

2 (68)

PC,5L-FC = 24 · PC,M = 6 rDS,onI2 (69)

C. Switching LossesThe distribution of the switching losses depends only

on the current direction. With i(t) > 0 the MOSFETs M1,M2, M3 and M4 in combination with the intrinsic bodydiodes MD8, MD7, MD6 and MD5 produce switchinglosses. For i(t) < 0 these are M5-M8 and MD4-MD1.The phase displacement angle has no influence on theswitching losses as it can be seen in (71).

PS,M1-M8/MD8-MD1 = PS (k1,M1-M8/MD8-MD1)∣∣π+ϕϕ

(70)

=fcI

π· k1,M1-M8/MD8-MD1 (71)

When considering the same MOSFET type for all powersemiconductors in the FC inverter, the total switchinglosses can be evaluated with (72). The total losses of thethree phase FC inverter can then be calculated with (73).

PS,5L-FC = 24 · (PS,Mx + PS,MDx) (72)P5L-FC = PC,5L-FC + PS,5L-FC (73)

Fig. 7. Calculated conduction losses for the five level FC (left) andNPC (right) inverter as a function of ϕ and the loss distribution over thepower semiconductors

TABLE IUSED PARAMETERS FOR THE LOSS COMPARISON

Parameter NPC FC

I 20.5 AM 0.85rDS,on 80 mΩ

k1,M1, k1,M2, k1,M3 54.4 µJ/A 68.8 µJ/Ak1,M4, k1,M5 68.8 µJ/A

k1,M6, k1,M7, k1,M8 54.4 µJ/A 68.8 µJ/Ak1,MD1 - k1,MD8 16.6 µJ/A

k1,D1+, k1,D2+, k1,D3+ 2.3 µJ/A –D1+/D2+/D3+: vF0 0.75 V –D1+/D2+/D3+: rF 44 mΩ –

fc 16 kHz 4 kHzf 50 Hz

V. RESULTS OF POWER SEMICONDUCTOR LOSSCALCULATION

With the resulting equations the occuring losses cannow be calculated. Here the parameters from Table I areused. For the NPC inverter clamping diodes with lowerswitching loss energy in comparison to the body diodesof the MOSFETs are chosen, because this is usually donein practice. The PWM carrier frequency of the FC inverteris set to 1

4 of the NPC PWM carrier frequency in order tohave the same output current ripple at the AC side.

The results are shown in Fig. 7 for the conductionlosses and in Fig. 8 for the switching losses. It can beseen that the losses are not equally distributed in the caseof the NPC and the loss distribution additionally stronglydepends on the phase displacement angle ϕ. With the usedparameters the FC inverter produces more losses in thechosen operation points.

With the calculated losses and the knowledge of the oc-curing losses in the desired operation points it is possibleto apply optimization in terms of power semiconductorrating.

VI. CONCLUSION

In this contribution methods for analytical calculation ofpower semiconductor losses in different five level multi-level topologies are presented. The investigated topologiesare the five level NPC and the five level FC inverter.The methods are applied to each inverter topology with

Fig. 8. Calculated switching losses for the five level FC (left) and NPC(right) inverter as a function of ϕ and the loss distribution over the powersemiconductors

given power semiconductor parameters and the resultsare compared to each other. The NPC inverter shows aslightly better performance, but the losses are not equallydistributed and depend strongly on the operation point.

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