articol - dewan - rectifier filter design.pdf

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IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS. VOL. IA-17, NO. 3, MAY/JUNE 1981 Optimum Input and Output Filters for a Single-Phase Rectifier Power Supply SHASHI B. DEWAN, SENIOR MEMBER, IEEE Abstract-The "optimum" output filter inductance Lf and the input filter capacitor Ci for a single-phase uncontrolled bridge rectifier employed for low power de-to-dc converters or inverters is established. The filter Ci is optimized to obtain maximum input power factor, minimum filter inductance, and minimum output dc voltage regulation. A design example is provided and theoretical results have been verified on an experimental model. INTRODUCTION FOR a power rating up to two kW, the dc input voltage for most dc-to-dc converters and inverters is often provided by means of a single-phase diode bridge rectifier. The output of the rectifier generally consists of a single section Lf-Cf filter which provides ripple-free dc voltage and attenuates the harmonics. Assuming the filter capacitance Cf is large in Fig. 1, this paper shows that for a given power output, the inductor Lf size is a compromise between the output dc voltage V variation with load and the input power factor. A detailed analysis is presented here which provides the relationship between the input power factor and the output dc voltage V when the per unit value of the filter inductor Lf is varied. The theoretical results also show that the best input power factor is achieved if the current io is discontin- uous under all load conditions and the input filter capacitor Ci is employed. This paper also establishes the optimum operating point for the single-phase bridge rectifier from the view point of maximum input power factor, minimum filter inductance and minimum output voltage V regulation from no-load to full-load. Finally a procedure for the selection of filter (Lf, Ci) components is illustrated by a design example and the theoretical results have been verified experimentally. SIMPLIFYING ASSUMPTIONS The analysis of the single phase diode bridge rectifier sys- tem in Fig. I is based upon the following assumptions. 1) The output filter capacitance Cf is assumed to be sufficiently large so that the output voltage V is a ripple-free constant dc voltage. 2) The ac source is considered ideal. 3) The losses in inductor Lf and the bridge rectifier are neglected. Paper IPCSD 80-1, approved by the Static Power Converter Com- mittee of the Industry Applications Society for presentation at the 1980 Industry Applications Society Annual Meeting, Cincinnati, OH, Septem- ber 28-October 3. Manuscript released for publication November 11, 1980. The author is with the Department of Electrical Engineering, the University of Toronto, Toronto, ON, Canada M5S 1A4. Lf Fig. 1. Single-phase diode bridge rectifier with "optimum" filter. 4) The load is modeled as a variable resistance since the effect of high frequency ripple is negligible as per assumption 1). Modes of Operation: Based upon the instant at which the current io goes to zero, the rectifier system in Fig. I has three possible modes of operation. Discontinuous Mode I (Fig. 2): The bridge rectifier operates in the discontinuous mode I if the output current io is dis- continuous and goes to zero before wt = sr. Discontinuous Mode II (Fig. 3): The bridge rectifier operates in the discontinuous mode II if the output current io is discontinuous and goes to zero at or < at < 7r + a. Continuous Mode (Fig. 4): The bridge rectifier operates in the continuous mode if the output current io never falls to zero. Analysis of the Rectifier in Discontinuous Mode I The voltage and current waveforms for discontinuous mode I operation of the rectifier are shown in Fig. 2. The analysis of this mode is presented in the following [1 ] -[41: V=s2E sin wt Vbase =Vf2E' (1) (2) Zbase W4f 'base -2E/()Lf) m = V/(V2E). (3) The angle ca at which diodes D1 and D2 conduction begins (v5 = V) is given by ca = sin- 1 m. (4) 0093-0094/81/0500-0282$00.75 i 1981 IEEE 282

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Page 1: Articol - Dewan - Rectifier Filter Design.pdf

IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS. VOL. IA-17, NO. 3, MAY/JUNE 1981

Optimum Input and Output Filters for aSingle-Phase Rectifier Power Supply

SHASHI B. DEWAN, SENIOR MEMBER, IEEE

Abstract-The "optimum" output filter inductance Lf and theinput filter capacitor Ci for a single-phase uncontrolled bridgerectifier employed for low power de-to-dc converters or inverters isestablished. The filter Ci is optimized to obtain maximum inputpower factor, minimum filter inductance, and minimum output dcvoltage regulation. A design example is provided and theoreticalresults have been verified on an experimental model.

INTRODUCTION

FOR a power rating up to two kW, the dc input voltage formost dc-to-dc converters and inverters is often provided

by means of a single-phase diode bridge rectifier. The outputof the rectifier generally consists of a single section Lf-Cffilter which provides ripple-free dc voltage and attenuates theharmonics. Assuming the filter capacitance Cf is large in Fig. 1,this paper shows that for a given power output, the inductorLf size is a compromise between the output dc voltage Vvariation with load and the input power factor.A detailed analysis is presented here which provides the

relationship between the input power factor and the outputdc voltage V when the per unit value of the filter inductorLf is varied. The theoretical results also show that the bestinput power factor is achieved if the current io is discontin-uous under all load conditions and the input filter capacitorCi is employed. This paper also establishes the optimumoperating point for the single-phase bridge rectifier from theview point of maximum input power factor, minimum filterinductance and minimum output voltage V regulation fromno-load to full-load. Finally a procedure for the selection offilter (Lf, Ci) components is illustrated by a design exampleand the theoretical results have been verified experimentally.

SIMPLIFYING ASSUMPTIONS

The analysis of the single phase diode bridge rectifier sys-tem in Fig. I is based upon the following assumptions.

1) The output filter capacitance Cf is assumed to besufficiently large so that the output voltage V is aripple-free constant dc voltage.

2) The ac source is considered ideal.3) The losses in inductor Lf and the bridge rectifier

are neglected.

Paper IPCSD 80-1, approved by the Static Power Converter Com-mittee of the Industry Applications Society for presentation at the 1980Industry Applications Society Annual Meeting, Cincinnati, OH, Septem-ber 28-October 3. Manuscript released for publication November 11,1980.

The author is with the Department of Electrical Engineering, theUniversity of Toronto, Toronto, ON, Canada M5S 1A4.

Lf

Fig. 1. Single-phase diode bridge rectifier with "optimum" filter.

4) The load is modeled as a variable resistance since theeffect of high frequency ripple is negligible as perassumption 1).

Modes of Operation: Based upon the instant at which thecurrent io goes to zero, the rectifier system in Fig. I has threepossible modes of operation.

Discontinuous Mode I (Fig. 2): The bridge rectifier operatesin the discontinuous mode I if the output current io is dis-continuous and goes to zero before wt = sr.

Discontinuous Mode II (Fig. 3): The bridge rectifieroperates in the discontinuous mode II if the output currentio is discontinuous and goes to zero at or < at < 7r + a.

Continuous Mode (Fig. 4): The bridge rectifier operatesin the continuous mode if the output current io never fallsto zero.

Analysis of the Rectifier in Discontinuous Mode I

The voltage and current waveforms for discontinuous modeI operation of the rectifier are shown in Fig. 2. The analysisof this mode is presented in the following [1 ] -[41:

V=s2E sin wt

Vbase =Vf2E'

(1)

(2)Zbase W4f

'base -2E/()Lf)m = V/(V2E). (3)

The angle ca at which diodes D1 and D2 conduction begins(v5 = V) is given by

ca = sin- 1 m. (4)

0093-0094/81/0500-0282$00.75 i 1981 IEEE

282

Page 2: Articol - Dewan - Rectifier Filter Design.pdf

DEWAN: FILTERS FOR A SINGLE-PHASE RECTIFIER

To obtain the conduction angle 7y notice that the two cross-hatched areas in Fig. 2 have the same volt-seconds, i.e.,

f VI2E sin wtd(cot) - V(r -2a)

= V(,B--r±+a)- f V2E sin cotd(ct)

where

= y + a.

From (3), (5), and (6) the following equation results, fromwhich y is calculated.

Fig. 2. Time variation of currents and voltages in circuit of Fig. I withdiscontinuous mode I.

cos a - cos (a + y) -m.y=0. (7)

The variations of io during conduction angle y is obtainedfrom

vr2E sin wt - V = Lf * dio/dt,

:wt~ ~ ~~ir w

Tr, 2TI wt

,TT- W~fk 2 7 wt

a0 &t< Tr (8)

in which io = 0 at wt =a. Then

io = [vr2E (cos a-cos t)-V(tt-a)]/(cLf),a<cot<Ir. (9)

From (2), (3), and (9) the normalized output current becomes

iOn - io/Ibase = cos a -cos cot -m(Cot - a),

a<.t6Tr. (10)

The normalized average output current from (10) is

Fig. 3. Time variation of currents and voltages in circuit of Fig. 1with discontinuous mode II.

O i+, dI0n_- io n d((Jt)

7r c

-=- [y cos a + sin a - sin (a + y)-m2/2,?r

a < wt < iT

I, ;2Tr

wt

0 rr 2 rT t

Time variation of currents and voltages in circuit of Fig. 1 withcontinuous current mode.

(1 1)

and the normalized root-mean-square (rms) output current isgiven by

ar+t 1/2Iorn = [ f Ion2 d(wt) 1 a < t < r. (12)

L 7r J

The input power factor (without CQ) is calculated from the fol-lowing expression in which the normalized rms input currentIarn is the same as the normalized rms output current Iorn

(PF) V * Ion/(E * Iarn)

=V * Ionl(E *Iorn)

- '/VimIO n/Io rn

v

(5)

(6)

V2-EVVS

0

V2EVv0

0iI°0

OlTf

0

V2EVSV

0

v0

0oIo

Fig. 4.

-)%-'I :%"1. It %

t %,

1-x I IN

_,-

W--t

z x I I1,

:11%

If '.

f v 1.--I

---4

283

TT 2 Tr-

11

(1 3)

Page 3: Articol - Dewan - Rectifier Filter Design.pdf

IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS, VOL. IA-1 7. NO. 3, MAY/JtUNE 1981

Analysis of the Rectifier in Discontinulious Mode 11

Thie voltage and currenit waveforms for discontinuous mode1I are displayed in Fig. 3. Diodes D1 and D2 start to conductat angle a given by (4). For that part of the output currentio in Fig. 3 from at to 7r, (8)-(l 1) also hold so that the normal-ized output current at wt = 7r from (10) results in

Io1=cos a 1+ n7(7r- a). (14)

At wt = 7r diodes D1 and D2 are commutated, and diodes D3and D4 go into conduction. The differential equation for theoutput current io from wt = 7r to cot = 3 is then given by

V12Esin wt'= V+Lf -dio'/dt' 0.cut'<ea

and since the value of the OLItput voltage V is thle s.ime aUVO, (3) and (2 1 ) yield

V 2inm gE ==-= 0.637.

N/2-E ?r(22-)

Equation (22) shows that in a continuous mode of operationthe value of normalized capacitor voltage in remains coni-stant and equal to 2/r. From [4], the Fourier series of therectified voltage vo is

vo =V2E 2/O4

n = 2 ,4 ,6 , -

(15)

4 -cos nct

7r(n - l)(n + 1)

(23)

in which wt = cot -r.From (3), (15), and the initial condition specified by (14), from which the output current results in

the normalized output current from ir to 3 in Fig. 3 yields DO

ioIo+ y Qncosnwti0n'= (I-COSSt' m- t ) +Ion- (16) n =2,4,6

For operation in the discontinuous mode II, the current whereion' falls to zero at an instant wt' = wt1' where 0 < wt1' <a and is obtained by solving the equation Io = (2v2E/r -V)/r,

(24)

(25)

mctl + cos Cotl = 1 + IO,rn (17)

Therefore, the conduction angle y is given by

z = r + cot, - a. (18)

In mode II, the normalized, average, and rms outputcurrents, respectively, are given by

if Lf has a resistance equal to r. However, r is negligible so thatthe average output current Io is determined by the load.From Fig. 1 and (2) and (23) the amplitude of each outputcurrent harmonic is

Cn = -)2(± nn r

7r(n -1)(n + I)nwLf

ion = - ion d(wt) + iOn d(ct')J

and

Iorn = K- (ion)2 d(ct)

wtj 11/2+ (ion0)2 d(t')_

(19) 4- '~~~~~base7r(n - 1)(n ±l)n

which yields the output rms ripple current to be

Io ri = [ IOnr]_n=2,4,6,..

(20) = 00

:= I;E n = 2 ,4 ,6 , -

in which ion and io,' are providedby (10) and (16). Finally,the input power factor (without C1) in this mode is the same as

in mode I and given by (13).

Analysis of the Rectifier in Continuous Mode

Fig. 4 shows the current and voltage waveforms of the cir-cuit in Fig. 1 in a continuous mode of operation. The average

value of the rectifier output voltage V0 is

Therefore, the output rms current is

IOrQ=(I 2±+ ri2)112 (28)

and the input power factor (without CQ) in a continuousmode of operation is

(PF) = VIO/EIO r = VIO/E(1O2 + Io ri2 )1/2

2 orV0 =-r/E (21) (F)= V/E[ I(IOrj/I0)]

(29)

(30)

(26)

(27)

284

1/2(Cn/N[2-)2

Page 4: Articol - Dewan - Rectifier Filter Design.pdf

DEWAN: FILTERS FOR A SINGLE-PHASE RECTIFIER

Neglecting all the current harmonics above sixth, the outputrms ripple current from (26) and (27) is

Iori = II02r + I04r + I06r 1 /

while for the continuous mode, (32). (36), and (22) give(PF) = 0.9/[l + (0.097/Pn)2] 1/2. (38)

For all modes, the normalized capacitor voltage from (36) is

m =nIn

* Ibase 0.1525 Ibase- (31)

Putting (3), (22), and (31) into (30) gives the followingexpression for the input power factor (without CQ) in thecontinuous mode

(PF) = 0.9/[1 + (0.1525/Ion)2] 1/2 (32)

in which Ion = IO/Ibase is the normalized average outputcurrent.

DETERMINATION OF THE OPTIMUM OPERATING POINTFOR THE RECTIFIER

The object of this section is to determine the optimumoperating point for the bridge rectifier (Fig. 1) from the pointof view of maximum input power factor, minimum filterinductance, and minimum output voltage regulation.

For the purpose of relating input power factor and outputvoltage regulation to filter inductance Lf for various modes ofoperation, a new parameter "normalized power Pn" is definedas follows:

Pn = PO/Pbase (33)where

PO = output power

Pbase = base power = Vbase 'Ibase= 2E2/WLf. (34)

Therefore, if the output power Po is constant, then the param-eter Pn is a measure of filter inductance Lf. The parameter mis henceforth used to represent the output dc voltage regu-lation. The higher the value of m, the better the outputvoltage regulation.

Equation (13) gives the expression for the input powerfactor for discontinuous modes I and II

(PF) =V2mIon/Iorn = N2m/form factor. (35)

Also, for all modes from (33), (34), and (3), it results in

Pn = Po/pbase = VIO/ Vbase 'Ibase = mIon (36)

where Ion is the normalized average output current. Therefore,for discontinuous modes I and II, (35) and (36) yield

(39)

The Optimum Operating PointFig. 5 shows the variation of the input power factor (with-

out CQ) and the normalized capacitor voltage against normal-ized power for constant output power. The Appendix explainsthe method used in plotting these curves. In discontinuousmode I the input power factor increases as the normalizedcapacitor voltage m decreases. Equations (33) and (34) showthat the filter inductance requirement for constant outputpower also increases. However, the power factor curve be-comes flat around m = 0.79 (PF = 0.763) and then decreasesdown to a value of 0.731, when the current becomes con-tinuous. In the continuous mode the normalized capacitorvoltage remains constant, and increasing filter inductancereduces the ripple current and therefore the power factorincreases. In the limit, when filter inductance is infinite,the power factor approaches 0.9.

The reduction in power factor after m = 0.79 is due to thechanges in the current wave shape in discontinuous mode II.Fig. 6 shows the variation of form factor with normalizedcapacitor voltage m. Below m = 0.79, the rate of decrease ofthe form factor reduces and therefore the power factor re-duces.

Fig. 5 shows that if the rectifier output current is discon-tinuous, the output voltage regulation is low (regulation =(2E -V)/V = (1 -m)/m) and the filter inductance require-ment is also low. However, the maximum attainable powerfactor, with no Ci at the front end of Fig. 1, is only 0.763.If the rectifier output current io is continuous, then the powerfactor is high (around 0.9); however, the output voltage Vregulation and the filter inductance requirements are veryhigh.

The optimum operating point in the discontinuous currentregion is at m = 0.79 at which the input power factor ismaximum. The output voltage regulation is 27 percent. Forthe same output power and power factor if the operating pointis chosen in the continuous current region, then a filter induc-tance three times larger is required (Lf2ILf = PI,2/P n1 =(1.55 X 10-1 )/(5.2 X 10- 2) 3)andthenormalizedcapacitorvoltage is only 2/nr, which yields the voltage V regulation to be57 percent.

Therefore, from the viewpoint of the power factor, filterinductance requirement, and the output voltage regulation,the overall optimum operating point at rated output power isin the discontinuous current region at which the power factoris maximum.

SELECTION OF FILTER INDUCTANCEFor the optimum operating point (m = 0.79), the value of

normalized powerPn from Fig. 5 is given by

(37) Pn=5.2X 10-2.

285

4 2 1/2

7r(n 1)(n + I)n,,1-2

(PF) -NT2Pn1Iorn (40)

ya

n = 2,4,6

Page 5: Articol - Dewan - Rectifier Filter Design.pdf

2E6LLE TRANSACTIONS ON INDUSTRY APPLICATIONS. VOL. IA-17, NO. 3, MAY/JMlNE 181

(>P \m 4;P )0.8 0. 9\0.763 / °0~~~~~'~~~ 0.731O . 7 / 0t++ _ _ _____< _ .8

P F /0 ^ 5 * ~~~~~~~~79,"\{/ \ Q,~~0725

V 2/wT=0.637>,0_5______Continuous _ 0.6

ModeDiscontinuous

/II DMode I _ Discontinuous Mode II1-5 2x_g21T-, , 1

_~~~7~ III r-4 -3 2 1 1

INPUT POWER FACTOR IMPROVEMENT

For any power supply, an inpuit power factor ot aft least0.8 is desir-able. However, for the optimum operating poinltchosen in the preceeding section. the input powei- tfactoi isonly 0.763 and therefore needs further inmprovemenit. Powerfactor improvement by means of a front end capacitoI Ci(Fig. 1) is discussed in this section. The value of Ci is selectedsuch that the fundamental input power factor at rated load isunity. The normalized rectifier input current ia,, for disconi-tinuous mode I (Fig. 1) is represented by the following Fourierseries:

00 00

ian = I G, cos nwt + E H,, sin flcotn=1 n = I

(42)

10 p 102n

Fig. 5. Variation of input power factor (PF) and normalized capacitorvoltage (m) versus normalized power (Pn) in various modes of rec-tifier operation for system in Fig. 1.

(PF)°0.75

4.0 \ .1

0.74

0.73

0.72

3.0 ~~~~~~~~~~0.710.7-

2 .5 Discontinuous 0 9Mode I Mode II

.682.0 i .67.0.67

'Form factor 0.661.5 '_ ~ \ 0.65

0.640 0.725 0 0 0

0.67 0.71 0.75 0.79 0.83 0.87 0.91 0.95

Fig. 6. Variation of input power factor (PF) and form factor versus

normalized capacitor voltage (m) in discontinuous modes I andII. Theoretically predicted. ooo: Experimentally observed.

Therefore, the filter inductance is given byPn =PO/Pbase = wLfPol2E2

or

Gn-- ian cos nwt dwt7r (

I a+ _i-LL~ioncosnct dwtI

2 0+7+ f ]Hn =-I iO n sin nwt dcot ,

7r a

n odd

n odd

(43)

(44)

where ion is given by (10). Therefore

ian = Kn sin (ncot+ On)n odd

(45)

where the source voltage vs = /-aE sin ot is the reference and

Kn = (Gl2 + Hn2)1/2

Ol,= tan- (Gn/Hn).

(46)

(47)For the optimum operating point (in = 0.79), the values ofKn and 0,, are summarized in Table I. The value of Ci toimprove the fundamental power factor to unity is derivedfrom Fig. 7, in which IC,, Iai,r and Iijr are the rms values ofthe fundamental components of capacitor Ci, rectifier input,and total input currents, respectively. Therefore,

E X/-2E 0.121sin30.970

Xci cLf Xor

Lf = (2E2/coPo )Pn H (41)

where

source frequency in radians per second;PO rated output power;

E rms ac voltage.

Example

Let E = 115 V, o = 377 rad/s (60 Hz), andPo= 1.2 kW.

Therefore the optimum filter inductance

2(115)2 -(5.2X 10-2)f 377 X 1200

) Ci = 0.121 sin 30.970/lLf. (48)

The apparent input power factor after installation of capac-

itor Ci is

PF* = V IIo n(FIirn) = 2m * Io n/Iirn

in which lOn and I,,n are the normalized, average outputcurrent (m = 0.79), and rms input current, respectively.

Ion = 0.066, for m = 0.79

Iirn = [jilr ±Ii3r +Ii5rI

1[Iir2 +Ia3r +Ia5r]1vf2-

(50)= 3 mH.

0-ia.01a404a

0

U1a0t

286

(49)

Page 6: Articol - Dewan - Rectifier Filter Design.pdf

DEWAN: FILTERS FOR A SINGLE-PHASE RECTIFIER

TABLE IFOURIER COEFFICIENTS OF THE INPUT CURRENT WAVEFORMFOR THE OPTIMUM OPERATING POINT OF THE RECTIFIER

(m = 0.79)

OnHarmonic Number Kn (deg)

1 0.121 -30.973 0.060 81.415 0.012 -41.667 0.009 -13.299 0.005 5.77

11 0.003 44.0413 0.002 63.8815 0.001 88.74

0

V§E 0.121wL -

fv'

sin 30.97°

Re

Fig. 8. Circuit used in obtaining experimental results.

(a)Im

Ici = E/XC

Iil =LE 0 1

cos 30.97

30.97°0

<- I_a_r

(b)Re

0.121 F2E=

r- w

0

Fig. 7. Phasor diagram of currents for improvement of fundamentalinput power factor by front end capacitor Ci.

or

Iirn = [(0.21 COS 30.97°) + 0.062 + 0.0 122] 1/2

= 0.0852

PF* = 12-X 0.79 X 0.066/0.0852 = 0.865. (51)

0

0

0 .+4

(c) 0 H

-f7

t . . 4

.

441

\.

S/

7

I

2

till 1-44

v0

0

v0

0

v0

}-YI f I10

Fig. 9. Oscillograms of rectifier output voltage v0 and output currentio in different modes of operaion of system shown in Fig. 8. Uppertrace 50 V/div, 2 ms/div. Lower trace 10 A/div, 2 ms/div. (a) Dis-continuous mode I. (b) Discontinuous mode II. (c) Continuous mode.

SELECTION OF FILTER CAPACITANCE CfThe detailed analysis regarding the selection of filter

capacitance Cf is given in [4]. This analysis is basically basedon the calculation of the rms ripple voltage across Cf in mode I(the optimum operating point lies in this mode), neglecting thehigh frequency ripple due to the dc-to-dc converter or in-verter connected to Cf and considering only the 120-Hzripple from the rectifier output. The value of Cf for 5 percentharmonics on the capacitor voltage at the optimum operatingpoint (m = 0.79) from [4] is given by

Cf = lOPfp/m2W2Lf. (52)

ExampleFor the optimum operating point P,n = 5.2 X 10-2, m =

0.79, -= 377 rad/s (60 Hz) and Lf = 3 mH. Therefore,

Cf= 10 X (5.2 X 10-2)/(0.79)2 (377)2 (3 X 10-3)

= 1954 X 10-6 F

= 1954 PF.

EXPERIMENTAL VERIFICATIONFig. 8 shows the circuit used in obtaining the experimental

values of the form factor specified in Fig. 6. Also, the experi-mental waveforms of the rectifier output voltage v0 and out-put current io in different modes of operation are shown inFig. 9.

CONCLUSIONTheoretical results presented in this paper have been

verified experimentally and the agreement is close [4]. Thispaper has shown that the input power factor does not mono-tonically increase with increasing filter inductance. Conse-quently, the optimum rectifier operating point has beenshown to lie in the discontinuous mode. Significant powerfactor improvement can be achieved by installing a front endcapacitance. A design procedure has been described andillustrated by a numerical example.

APPENDIXThe curves in Fig. 5 apply to the operation of the rectifier

of Fig. I in discontinuous modes I, II, and the continuous

287

I

.2

Page 7: Articol - Dewan - Rectifier Filter Design.pdf

IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS, VOL. I.A\-17, NO. 3, MIAY/JUNE 1981

mode. The value of in establishes the criterion for distinctionof these three modes. In the continuous mode, ni is constantand equal to 2/rr. To find the value of ni bordering discontin-uous modes I and II, (4) and (7) are solved such that a + y

nr. In this case it results in

-y= 133.50 a-46.50 mi0.725.

To plot m and (PF) versus P, for mode I, the value of ni ischanged such that 1 > m > .725 (for in 1, a = 900 andy= 00). For each value of mn, a is calculated from (4), y from(7), Ion from ( 1), IOrn from (12), Pn from (36), and (PF)from (37). In mode II, m is changed such that 0.725 > m >2/2r. For each value of m, a is obtained from (4), Io2n from(14), ct1 ' from (17), -y from (18), I0n from (19), 0Iorn from(20), Pn from (36), and (PF) from (37). For the continuousmode, in remains constant and equal to 2/7r. The value of (PF)is calculated from (33) in which Pn is varied from the last

valuLe obtained for mode 11 witlh in 2/ (P, 1-.35 X I 4---)up to such a value beyond whliich nlo substantial increase illpower factor is noticed (P,2 O"

REFERENCESI J S. B. Dewan and A. Straughen, Power Semiconductor

Circuits. New York: Wiley. 1975, pp. 426-444.[21 B. D. Bedford and R. Hoft, Principles (j Inverter

Circuits. New York: Wiley. 1964. pp. 128-141.[3] S. Lindena, "PWM series inverter with inductor-transtormer in low

power applications. in Cotnf. Ret. IEEE Powver ConditioningSpec(ialists, 1971.

[41 P. Shively, Analysis and design of an output clamped inserter,"M.A.Sc. thesis, Unisersity of Toronto, Toronto, ON. Canada,Department of Electrical Engineering, 1978

Shashi B. Dewan (S'65-M 67-SM 68), for a photograph and biography,please see page 40 of the January/February issue of this TRANSACTIONS.

288