bof4957 hunt javaone rtsj bof 2014

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  • 8/17/2019 BOF4957 Hunt Javaone Rtsj Bof 2014

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     SR 282 BoF

     

    The new

    Real-Time Specifcation or ava

     

    Dr. James J. Hunt

    JSR 282 Spec ea!

    Java"ne Septem#er 2$%&

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    ,

    eal-T'me Specifcation or ava 2.$

    onstraints

    o chan*es to the lan*ua*e

    same #+teco!e

    no new lan*ua*e eatures

    Full+ compati#le with convention Java

    implementations such as "penJD/

    Java pro*rams shoul! run correctl+ on RTSJ

    implementations that supports the re0uire! profle

    1aimi3e co!e reuse un!er time compleit+

    constraints

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    eal-T'me Specifcation or ava 2.$

    (h+ 4p!ate the RTS )

    5nvironment evolution

    #etter realtime *ar#a*e collection

    aster processors

    Java %.& Java %.8→

    6n!roi!

    1ar7etin*

    support !ierent levels o realtime

    even or conventional Java implementations

    eliminate nee! or J' or '9"

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    eal-T'me Specifcation or ava 2.$

    RTS %.$.2 'ssues

    Device memor+ access inefcient

    Sin*le class or accessin* all precision or each ointe*ral an! ;oatin* t+pes

    Raw1emor+6ccess

    Raw1emor+Float6ccess

    4nclear how '9" memor+ is a!!ress

    flters un!er !efne!6ccess testin* on ever+ access

    annot t+pe restrict memor+ access

    Har! to inline

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    eal-T'me Specifcation or ava 2.$

    RTS %.$.2 'ssues

    Happenin* ill !efne!

    o stan!ar! wa+ to a!! new happenin*s

    Happenin*s not o#=ects

    'nconsistent with other 6s+nc5vent t+pes

    >"S'?

    loc7

    4ser tri**ere!

    Too man+ levels o in!irection

    Happenin* 6s+nc5vent 6s+nc5ventHan!ler→ →

    o support or frst level interrupt han!lers

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    eal-T'me Specifcation or ava 2.$

    RTS %.$.2 'ssues

    o wa+ to !efne a new loc7

    Scope!1emor+

    o simple wa+ to use scopes or >ro!ucer-onsumer pattern

    o wa+ to mana*e #ac7in* store

    1ulticore

    no wa+ to assi*n S"s to processors

    1iscellaneous Defciencies

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    ew Raw 1emor+ 6rchitecture

    Factor+Base!

    Raw1emor+ class or re*istration

    Raw1emor+Factor+ or implementation

    'nteraces or each access t+pe

    Raw'ntA RawShortA RawB+teA RawFloatA etc.

    oncrete classes or

    1emor+ mappe! !evicesA

    '9" mappe! !evicesA an!

    eneric mappe! !evices.

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    9/29Ceal-T'me Specifcation or ava 2.$

    Raw1emor+ 'nteraces

     javax.realtime::RawFloatWriter 

    «interface»

    +setFloat(oat v)

    +setFloat(int oset, oat data)+set(int oset, oat[] v): int

    +set(int oset, oat[] v,

      int start, int count): int

    +address():long

     javax.realtime::RawFloat 

    «interface»

     javax.realtime::RawFloatReader 

    «interface»

    +getFloat():oat

    +getFloat(int oset):oat

    +get(int oset, oat[] v): int

    +get(int oset, oat[] v,

      int start, int count): int

    +address():long

     javax.realtime::RawDoubleWriter 

    «interface»

    +setDouble(double v)

    +setDouble(int oset, double data)+set(int oset, double[] v): int

    +set(int oset, double[] v,

      int start, int count): int

    +address():long

     javax.realtime::RawDoubleReader 

    «interface»

    +get():double

    +getDouble(int oset):double

    +get(int oset, double[] v): int

    +get(int oset, double[] v,

      int start, int count): int

    +address():long

     javax.realtime::RawDouble

    «interface»

     javax.realtime::RawByteWriter 

    «interface»

    +set!te(b!te v)

    +set!te(int oset, b!te v)+set(int oset, b!te[] v):int

    +set(int oset, b!te[] v,

      int start, int count):int

    +address():long

     javax.realtime::RawByte

    «interface»

     javax.realtime::RawByteReader 

    «interface»

    +get!te():b!te

    +get!te(int oset):b!te

    +get(int oset, b!te[] v):int

    +get(int oset, b!te[] v,

      int start, int count):int

    +address():long

     javax.realtime::RawShortWriter 

    «interface»

    +set"#ort(s#ort v)

    +set"#ort(int oset, s#ort v)+set(int oset, s#ort[] v):int

    +set(int oset, s#ort[] v,

      int start, int count):int

    +address():long

     javax.realtime::RawShortReader 

    «interface»

    +get"#ort():s#ort

    +get"#ort(int oset):s#ort

    +get(int oset, s#ort[] v):int

    +get(int oset, s#ort[] v,

      int start, int count):int

    +address():long

     javax.realtime::RawShort 

    «interface»

     javax.realtime::RawIntWriter 

    «interface»

    +set$nt(int v)

    +set$nt(int oset, int v)+set(int oset, int[] v):int

    +set(int oset, int[] v,

      int start, int count):int

    +address():long

     javax.realtime::RawIntReader 

    «interface»

    +get$nt():int

    +get$nt(int oset):int

    +get(int oset, int[] v):int

    +get(int oset, int[] v,

      int start, int count):int

    +address():long

     javax.realtime::RawInt 

    «interface»

     javax.realtime::RawLongWriter 

    «interface»

    +set%ong(long v)

    +set%ong(int oset, long v)+set(int oset, long[] v):int

    +set(int oset, long[] v,

      int start, int count):int

    +address():long

     javax.realtime::RawLongReader 

    «interface»

    +get%ong():long

    +get%ong(int oset):long

    +get(int oset, long[] v):int

    +get(int oset, long[] v,

      int start, int count):int

    +address():long

     javax.realtime::RawLong

    «interface»

     javax.realtime::RawMemory 

    «interface»

     java.io::Cloable

    «interface»

    +close()

    &isibilit!

    + ' ublic

    ' rotected

    * ' acage

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    eal-T'me Specifcation or ava 2.$

    5ample

    >u#lic class '"Busontroller implements RawShort

      private 1emor+RawB+te comman!E

      private 1emor+RawB+te ;a*E

      private 1emor+RawShort a!!ressE  private 1emor+Raw'nt !ataE

      pu#lic int *etshort a!!ressG

     

      a!!ress.puta!!ressGE

      comman!.putR56DGE

      while ;a*.*etG I D"5GE

      return !ata.*etGE

     

    ...

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    eal-T'me Specifcation or ava 2.$

    D16 Support

    Special actor+ or !irect #+te #uer

    et #+te #uer that is visi#le D16 controller

    1eans to *et a!!ress to pass to D16 controller

    oul! #e use to implement '9" hannels

    6!!itional #arrier t+pes

    provi!e write visi#ilit+ across J' #oun!ar+

    or supportin* D16 with !irect #+te #uers

    oor!inatin* with Dou* eaJ5> %88 Java 1emor+ 1o!el 4p!ateG

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    eal-T'me Specifcation or ava 2.$

    5vent 6rchitecture

    6#stract6s+nc5vent

    6s+nc5vent

    >"S'?Si*nal>"S'?RealtimeSi*nal

    6ctive5vent6s+ncon*5vent

    6s+nc"#=ect5vent

    Happenin*

    'SR

    Timer

    >erio!icTimer "neShotTimer

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    %,

    eal-T'me Specifcation or ava 2.$

    1i an! 1atch

    T+pes 6s+nc5vent 6s+ncon*5vent 6s+nc"#=ect5vent

    6s+nc5ventHan!ler o pa+loa! o pa+loa! o pa+loa!

    6s+ncon*5ventHan!ler 5vent 'D >a+loa! 5vent 'D

    6s+nc"#=ect5ventHan!ler 5vent "#=ect 5vent "#=ect >a+loa!

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    %&

    eal-T'me Specifcation or ava 2.$

    Timer States

    disabled   disabled

    stopped

    active

    relative

    absoluteabsolute

    -> FALSE

    stop

    startDisabled

    stop

    -> TRUE

    -> TRUE

    stop

    Any Call

    -> IllegalStateException

    nonexistant

    new Timer(AbsoluteTime, ..)

    destroy

    OneShotTimer

    fire

    active

    skip

    OneShotTimer

    fire and selfreschedule

    PeriodicTimer

    isRunning

    -> TRUE

    skip and selfreschedule

    PeriodicTimer

    isRunning

    -> FALSE

    isRunning

    -> FALSE

    -> IllegalStateException

    getFireTime

    new Timer(RelativeTime, ..)

    RelativeTime

    reschedule

    reschedule

    RelativeTime

    reschedule

    reschedule

    AbsoluteTime

    AbsoluteTime

    -> IllegalStateException

    startDisabled

    IllegalStateException

    start

    getFireTime

    -> absoluteTime

    -> start +

    relativeTime

    getFireTime

    startenable   disable

    absolute

    enabledactive

    relative

    disabled

    active

    enableddisabled

    relative

    stopped

    destroyed

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    %:

    eal-T'me Specifcation or ava 2.$

    6#stract6s+nc5vent States

    new AbstractAsyncEvent(..)

    isRunning   isRunning

    -> FALSE-> TRUE

    enable disable

    enabled disablednonexistant

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    %<

    eal-T'me Specifcation or ava 2.$

    Happenin* /in! o 6s+nc5vent

    6s+nc5vent

    >assive fre mechanismG

    Runs all associate! event han!lers

    4ser !efna#le

    Happenin*s

    supports active #ehavior too tri**er mechanismG

    an have nee!sG !ispatcher to mana*e activit+

    an #e tri**ere! rom outsi!e the K1

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    %@

    eal-T'me Specifcation or ava 2.$

    Happenin* Se0uence

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    %8

    eal-T'me Specifcation or ava 2.$

    4ser Defne! loc7s

    i7e an 'SR

    no active threa!

     =ust tri**ers associate! Timers

    1ana*es Tri**er Lueue

    net set o Timers in priorit+ or!erG to tri**er

    time or!ere! set o Timer sets

    constant tri**er time or top net Timer

    #oun! a!!in* an! !eletin*

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    %C

    eal-T'me Specifcation or ava 2.$

    loc7 Se0uence Dia*ram

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    2$

    eal-T'me Specifcation or ava 2.$

    Sleep with 6pplication loc7

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    2%

    eal-T'me Specifcation or ava 2.$

    6fnit+

    1ulticore control

    ena#le pinnin* Threa!s an! 6s+nc5ventHan!lersto a su#set o processors.

    support collective pinnin* w9>rocessin*roup>arameters

    fn! out what processors an! processor su#sets

    are availa#le or pinnin*

    pinnin* to sin*le processors is alwa+s supporte!.

    ortho*onal to all other RTSJ classes

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    22

    eal-T'me Specifcation or ava 2.$

    ew Scope!1emor+ 6reas

    >inne!1emor+

    su#class o Scope!1emor+

    similar to T 1emor+ ecept supports pinnin*

    Stac7e!1emor+

    su#class o Scope!1emor+ supports SJ 1o!elG

    similar to T 1emor+ #ut reserves #ac7in* store

    #ac7in* store rom parent when Stac7e!1emor+

    entera#le onl+ rom 1emor+6rea where create!

    resi3e to ma reserve! when no su# areaG

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    2,

    eal-T'me Specifcation or ava 2.$

    Stac7e!1emor+ 5ample

    estin* $

    estin* $

    Split 6 estin* 2

    estin* %

    Split B estin* %

    Split 6 estin* %

    estin* 2

    Split estin* ,

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    2&

    eal-T'me Specifcation or ava 2.$

    Small han*e

    RealtimeThrea!

    a!! waitForetReleaseG an! releaseG

    or aperio!ic processin*

    6s+nc5ventHan!ler

    memor+ area entere! on each release

    ol! #ehavior o#taine! #+ usin* >inna#le1emor+

    Release>arameters

    a!! #loc7in* actor to support easi#ilit+ anal+sis

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    2:

    eal-T'me Specifcation or ava 2.$

    Small han*e

    onsistenc+

    provi!e or frin* an 6s+nc5vent or release an6s+nc5ventHan!lerG on all resource limit errors.

    new metho!s as necessar+ to provi!e #oth areturne! o#=ect an! one that ta7es a !estinationA

    e.*.A to reuse Hi*hResolutionTime o#=ects

    up!ate semantics or cost enorcement to permit

    a sche!ula#leMs >4 use to #e #oun! #+ its cost

    parameter in each perio!

    sot cost enorcement

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    2<

    eal-T'me Specifcation or ava 2.$

    Small han*e

    >h+sical1emor+

    4p!ate !ocumentation to improve clarit+.

    >hasin* control or perio!ic S"s

    RelativeTime

    a!! compareTo$G

    a!! scaleint actorG

    Time!

    a!! resetG metho!

    #etter support or watch!o* timers

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    2@

    eal-T'me Specifcation or ava 2.$

    1o!ulari3ation oals

    >rovi!e useul su#sets o the RTSJ

    with an! without a realtime

    with an! without !evice support

    5ncoura*e more implementations

    Har! realtimeA e.*.A or control s+stems

    Sot realtimeA e.*. or s+stem monitorin*

    o realtimeA e.*.A or !evelopment

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    28

    eal-T'me Specifcation or ava 2.$

    1o!ules

    Base

    Sche!ula#les

    >riorit+ 'nheritance

    loc7

    ...

    Device

    Happenin*s

    Raw1emor+

    ...

    1emor+ 6rea

    immortal

    ph+sical

    scope!

    6!vance! "ptions

    6T

    >5

    'SR

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    2Cicas m#H

    ontact 'normation

    Dr. ames . Hunt

      aicas m#HHai!-un!-eu-Str. %8

    D-@