ccs and flash programming tools and common issues...

CCS and Flash Programming Tools and Common Issues Discussion

Yanming Luo/罗焰明

021-63509566-329

[email protected]

http://www.c2000dsp.com

TopicsCCS setup and CCS setup and configueconfigue, project setup, project setupRealReal--time mode & H/W breakpointtime mode & H/W breakpointHow to use and configure Flash toolsHow to use and configure Flash toolsF28X Header FileF28X Header FileIQmathIQmathFlash Memory & InterruptFlash Memory & InterruptS/W LibraryS/W Library


CCStudio 2.2 & CCStudio 3.1 Desktop Shortcuts

cc_setup.execc_setup.exe shortcutsshortcuts

cc_app.execc_app.exe shortcutsshortcuts

SdConfig.exeSdConfig.exe shortcutsshortcuts

SdFlash.exeSdFlash.exe shortcutsshortcuts


Use SDConfig to configure Driver port

Use Use sdconfigsdconfig to Check for available to Check for available driver(printer/usb/pcidriver(printer/usb/pci) ports. Make ) ports. Make sure your emulator is not connected sure your emulator is not connected to the PC for valid results.to the PC for valid results.

Verify communication between the Verify communication between the PC and the connected emulator. PC and the connected emulator. Make sure the following Make sure the following connections have been made:connections have been made:

1.PC is connected to the 1.PC is connected to the emulator.emulator.

2.Emulator is connected to the 2.Emulator is connected to the target board.target board.

3.Power is applied to the PC, 3.Power is applied to the PC, emulator and target board.emulator and target board.


CCS Setup—to Set up Driver

Use the Setup utility to:Use the Setup utility to:Select a standard Select a standard configuration configuration supplied by TI supplied by TI Import a Import a configuration configuration supplied by third supplied by third partiespartiesCustomize a Customize a configurationconfigurationCreate a new Create a new configurationconfigurationExport a Export a configuration so configuration so others may use itothers may use it


Code Composer Studio

Code Composer Studio includes:Code Composer Studio includes:Integrated Edit/Debug GUICode Generation ToolsDSP/BIOS

AsmAsm LinkLink

EditEdit

DebugDebug

CompileCompile Probe InProbe In

Probe OutProbe OutGraphsGraphsProfilingProfiling

SIMSIM

eZdspeZdsp™™

EVMEVM

Third Third PartyParty

XDSXDS

DSPDSPBoardBoard

DSP/BIOSDSP/BIOSConfigConfigToolTool

DSP/BIOSDSP/BIOSLibrariesLibraries

lnk.cmdlnk.cmdBuildBuild


Code Composer Studio Components

Project Manager:Project Manager:Source & object filesSource & object filesFile dependenciesFile dependenciesCompiler, Assembler & Compiler, Assembler &

Linker build optionsLinker build options

Full C/C++ & Assembly Full C/C++ & Assembly Debugging:Debugging:

C & ASM SourceC & ASM SourceMixed modeMixed modeDisassembly (patch)Disassembly (patch)Set Break PointsSet Break PointsSet probe PointsSet probe Points

Productive Editor:Productive Editor:Structure ExpansionStructure Expansion

HelpHelp

CPU CPU WindowWindow

Menus or IconsMenus or Icons

Memory Memory WindowWindow

Graph Graph WindowWindow

Status Status WindowWindow

Watch Watch WindowWindow


Code Composer Studio - Code Maestro


The CCS Project

Source files (by reference)Source files (by reference)Source (C, assembly)LibrariesDSP/BIOS configurationLinker command files

Project settings:Project settings:Build Options (compiler and assembler)Build configurationsDSP/BIOSLinker

ProjectProject-->New>New


Build Options GUI - Compiler

GUI has 8 pages of categories for code generation toolsGUI has 8 pages of categories for code generation toolsControls many aspects of the build process, such as:Controls many aspects of the build process, such as:

Optimization levelTarget deviceCompiler/assembly/link options


Build Options GUI - Linker

GUI has 2 categories for linkingGUI has 2 categories for linkingSpecifies various link optionsSpecifies various link options““..\\DebugDebug\\”” indicates on indicates on subfolder level below project subfolder level below project (.(.pjtpjt) location) location


Linker Command File functionMemory Map DescriptionMemory Map Description

NameLocationSize

Sections DescriptionSections DescriptionDirects software sections into named memory regionsAllows per-file discriminationAllows separate load/run locations


Linking

LinkerLinker

Link.cmdLink.cmd

.map.map

..objobj .out.out

Memory descriptionHow to place s/w into h/w

Memory descriptionMemory descriptionHow to place s/w into h/wHow to place s/w into h/w


Compiler Section Names

NameName DescriptionDescription Link LocationLink Location.text.text codecode programprogram..cinitcinit initialized global and static variables programinitialized global and static variables program..econsteconst constant data (e.g. const constant data (e.g. const intint k = 3;) datak = 3;) data.switch.switch tables for switch statementstables for switch statements data (data (progprog w/ w/ --mtmt))..pinitpinit tables for global constructors (C++) programtables for global constructors (C++) program

NameName DescriptionDescription Link LocationLink Location..ebssebss global & static variablesglobal & static variables datadata.stack stack space.stack stack space low 64K datalow 64K data..esysmemesysmem memory for far memory for far mallocmalloc functionsfunctions datadata

Initialized SectionsInitialized Sections

UninitializedUninitialized SectionsSections


Placing Sections in Memory

..ebssebss

..cinitcinit

.text.text

MemoryMemoryM0SARAMM0SARAM

(0x400)(0x400)0x00 00000x00 0000

0x3D 80000x3D 8000

0x00 04000x00 0400 M1SARAMM1SARAM(0x400)(0x400)

FLASHFLASH(0x20000)(0x20000)

SectionsSections

.stack.stack


TMS320F2812 Memory Map

MO SARAM (1K)MO SARAM (1K)

M1 SARAM (1K)M1 SARAM (1K)

LO SARAM (4K)LO SARAM (4K)L1 SARAM (4K)L1 SARAM (4K)

HO SARAM (8K)HO SARAM (8K)

Boot ROM (4K)Boot ROM (4K)MP/MC=0MP/MC=0

BROM vector (32)BROM vector (32)MP/MC=0 ENPIE=0MP/MC=0 ENPIE=0

OTP (1K)OTP (1K)

FLASH (128K)FLASH (128K)

reserved

reserved

reservedPF 0 (2K)PF 0 (2K)

reserved

reservedPF 1 (4K)PF 1 (4K)reservedPF 2 (4K)PF 2 (4K)

reservedPIE vectorPIE vector

(256)(256)ENPIE=1ENPIE=1 XINTF Zone 0 (8K)

XINTF Zone 1 (8K)

XINTF Zone 2 (0.5M)XINTF Zone 6 (0.5M)

XINTF Zone 7 (16K)MP/MC=1

XINTF Vector-RAM (32)MP/MC=1 ENPIE=0

reserved

reserved

reserved

Data | ProgramData | Program0x00 00000x00 0000

0x00 04000x00 0400

0x00 08000x00 08000x00 0D000x00 0D00

0x00 10000x00 10000x00 60000x00 60000x00 70000x00 70000x00 80000x00 8000

0x00 90000x00 9000

0x00 A0000x00 A0000x3D 78000x3D 7800

0x3D 80000x3D 8000

0x3F 80000x3F 8000

0x3F A0000x3F A0000x3F F0000x3F F000

0x3F FFC00x3F FFC0

0x3F C0000x3F C000

0x18 00000x18 00000x10 00000x10 00000x08 00000x08 0000

0x00 40000x00 40000x00 20000x00 2000

Data | ProgramData | Program

128128--Bit PasswordBit Password

CSM: LO, L1CSM: LO, L1OTP, FLASHOTP, FLASH

reserved0x3D 7C000x3D 7C00


Example:

F2812F2812

M0SARAMM0SARAM(0x400)(0x400)

M1SARAMM1SARAM(0x400)(0x400)

L0SARAML0SARAM(0x1000)(0x1000)

L1SARAML1SARAM(0x1000)(0x1000)

0x00 00000x00 0000 0x00 04000x00 0400

0x00 80000x00 8000 0x00 90000x00 9000

FLASHFLASH(0x20000)(0x20000)

0x3D 80000x3D 8000 H0SARAMH0SARAM(0x2000)(0x2000)

0x3F 80000x3F 8000

Create the linker command file for the given memory Create the linker command file for the given memory map by filling in the blanks on the following slidemap by filling in the blanks on the following slide


MEMORYMEMORY{{PAGEPAGE 00: /* Program Space */: /* Program Space */FLASHFLASH: org = : org = 0x3D80000x3D8000, , lenlen = = 0x200000x20000PAGE 1PAGE 1: /* Data Space */: /* Data Space */M0SARAMM0SARAM: org = : org = 0x0000000x000000, , lenlen = = 0x4000x400M1SARAMM1SARAM: org = : org = 0x0004000x000400, , lenlen = = 0x4000x400L0SARAML0SARAM: org = : org = 0x0080000x008000, , lenlen = = 0x10000x1000L1SARAML1SARAM: org = : org = 0x0090000x009000, , lenlen = = 0x10000x1000H0SARAMH0SARAM: org = : org = 0x3F80000x3F8000, , lenlen = = 0x20000x2000

}}SECTIONSSECTIONS{{

.text: > FLASH PAGE 0.text: > FLASH PAGE 0

..ebssebss: > M1SARAM PAGE 1: > M1SARAM PAGE 1

..cinitcinit: > FLASH PAGE 0: > FLASH PAGE 0

.stack: > M0SARAM PAGE 1.stack: > M0SARAM PAGE 1}}

Example:


What is RT-MON?

Enables data to be continuously exchanged between an Enables data to be continuously exchanged between an embedded application and Code Composer Studio without embedded application and Code Composer Studio without stopping the processor, use Code Composer Studio to stopping the processor, use Code Composer Studio to display your data when running from RAM or Flashdisplay your data when running from RAM or FlashAvailable on allAvailable on all TMS320C/F24xTMS320C/F24x™™ and TMS320C/F28x and TMS320C/F28x DSPsDSPs

Real-Time MONitor


Code Composer Studio with RT-MON Running


Entering Real-Time Mode in F281x/F280x


RT-MON Architecture – Real-Time Mode

JTAG

Target (DSP)Host (PC)

CodeComposer

StudioEm

ulat

or

Emulation Logic

Message Passing

C24x CPU Memory

Interface

INT 7

User Code

H/W

S/W


RT-MON Architecture – Stop Mode

JTAG

Target (DSP)Host (PC)

CodeComposer

StudioEm

ulat

or

Emulation Logic

Message Passing

C24x CPU Memory

Interface

User Code

H/W

S/W


Entering Real-Time Mode – MON_GOOpen Command window from menuOpen Command window from menu

Tools\Command windowType “go MON_GO”Then “Execute”

Dis-assembly window displays program counter at MON_GO (yellow bar)


Entering Real-Time Mode in F24x/F240xEnter Real-Time (halted) Mode after reaching MON_GOEnter Real-Time (running) Mode with F5 to RUN DSP


Entering Real-Time Mode in F24x/F240x1. File->Load Program(.out)2. Debug->Reset DSP3. Debug->Run4. Debug->halt5. Debug->Reset DSP6. Debug->Real Time Mode7. Debug->Run


Update Windows in Real-Time ModeRightRight--mouse in window for menumouse in window for menuSelect Select ““Continuous RefreshContinuous Refresh””

Plots, watch variables and registers continuously update


Set Window Refresh RateSelect Select ““Realtime Refresh OptionsRealtime Refresh Options””

Refresh Rate = 100 ms (shortest interval)Avoid “Global Continuous Refresh”Option


Single-Step & Breakpoint setSingleSingle--step nonstep non--ISR code (halted in realISR code (halted in real--time mode)time mode)Can set Breakpoint in nonCan set Breakpoint in non--ISR codeISR codeCanCan’’t set Breakpoint in ISR codet set Breakpoint in ISR code

ISRs continue to run!

14


Real-Time vs. Stopmode Debug

AdvantagesAdvantagesCode Composer Studio and target are updated continuouslyUser interrupts never halted

DisadvantagesDisadvantagesMonitor uses % of CPU bandwidthSevere program errors must be resolved

15


RT-MON Resources

Memory Interface

Emulation Logic

Message Passing

INT 7

C24x CPU

Program Data

INT 7

RT-Mon Code

232 Words

0x0EMSG_DATA 0x1CMSG_CMNDMSG_STATMSG_CNTL

0x1D0x1E

0x60(29 Words)Page-0 Vars

Full Context

0x1F

16


Instrumenting the Target ApplicationAdd monitor code to project

17


Instrumenting the Target ApplicationAdd support files to vector table

C200MNRT.IRTVECS.h

18


Instrumenting the Target Application

RT-MON sections:“mon_main” = Code“mon_pge0” = Page-0 variables“mon_rgst” = ISR context

Program Data

INT 7

RT-Mon Code

Messaging

Page-0 VarsFull

Context

Add monitor sections to linker command file

19


Instrumenting the Target ApplicationAccurate context save/Restore crucial

Minimum = Status registers & ACCIndirect addressing recommended

20


Instrumenting the Target Application

Call MON_RT_CNFGFrom ASM Or from C

21


Instrumenting the Target ApplicationEnable INT7 in IMR

22


F240x H/W Breakpoint settingOption->Custimze->program Load Options

Debug->Breakpoints


TopicsCCS setup and CCS setup and configueconfigue, project setup, project setupRealReal--time mode & H/W breakpointtime mode & H/W breakpointHow to use and configure Flash toolsHow to use and configure Flash toolsF28X Header File F28X Header File IQmathIQmathFlash Memory & InterruptFlash Memory & InterruptS/W LibraryS/W Library


Flash tools objectSection 1: Understand F24x/F28x Flash programming fundamentals.Section 1: Understand F24x/F28x Flash programming fundamentals.

Section 2: Learn about programming solutions for the developmentSection 2: Learn about programming solutions for the developmentand prototype phase:and prototype phase:

Code Composer Studio Plug-InSDFlash from Spectrum Digital

Section 3: Understand how you can develop for custom solutions, Section 3: Understand how you can develop for custom solutions, field updates and production programming.field updates and production programming.

Flash programming APIEmbedding Flash programming solutionsCustom programming solutions

www.ti.com/c2000flashtools

http://www.spectrumdigital.com/drivers/download.cgi?file=docstore/LatestC2000Tools.htm


TI Home > Digital Signal Processing > TMS320™ DSP Platforms > C2000™Digital Signal Controllers

C2000™ Digital Signal Controllers (21)TMS320C24x Controllers (10)TMS320C28x Controllers (11)

TMS320F281x™Flash Programming Solutions(SPRB169.pdf)http://emulators.spectrumdigital.com/utilities/sdflashhttp://emulators.spectrumdigital.com/c2000


The algorithms include timingThe algorithms include timing--critical delay loops:critical delay loops:

Algorithms must be executed from single-cycle SARAM.You must configure the algorithms for the CPU frequency.To insure proper verification, execute the algorithms at the fastest CPU frequency for your system. The algorithms should not be interrupted!

Voltage supply:Voltage supply:

A 3.3V supply must be applied to the VDD3VFL Flash voltage supply pin(28x). A 5.0V supply must be applied to the VccpFlash voltage supply pin.

Note: this voltage is used for programming AND reading the Flash. Thus it should always be connected.

CPU Based Programming: F281x devices are programmed via time-critical algorithms that execute on the DSP


Erase:Erase:The erase algorithm gradually removes charge until all of the The erase algorithm gradually removes charge until all of the bits within a Flash sector read back 1bits within a Flash sector read back 1’’s.s.

The erase algorithm consists of 3 steps:The erase algorithm consists of 3 steps:1. Clear: Program all the bits in the sector to 0.2. Erase: Sets all the bits in the sector to 1’s.3. Compaction: Corrects any “over-erased” (depleted) bits.

Program:Program:Program puts your application code and/or data into Flash by Program puts your application code and/or data into Flash by gradually depositing charge on specified bits until they read gradually depositing charge on specified bits until they read back 0. back 0.

What operations are needed to program the Flash?


Flash comes from the factory in an erased state.Flash comes from the factory in an erased state.The erase algorithm sets The erase algorithm sets all the bitsall the bits in a sector to 1. in a sector to 1. The minimum amount of memory that can be erased at a time The minimum amount of memory that can be erased at a time is a sector.is a sector.Erase operates on Flash only. OTP cannot be erased. Erase operates on Flash only. OTP cannot be erased.

Erase Operation FAQ’s

Address in Flash memory Contents of

erased Flash


Program is used to set bits within the Flash to 0. Program is used to set bits within the Flash to 0. Program Program CANNOTCANNOT move a bit from a 0 to a 1.move a bit from a 0 to a 1.Program operates on both Flash and OTP.Program operates on both Flash and OTP.Program operates on single bits with a 16Program operates on single bits with a 16--bit block.bit block.

Address in Flash memory Contents of

programmed Flash

Program Operation FAQ’s


Development Solutions

TMS320C2000 Code Composer TMS320C2000 Code Composer StudioStudioTMTM onon--chip Flash programmer chip Flash programmer plugplug--ininSDFlash from Spectrum Digital Inc. (SDFlash from Spectrum Digital Inc. (www.spectrumdigital.comwww.spectrumdigital.com))

How can I easily program the Flash during How can I easily program the Flash during firmware development?firmware development?

How can I program a few prototypes on machines without CCS How can I program a few prototypes on machines without CCS installed?installed?


Code Composer Studio Plug-inIntegrated Flash programming tool within the Code Integrated Flash programming tool within the Code Composer Studio environment including onComposer Studio environment including on--line help.line help.

Developed specifically for the C2000 Flash devices and Developed specifically for the C2000 Flash devices and feature set.(LF240x/F281x/F280x)feature set.(LF240x/F281x/F280x)

No need to close CCS and switch tools to program the No need to close CCS and switch tools to program the device. device.

Available for full CCS 2.2/CCS3.1 and later via update advisor. Available for full CCS 2.2/CCS3.1 and later via update advisor.


Code Composer Studio Plug-inCode Composer

Studio TM

Emulator

HOST (PC)

Target (F281x)

CPU

SARAM

EmulationLogic

Flash

Plug-in Wrapper

Flash API

Algo’s

SARAM

Flash Control

Plug-in to Flash API Interface

File


Code Composer Studio Plug-in for F24X/F28x


Code Composer Studio Plug-in for F24x


IntegratedCSM

Support

FrequencyConfig.

Plug-inConfig.

EraseSectorControl

File to ProgramDefaults to

Project Loaded In CCS

OperationControl

For More InfoOn-line Help

Code Composer Studio Plug-in for F28x


Code Composer Studio Plug-in


How do I configure the plug-in algorithm for my system’s operating frequency?

1.Specify the input clock frequency

2.Specify the PLLCR value

The Plug-in calculates SYSCLKOUT and configures the algorithms.

To guarantee that the Flash is programmed to the correct level, always use the fastest CPU frequencythat your system will run at.


How can I test the frequency configuration?How can I test the frequency configuration?

1. Select a GPIO MUX Register.

2. Select which pin to toggle.

1. Select a GPIO MUX Register.

2. Select which pin to toggle.

3. Press Execute Operation

4. Observe with an oscilloscope.

5. The selected pin should toggle at 10KHz

3. Press Execute Operation

4. Observe with an oscilloscope.

5. The selected pin should toggle at 10KHz


SDFlash

SDFlash is a stand alone generic SDFlash is a stand alone generic Flash programming interface Flash programming interface from Spectrum Digital Inc. from Spectrum Digital Inc. ((www.spectrumdigital.comwww.spectrumdigital.com))

SDFlash does not require Code SDFlash does not require Code Composer Studio. Only the Composer Studio. Only the Spectrum Digital JTAG Spectrum Digital JTAG emulation driver is required for emulation driver is required for JTAG programming.JTAG programming.

RS232 programming with RS232 programming with example communication example communication interface code is also available interface code is also available as of SDFlash V1.60.as of SDFlash V1.60.


SDFlash Stand Alone Programmer

SDFlash

Emulator

HOST (PC)

Target (F281x)

CPU

SARAM

EmulationLogic

Flash

SDFlash Wrapper

Flash API

Algo’s

SARAM

Flash Control

AlgorithmFile


1.1. SDFlash GUI interface:SDFlash GUI interface: Download the Download the C2000 emulation drivers from Spectrum C2000 emulation drivers from Spectrum Digital. Digital.

2.2. SDFlash algorithm files:SDFlash algorithm files: Download the Download the TI supplied algorithm files from the TI supplied algorithm files from the Spectrum Digital website and unzip Spectrum Digital website and unzip them into the them into the sdflashsdflash\\myprojectsmyprojectsdirectory.directory.

How can I get SDFlash?How can I get SDFlash?

http://www.spectrumdigital.com/drivers/download.cgi?file=docstore/LatestC2000Tools.htm

http://emulators.spectrumdigital.com/c2000


The SDFlash ProjectAn SDFlash project is a text file that is used tostore your Erase and Program settings.

SDFlash Project (.sdp)

Flash Data File

Algorithm File

User Defined Options

CommunicationsDriver

You can view and edit SDFlash project contents through the SDFlash GUI interface.

Sample projects are included with the algorithm files.


SDFlash Setup - Target

SD Emulation DriverDownloaded with SDFlash

JTAG Port AddressSetup with SDConfig

Board FileProvides information on what

Kind of devices are on the JTAG scan chain


Algorithm FileSDFlash Wrapper + Flash API

User Option 1

For 281x used to specify a sector mask for the

erase operation.

Sec ASec BSec CSec D…..…..

Bit 0Bit 9

Sec J

Bit 1Bit 2Bit 3Sector Mask

Functionality of user options is algorithm specific.


Algorithm FileSDFlash Wrapper + Flash API

Supplied by TIDownload from SD’s website

Flash Data File.out file to be programmed

into the Flash/OTP

Easy to use interface allows you to perform desired operations


What about SDFlash frequency configuration?What about SDFlash frequency configuration?

SDFlash JTAG Algorithm File CCS Project

SDFlash Wrapper

Flash API

Algo’s

SARAM

Flash Control

AlgorithmFile


What about SDFlash frequency configuration?What about SDFlash frequency configuration?

SDFlash JTAG Algorithm File CCS Project 1. Specify the PLLCR setting in

SDFlash28x_Wrapper.h 2. Specify the CPU frequency in

Modify Flash281x_API_Config.h3. Rebuild the algorithm file.4. Close Code Composer Studio.5. Run the frequency toggle test

from to verify proper frequency configuration!


SDFlash Frequency Configuration

Erase User Option 2

Used to run the frequency pin toggle test

The value indicateswhich pin to toggle:

Pin Toggledblank Test not run0000 Test not run0001 GPIOF14_XF0002 GPIOA0_PWM10003 GPIOF4_SCITXDA0004 GPIOG4_SCITXDB0005 GPIOF12_MDXA> 0006 Test not run


Customizing SDFlash

SDFlash JTAG Algorithm File CCS Project

You can modify the SDFlash wrapper to perform custom operations before

or after calling the Flash API.

Example: Before verify, perform a checksum on

the Flash contents and compare it against a golden value.


Custom Programming Solutions

How can I create my own programming solution?

F281x Flash API (SPRC125)F281x Flash API (SPRC125)

Used by both the CCS plug-in and SDFlash.Allows you to create custom programming solutions (example: RS232, eCAN)You can also add Flash programming to your embedded application.

http://focus.ti.com/docs/toolsw/folders/print/c28xflashtools.html


F281x Flash API Function Calls

Erase specified sectors:Uint16 Flash2812_Erase(SectorMask, &FStatus)

SectorMask: Which sectors to erase.&Fstatus: Pointer to status structure.

Program code and data into Flash/OTP:Uint16 Flash2812_Program(&FlashAddr, &BuffAddr, Length, &FStatus)

&FlashAddr: Pointer to first Flash/OTP address to program.&BuffAddr: Pointer to the buffer of data/code to program.Length: Number of 16-bit words to be programmed.&Fstatus: Pointer to the Flash status structure.


A few Flash Programming Do’s:

Execute the algorithms from single cycle memory.Execute the algorithms from single cycle memory.Do execute the algorithms at the highest CPU Do execute the algorithms at the highest CPU frequency that your CPU will run at in the system.frequency that your CPU will run at in the system.Configure the API for the correct CPU frequency.Configure the API for the correct CPU frequency.Do verify the frequency configuration.Do verify the frequency configuration.Unlock the CSM or execute the algorithms from secured Unlock the CSM or execute the algorithms from secured memory.memory.


A Few Flash Programming Don’ts:

Break any of the DoBreak any of the Do’’s.s.Do not run the algorithms from wait stated Do not run the algorithms from wait stated memory.memory.Do not interrupt the algoDo not interrupt the algo’’s before s before completion.completion.Do not expect to execute code or read from Do not expect to execute code or read from Flash/OTP while programming or erasing.Flash/OTP while programming or erasing.


C2000 FLASH Pins & Supply setting

TMS320LF240x: TMS320LF240x: 1. A 5.0V supply must be applied to the 1. A 5.0V supply must be applied to the VccpVccp Flash voltage supply pin.Flash voltage supply pin.2. this voltage is used for programming AND reading the Flash, 2. this voltage is used for programming AND reading the Flash, thus it should thus it should always be connected.always be connected.

TMS320F281X/TMS320F280x:TMS320F281X/TMS320F280x:1.1. A 3.3V supply must be applied to the VDD3VFL Flash voltage supplA 3.3V supply must be applied to the VDD3VFL Flash voltage supply y

pin(28x). pin(28x). 2.2. Note: this voltage is used for programming AND reading the FlashNote: this voltage is used for programming AND reading the Flash, thus , thus

it should always be connected.it should always be connected.


DSP281x Header File Package(SPRC097.zip)(V/100)DSP280x Header File Package(SPRC191.zip)(V100/V110)

Simplifies program of peripherals and other Simplifies program of peripherals and other functionsfunctionsTakes care of register definitions and addressesTakes care of register definitions and addressesHeader file package consists of:Header file package consists of:

\include .h files\src .c source files\cmd linker command files\gel .gel files for CCS\examples example programs\doc documentation


Traditional Approach to C Coding

DisadvantagesDisadvantages -- Requires individual masks to be generated to Requires individual masks to be generated to manipulate individual bitsmanipulate individual bits

-- Cannot easily display bit fields in Watch windowCannot easily display bit fields in Watch window-- Will generate less efficient code in many casesWill generate less efficient code in many cases

AdvantagesAdvantages -- Simple, fast and easy to typeSimple, fast and easy to type-- Variable names exactly match register names (easy Variable names exactly match register names (easy

to remember)to remember)

#define ADCTRL1 (volatile unsigned #define ADCTRL1 (volatile unsigned intint *)0x00007100*)0x00007100#define ADCTRL2 (volatile unsigned #define ADCTRL2 (volatile unsigned intint *)0x00007101*)0x00007101

......void void main(voidmain(void)){{

*ADCTRL1 = 0x1234;*ADCTRL1 = 0x1234; //write entire register//write entire register*ADCTRL2 |= 0x4000;*ADCTRL2 |= 0x4000; //reset sequencer #1//reset sequencer #1

}}


Structure Approach to C Coding

void main(void)void main(void)

{{

AdcRegs.ADCTRL1.all = 0x1234;AdcRegs.ADCTRL1.all = 0x1234; //write entire register//write entire register

AdcRegs.ADCTRL2.bit.RST_SEQ1 = 1;AdcRegs.ADCTRL2.bit.RST_SEQ1 = 1; //reset sequencer #1//reset sequencer #1

}}

DisadvantagesDisadvantages -- Can be difficult to remember the structure namesCan be difficult to remember the structure names(Editor Auto Complete feature to the rescue!)(Editor Auto Complete feature to the rescue!)

-- More to type (again, Editor Auto Complete featureMore to type (again, Editor Auto Complete featureto the rescue)to the rescue)

AdvantagesAdvantages -- Easy to manipulate individual bits.Easy to manipulate individual bits.-- Watch window is amazing! (next slide)Watch window is amazing! (next slide)-- Generates most efficient code (on C28x)Generates most efficient code (on C28x)


The CCS Watch Window using Structures


Structure Naming ConventionsThe DSP280x header files define:The DSP280x header files define:

All of the peripheral structuresAll of the register namesAll of the bit field namesAll of the register addresses

PeripheralName.RegisterName.allPeripheralName.RegisterName.all // Access full 16 or 32// Access full 16 or 32--bit registerbit register

PeripheralName.RegisterName.half.LSWPeripheralName.RegisterName.half.LSW // Access low 16// Access low 16--bits of 32bits of 32--bit registerbit register

PeripheralName.RegisterName.half.MSWPeripheralName.RegisterName.half.MSW // Access high 16// Access high 16--bits of 32bits of 32--bit registerbit register

PeripheralName.RegisterName.bit.FieldNamePeripheralName.RegisterName.bit.FieldName // Access specified bit fields of register// Access specified bit fields of register

Notes: [1] Notes: [1] ““PeripheralNamePeripheralName”” are assigned by TI and found in the DSP280x header files. are assigned by TI and found in the DSP280x header files. They are a combination of capital and smalThey are a combination of capital and small letters (i.e. CpuTimer0Regs).l letters (i.e. CpuTimer0Regs).

[2] [2] ““RegisterNameRegisterName”” are the same names as used in the data sheet. are the same names as used in the data sheet. They are always in capital letters (i.e. TThey are always in capital letters (i.e. TCR, TIM, TPR,..).CR, TIM, TPR,..).

[3] [3] ““FieldNameFieldName”” are the same names as used in the data sheet.are the same names as used in the data sheet.They are always in capital letters (i.e. PThey are always in capital letters (i.e. POL, TOG, TSS,..). OL, TOG, TSS,..).


Example of Peripheral Structure .h file

/* ADC Individual Register Bit Definitions *//* ADC Individual Register Bit Definitions */structstruct ADCTRL1_BITS { // bits descriptionADCTRL1_BITS { // bits description

Uint16 rsvd1:4; // 3:0 reservedUint16 rsvd1:4; // 3:0 reservedUint16 SEQ_CASC:1; // 4 Cascaded sequencer modeUint16 SEQ_CASC:1; // 4 Cascaded sequencer modeUint16 SEQ_OVRD:1 // 5 Sequencer overrideUint16 SEQ_OVRD:1 // 5 Sequencer overrideUint16 CONT_RUN:1; // 6 Continuous runUint16 CONT_RUN:1; // 6 Continuous runUint16 CPS:1; // 7 ADC core clock Uint16 CPS:1; // 7 ADC core clock prescalerprescalerUint16 ACQ_PS:4; // 11:8 Acquisition window sizeUint16 ACQ_PS:4; // 11:8 Acquisition window sizeUint16 SUSMOD:2; // 13:12 Emulation suspend modeUint16 SUSMOD:2; // 13:12 Emulation suspend modeUint16 RESET:1; // 14 ADC resetUint16 RESET:1; // 14 ADC resetUint16 rsvd2:1; // 15 reservedUint16 rsvd2:1; // 15 reserved

};};

/* Allow access to the bit fields or entire register *//* Allow access to the bit fields or entire register */union ADCTRL1_REG {union ADCTRL1_REG {

Uint16 all;Uint16 all;structstruct ADCTRL1_BITS bit;ADCTRL1_BITS bit;

};};

// ADC External References & Function Declarations:// ADC External References & Function Declarations:

extern volatile extern volatile structstruct ADC_REGS ADC_REGS AdcRegsAdcRegs;;

Example Example Adc.hAdc.h

#include #include ““DSP280x_Device.hDSP280x_Device.h””

Void Void InitAdc(voidInitAdc(void)){{

/* Reset the ADC module *//* Reset the ADC module */AdcRegs.ADCTRL1.bit.RESET = 1;AdcRegs.ADCTRL1.bit.RESET = 1;

/* configure the ADC register *//* configure the ADC register */AdcRegs.ADCTRL1.all = 0x0710;AdcRegs.ADCTRL1.all = 0x0710;

};};

Example Example Adc.cAdc.c or main.cor main.c


IQ vs. Q Fractional FormatsIQ and Q both refer to fractional interpretations of a binary nuIQ and Q both refer to fractional interpretations of a binary number.mber.The term Q generally refers to a fraction that has no integer biThe term Q generally refers to a fraction that has no integer bits (other than ts (other than the sign bit), such that its range is between the sign bit), such that its range is between --1 and +1.1 and +1.The term IQ refers to a fraction that has one or more integer biThe term IQ refers to a fraction that has one or more integer bits. These ts. These integer bits increase the range of the format beyond integer bits increase the range of the format beyond ±±1 at the expense of an 1 at the expense of an equal number of bits of precision.equal number of bits of precision.

S IIIIIII ffffffffffffffffffffffff031

IQ format: (I8Q24 shown)

S fffffffffffffff015

Traditional 16-bit Q format:


ss Q30

sssssssssssss Q15

s Q15

ss Q30

sI Q30

ssssssssssssI Q15

s Q15

s Q15

s Q15

M

X

B

Y

<< 15 Align Binary Point For Add

Y = ((i32) M * (i32) X + (i32) B << Q) >> Q;in C:

>> 15 Align Binary Point For Store

Traditional 16-bit “Q” Math ApproachExample: y = mx + b


<< 24 Align Decimal Point For Add

I8 Q24 M

X

B

Y

I8 Q24

I8 Q24

I16 Q48

ssssssssssssssssssI8 Q24

ssssI8 Q48

I16 Q48

sssssssssssssssssI16 Q24 I8 Q24

Y = ((i64) M * (i64) X + (i64) B << Q) >> Q;in C:

Note: Requires Support For 64-bit Integer Data Type In Compiler

>> 24 Align Decimal Point For Store

“Q” Math Approach Applied to 32-bit NumbersExample: y = mx + b


I16 Q48

>> 24Align Decimal Point Of Multiply

I8 Q24 M

X

B

Y

I8 Q24

I8 Q24

sssssssssssssssssI16 Q24

I8 Q24I8 Q24

Y = ((i64) M * (i64) X) >> Q + B;in C:

32-bit IQmath ApproachExample: y = mx + b


Y = ((i64) M * (i64) X) >> Q + B;

_IQmpy(M,X) == ((i64) M * (i64) X) >> Q

Redefine The Multiply Operation As Follows:

Y = _IQmpy(M,X) + B;

This Simplifies The Equation As Follows:

MOVL XT,@M ; XT = MIMPYL P,XT,@X ; P = lo 32-bits of M*X QMPYL ACC,XT,@X ; ACC = hi 32-bits of M*XLSL64 ACC:P,#(32-Q) ; ACC = ACC:P << 32-Q

ADDL ACC,@B ; Add BMOVL @Y,ACC ; Store result

C28x Compiler Supports “_IQmpy()” Intrinsic. Assembly Code Generated:

IQmath: The Multiply

1121

11

5 cycle basicIQ multiplyoperationusing C-code.


float Y, M, X, B;

Y = M * X + B;

Floating-Point

long Y, M, X, B;

Y = ((i64) M * (i64) X + (i64) B << Q)) >> Q;

TraditionalFix-Point Q

_iq Y, M, X, B;

Y = _IQmpy(M, X) + B;

“IQmath”In C

iq Y, M, X, B;

Y = M * X + B;

“IQmath”In C++

IQmath can take advantage of the operator overloading feature of C++

IQmath: It looks like floating-point!


IQsin(A),IQcos(A)IQsin(A),IQcos(A)IQsinPU(A),IQcosPU(A)IQsinPU(A),IQcosPU(A)IQatan(A),IQatan2(A,B)IQatan(A),IQatan2(A,B)

IQatan2PU(A,B)IQatan2PU(A,B)IQsqrt(A),IQisqrt(A)IQsqrt(A),IQisqrt(A)

IQmag(A,B)IQmag(A,B)

_IQsin(A), _IQcos(A)_IQsin(A), _IQcos(A)_IQsinPU(A), _IQcosPU(A)_IQsinPU(A), _IQcosPU(A)_IQatan(A), _IQatan2(A,B)_IQatan(A), _IQatan2(A,B)

_IQatan2PU(A,B)_IQatan2PU(A,B)_IQsqrt(A), _IQisqrt(A)_IQsqrt(A), _IQisqrt(A)

_IQmag(A,B)_IQmag(A,B)

sin(A),cos(A) sin(A),cos(A) sin(A*2pi),cos(A*2pi)sin(A*2pi),cos(A*2pi)atan(A),atan2(A,B)atan(A),atan2(A,B)

atan2(A,B)/2piatan2(A,B)/2pisqrt(A),1/sqrt(A)sqrt(A),1/sqrt(A)sqrt(A*A + B*B)sqrt(A*A + B*B)

trigtrigfunctionsfunctions

IQsat(A,Pos,Neg)IQsat(A,Pos,Neg)_IQsat(A,Pos,Neg)_IQsat(A,Pos,Neg)if(A > Pos) A = Posif(A > Pos) A = Posif(A < Neg) A = Negif(A < Neg) A = Neg

saturationsaturation

A A –– BBA A -- BBA A -- BBsubtractsubtract

>, >=, <, <=, ==, |=, &&, || >, >=, <, <=, ==, |=, &&, || >, >=, <, <=, ==, |=, &&, ||>, >=, <, <=, ==, |=, &&, ||>, >=, <, <=, ==, |=, &&, ||>, >=, <, <=, ==, |=, &&, ||booleanboolean

A + BA + BA + BA + BA + BA + Baddadd

A / BA / B_IQdiv (A , B)_IQdiv (A , B)A / B A / B dividedivide

A * BA * B_IQmpy(A , B)_IQmpy(A , B)A * BA * Bmultiplymultiply

A = IQ(1.2345)A = IQ(1.2345)A = _IQ(1.2345)A = _IQ(1.2345)A = 1.2345A = 1.2345constantconstant

iq A, B;iq A, B;_iq A, B;_iq A, B;float A, B;float A, B;typetype

““IQmathIQmath”” in C++in C++““IQmathIQmath”” in Cin CFloatingFloating--PointPointOperationOperation

Accuracy Of Functions/Operations Approximately 28 to 31 bits

IQmath Library v1.4: Math & Trig Functions


atoIQ(char)atoIQ(char)_atoIQ(char)_atoIQ(char)atof(char)atof(char)string to iqstring to iq

IQtoQN(A)IQtoQN(A)_IQtoQN(A)_IQtoQN(A)AAiq to qNiq to qN

QNtoIQ(A)QNtoIQ(A)_QNtoIQ(A)_QNtoIQ(A)AAqN to iqqN to iq

IQmpyI32int(A,B)IQmpyI32int(A,B)_IQmpyI32int(A,B)_IQmpyI32int(A,B)(long) (A * (float) B)(long) (A * (float) B)integer(iq*long)integer(iq*long)

IQmpyI32frac(A,B)IQmpyI32frac(A,B)_IQmpyI32frac(A,B)_IQmpyI32frac(A,B)A A -- (long) (A * (float) B)(long) (A * (float) B)fraction(iq*long)fraction(iq*long)

IQtoF(A)IQtoF(A)_IQtoF(A)_IQtoF(A)AAIQ to floatIQ to float

IQmpyI32(A,B)IQmpyI32(A,B)_IQmpyI32(A,B)_IQmpyI32(A,B)A * (float) B A * (float) B iq = iq*longiq = iq*long

IQfrac(A)IQfrac(A)_IQfrac(A)_IQfrac(A)A A –– (long) A(long) Afraction(iq)fraction(iq)

IQint(A)IQint(A)_IQint(A)_IQint(A)(long) A(long) Ainteger(iq)integer(iq)

IQNtoIQ(A)IQNtoIQ(A)_IQNtoIQ(A)_IQNtoIQ(A)AAiqN to iqiqN to iq

IQtoIQN(A)IQtoIQN(A)_IQtoIQN(A)_IQtoIQN(A)AAiq to iqNiq to iqN

““IQmathIQmath”” in C++in C++““IQmathIQmath”” in Cin CFloatingFloating--PointPointOperationOperation

IQmath Library v1.4: Conversion Functions

Most of the above “Functions” are C macros, and compile very efficiently.


0.000 000 060.000 000 06--128.000 000 00128.000 000 00127.999 999 94127.999 999 942424

0.000 0010.000 001--2048.000 0002048.000 0002047.999 9992047.999 9992020

0.000 000 0040.000 000 004--8.000 000 0008.000 000 0007.999 999 9967.999 999 9962828

ResolutionResolutionMin ValMin ValMax ValMax ValGLOBAL_QGLOBAL_Q

#define GLOBAL_Q 24 // set in “IQmathLib.h” file

_iq Y, M, X, B;

Y = _IQmpy(M,X) + B; // all values are in I8Q24

The user selects a “Global Q” value for the entire application:

Based On The Required Dynamic Range Or Resolution

The user can also explicitly specify the IQ value to use:_iq20 Y, M, X, B;

Y = _IQ20mpy(M,X) + B; // all values are in I12Q20

IQmath: The GLOBAL_Q Simplification


Y = _IQmpy(M, X) + B;

#if MATH_TYPE == IQ_MATH #if MATH_TYPE == FLOAT_MATH

Y = (float)M * (float)X + (float)B;

Compile & RunUsing Floating-Point Math on

any floating point compiler

Compile & RunUsing “IQmath” On

C28x

User Selects Target Math Type(in “IQmathLib.h” file)

All “IQmath” Operations Have An Equivalent Floating-Point Operation

IQmath: The MATH_TYPE ConstantOne Source Code Set Targets Fixed or Floating Point Devices


“IQmath”Algorithm(C or C++)

Floating-Point DSP

(i.e. C3x, C67x)Fix-Point DSP

(i.e. C28x)

One Source Code Set for both Simulation and

HardwareSpeedy Algorithm Porting

SimulationPlatform

(i.e. MatLab)

The Fixed Point Development Dilemma Solved with IQmath!


Applicable anywhere large dynamic range is not requiredApplicable anywhere large dynamic range is not requiredMotor and Servo Control (PID, State Estimator, Kalman,...)ModemsAudio (MP3, etc.)Imaging (JPEG, etc.)Any application using 16-bit or 32-bit fixed-point Q math

One source code set for simulation and target deviceOne source code set for simulation and target deviceSeamless portability of code between fixed and floating-point devicesUser selects target math type in “IQmathLib.h” file

• #define MATH_TYPE == IQ_MATH• #define MATH_TYPE == FLOAT_MATH

Numerical precision selectable based on application requirementNumerical precision selectable based on application requirementSet in “IQmathLib.h” file: #define GLOBAL_Q 18Explicitly specify Q value: _iq20 X, Y, Z;

Rapid conversion/porting and implementation of algorithmsRapid conversion/porting and implementation of algorithms

IQmath Summary

Overall, you may just think it’s floating point!C28x™ IQMath Library - A Virtual Floating Point Engine (SPRC087).


F281X Basic Flash OperationFlash is arranged in pages of 2048 bits(128 words)Flash is arranged in pages of 2048 bits(128 words)Wait states are specified for consecutive accesses without a pagWait states are specified for consecutive accesses without a page, e, and random accesses across pagesand random accesses across pagesOTP has random access onlyOTP has random access onlyMust specify the number of SYSCLKOUT waitMust specify the number of SYSCLKOUT wait--states states Reset defaults Reset defaults are maximum valuesare maximum valuesFlash configuration code should not be run from the Flash memoryFlash configuration code should not be run from the Flash memory

FBANKWAITFBANKWAIT@ 0x00 0A86 @ 0x00 0A86 RANDWAITRANDWAITreserved

1515 004 34 38 78 7

PAGEWAITPAGEWAIT reserved

12 1112 11

FOTPWAITFOTPWAIT@ 0x00 0A87 @ 0x00 0A87 OTPWAITOTPWAITreserved

1515 004 34 3

*** *** Refer to the F281x datasheet for detailed numbers ***Refer to the F281x datasheet for detailed numbers ***For 150 MHz, PAGEWAIT = 5, RANDWAIT = 5, OTPWAIT = 8For 150 MHz, PAGEWAIT = 5, RANDWAIT = 5, OTPWAIT = 8For 135 MHz, PAGEWAIT = 4, RANDWAIT = 4, OTPWAIT = 8For 135 MHz, PAGEWAIT = 4, RANDWAIT = 4, OTPWAIT = 8


16 or 32 16 or 32 dispatcheddispatched

1616

6464

Aligned Aligned 6464--bit bit fetchfetch

22--level deep level deep fetch bufferfetch buffer

6464C28x Core C28x Core

decoder unitdecoder unit

Speeding Up Code Execution in Flash:Flash Pipelining (for code fetch only)

Flash Pipeline EnableFlash Pipeline Enable0 = disable (default)0 = disable (default)1 = enable1 = enable

ENPIPEENPIPEreserved1515 0011FOPT @ 0x00 0A80 FOPT @ 0x00 0A80

TMS320F28x DSP System Control and Interrupts Reference Guide,” SPRU078, for more information


F281X Code Execution PerformanceAssume 150 MHz SYSCLKOUT, 16Assume 150 MHz SYSCLKOUT, 16--bit instructionsbit instructions (80% of instructions are 16 bits wide (80% of instructions are 16 bits wide ––Rest are 32 bits)Rest are 32 bits)

Internal RAM: 150 MIPSInternal RAM: 150 MIPSFetch up to 32Fetch up to 32--bits every cycle bits every cycle 1 instruction/cycle * 150 MHz = 150 MIPS1 instruction/cycle * 150 MHz = 150 MIPS

Flash (w/ pipelining): 100 MIPSFlash (w/ pipelining): 100 MIPSRANDWAIT = 5RANDWAIT = 5Fetch 64 bits every 6 cycles Fetch 64 bits every 6 cycles 4 instructions/6 cycles * 150 MHz = 100 MIPS4 instructions/6 cycles * 150 MHz = 100 MIPSRPT will increase this; PC discontinuity will degrade thisRPT will increase this; PC discontinuity will degrade this

External SRAM (10 or 12 ns): 37.5 MIPSExternal SRAM (10 or 12 ns): 37.5 MIPSXRDLEAD=1, XRDACTIVE=2, XRDTRAIL=0XRDLEAD=1, XRDACTIVE=2, XRDTRAIL=0Fetch 16 bits every 4 cycles Fetch 16 bits every 4 cycles 1 instruction/4 cycles * 150 MHz = 37.5 MIPS1 instruction/4 cycles * 150 MHz = 37.5 MIPSRPT will increase thisRPT will increase this

DonDon’’t put code in external memory!t put code in external memory!


F280x Code Execution PerformanceAssume 100 MHz SYSCLKOUT, 16Assume 100 MHz SYSCLKOUT, 16--bit instructionsbit instructions (80% of instructions are 16 bits wide (80% of instructions are 16 bits wide ––Rest are 32 bits)Rest are 32 bits)

Internal RAM: 100 MIPSInternal RAM: 100 MIPSFetch up to 32Fetch up to 32--bits every cycle bits every cycle 1 instruction/cycle * 100 MHz = 100 MIPS1 instruction/cycle * 100 MHz = 100 MIPS

Flash (w/ pipelining): 100 MIPSFlash (w/ pipelining): 100 MIPSRANDWAIT = 3RANDWAIT = 3Fetch 64 bits every 4 cycles Fetch 64 bits every 4 cycles 4 instructions/4 cycles * 100 MHz = 100 MIPS4 instructions/4 cycles * 100 MHz = 100 MIPSRPT will increase this; PC discontinuities and 32 bit instructiRPT will increase this; PC discontinuities and 32 bit instructions will degrade thisons will degrade thisBenchmarking in control applications has shown actual performancBenchmarking in control applications has shown actual performance of about 85 MIPSe of about 85 MIPS


F281x Reset – Bootloader

ResetResetOBJMODE=0 AMODE=0OBJMODE=0 AMODE=0

ENPIE=0 VMAP=1ENPIE=0 VMAP=1

Boot determined by Boot determined by state of GPIO pinsstate of GPIO pins

Reset vector fetched Reset vector fetched from boot ROMfrom boot ROM

0x3F FFC00x3F FFC0

XMPNMC=1XMPNMC=1(microprocessor mode)(microprocessor mode)

Reset vector fetched Reset vector fetched from XINTF zone 7from XINTF zone 7

0x3F FFC00x3F FFC0

XMPNMC=0XMPNMC=0(microcomputer mode)(microcomputer mode)

ExecutionExecution BootloadingBootloadingEntry PointEntry Point RoutinesRoutinesFLASHFLASH SPISPI

H0 SARAMH0 SARAM SCISCI--AAOTPOTP Parallel loadParallel load

Notes:Notes:F2810 XMPNMC tied low internal to deviceF2810 XMPNMC tied low internal to deviceXMPNMC refers to input signalXMPNMC refers to input signalMP/MC is status bit in XINTFCNF2 registerMP/MC is status bit in XINTFCNF2 registerXMPNMC only sampled at resetXMPNMC only sampled at reset

BootloaderBootloader setssetsOBJMODE = 1OBJMODE = 1

AMODE = 0AMODE = 0


F281x Bootloader Options

GPIO pinsGPIO pinsF4 F12 F3 F2F4 F12 F3 F21 x x x jump to 1 x x x jump to FLASHFLASH address 0x3F 7FF6 *address 0x3F 7FF6 *0 0 1 0 jump to 0 0 1 0 jump to H0 SARAMH0 SARAM address 0x3F 8000 *address 0x3F 8000 *0 0 0 1 jump to 0 0 0 1 jump to OTPOTP address 0x3D 7800 *address 0x3D 7800 *0 1 x x 0 1 x x bootloadbootload external EEPROM to onexternal EEPROM to on--chip memory via chip memory via SPISPI portport0 0 1 1 0 0 1 1 bootloadbootload code to oncode to on--chip memory via chip memory via SCISCI--AA portport0 0 0 0 0 0 0 0 bootloadbootload code to oncode to on--chip memory via chip memory via GPIO port BGPIO port B (parallel)(parallel)

* * Boot ROM software configures the device for C28x mode before jumBoot ROM software configures the device for C28x mode before jumpp


F281x Reset Code Flow - Summary

H0 SARAM (8K)H0 SARAM (8K)


OTP (1K)OTP (1K)

0x3F 7FF60x3F 7FF6

0x3D 78000x3D 7800

0x3D 80000x3D 8000

0x3F 80000x3F 8000

0x3F F0000x3F F000

0x3F FFC00x3F FFC0

Boot ROM (4K)Boot ROM (4K)

BROM vector (32)BROM vector (32)0x3F FC000x3F FC00

Boot CodeBoot Code

••••

••••

RESETRESET

Execution Entry Execution Entry Point DeterminedPoint Determined

By GPIO PinsBy GPIO Pins

BootloadingBootloadingRoutines Routines

(SPI, SCI(SPI, SCI--A,A,Parallel Load)Parallel Load)

0x3F FC000x3F FC00


F280x Reset – Bootloader

ResetResetOBJMODE=0 AMODE=0OBJMODE=0 AMODE=0

ENPIE=0 VMAP=1ENPIE=0 VMAP=1

Boot determined by Boot determined by state of GPIO pinsstate of GPIO pins

Reset vector fetched from Reset vector fetched from boot ROM 0x3F FFC0boot ROM 0x3F FFC0

ExecutionExecution BootloadingBootloadingEntry PointEntry Point RoutinesRoutines

FLASHFLASH SCISCI--AAM0 SARAMM0 SARAM SPISPI--AA

OTPOTP I2CI2CeCANeCAN--AA

Parallel loadParallel load

BootloaderBootloader setssetsOBJMODE = 1OBJMODE = 1

AMODE = 0AMODE = 0


F280x Bootloader Options

GPIO pinsGPIO pins18 29 3418 29 341 1 1 jump to 1 1 1 jump to FLASHFLASH address 0x3F 7FF6 address 0x3F 7FF6 0 1 0 jump to 0 1 0 jump to M0 SARAMM0 SARAM address 0x00 0000 address 0x00 0000 0 0 1 jump to 0 0 1 jump to OTPOTP address 0x3D 7800 address 0x3D 7800 1 1 0 1 1 0 bootloadbootload code to oncode to on--chip memory via chip memory via SCISCI--AA1 0 1 1 0 1 bootloadbootload external EEPROM to onexternal EEPROM to on--chip memory via chip memory via SPISPI--AA1 0 0 1 0 0 bootloadbootload external EEPROM to onexternal EEPROM to on--chip memory via chip memory via I2CI2C0 1 1 Call 0 1 1 Call CAN_BootCAN_Boot to load from to load from eCANeCAN--AA mailbox 1mailbox 10 0 0 0 0 0 bootloadbootload code to oncode to on--chip memory via chip memory via GPIO port AGPIO port A (parallel)(parallel)


F280x Reset Code Flow - Summary

M0 SARAM (1K)M0 SARAM (1K)


OTP (1K)OTP (1K)

0x3F 7FF60x3F 7FF6

0x3D 78000x3D 7800

0x3E 80000x3E 8000

0x00 00000x00 0000

0x3F F0000x3F F000

0x3F FFC00x3F FFC0

Boot ROM (4K)Boot ROM (4K)

BROM vector (32)BROM vector (32)0x3F FB500x3F FB50

Boot CodeBoot Code

••••

••••

RESETRESET

Execution Entry Execution Entry Point DeterminedPoint Determined

By GPIO PinsBy GPIO Pins

BootloadingBootloadingRoutines Routines

(SCI(SCI--A, SPIA, SPI--A, I2C, A, I2C, eCANeCAN--A, Parallel Load)A, Parallel Load)

0x3F FB500x3F FB50


C28x Core Interrupt Lines

C28xC28xCORECORE

2 non2 non--maskablemaskable interrupts (RS, interrupts (RS, ““selectableselectable”” NMI)NMI)14 14 maskablemaskable interrupts (INT1 interrupts (INT1 ––INT14)INT14)

INT1INT1INT2INT2INT3INT3INT4INT4INT5INT5INT6INT6INT7INT7INT8INT8INT9INT9

INT10INT10INT11INT11INT12INT12INT13INT13INT14INT14

RSRSNMINMI


8 104

PrioPrio VectorVector OffsetOffset

Default Interrupt Vector Table at Reset

MemoryMemory00

BROM VectorsBROM Vectors64 W64 W

0x3F FFC00x3F FFC0

0x3F FFFF0x3F FFFF

PIE VectorsPIE Vectors256 W256 W

0x00 0D000x00 0D00

442233

DlogIntDlogIntRtosIntRtosIntEmuIntEmuIntNMINMI

02020404060608080A0A0C0C0E0E101012121414161618181A1A1C1C1E1E20202222242426262828--3E3E

----

IllegalIllegalUser 1User 1--1212

5566778899

1010111112121313141415151616171718181919

IntInt 11IntInt 22IntInt 33IntInt 44IntInt 55IntInt 66IntInt 77IntInt 88IntInt 99IntInt 1010IntInt 1111IntInt 1212IntInt 1313IntInt 1414

11 ResetReset 0000 Default Vector TableDefault Vector TableRemapped whenRemapped when

ENPIE = 1ENPIE = 1

PIE vector generated by PIE vector generated by configconfig ToolToolUsed to initialize PIE vectorsUsed to initialize PIE vectors


Interrupt Response - Hardware Sequence

Note: some actions occur simultaneously, none are interruptibleNote: some actions occur simultaneously, none are interruptible

CPU ActionCPU Action DescriptionDescription

TT ST0ST0AHAH ALALPHPH PLPLAR1AR1 AR0AR0DPDP ST1ST1DBSTATDBSTAT IERIERPC(mswPC(msw)) PC(lswPC(lsw))

RegistersRegisters →→ stackstack 14 Register words auto saved14 Register words auto saved00 →→ IFR (bit)IFR (bit) Clear corresponding IFR bitClear corresponding IFR bit00 →→ IER (bit)IER (bit) Clear corresponding IER bitClear corresponding IER bit11 →→ INTM/DBGMINTM/DBGM Disable global Disable global intsints/debug events/debug eventsVectorVector →→ PCPC Loads PC with Loads PC with intint vector addressvector addressClear other status bitsClear other status bits Clear LOOP, EALLOW, IDLESTATClear LOOP, EALLOW, IDLESTAT


Interrupt Latency

LatencyLatency

Depends on wait states, ready, INTM, etc.Depends on wait states, ready, INTM, etc.Maximum latency:Maximum latency:

Recognition Recognition delay (3), SP delay (3), SP alignment (1), alignment (1),

interrupt interrupt placed in placed in pipelinepipeline

44

Minimum latency (to when real work occurs in the ISR): Minimum latency (to when real work occurs in the ISR): Internal interrupts: 14 cyclesInternal interrupts: 14 cyclesExternal interrupts: 16 cyclesExternal interrupts: 16 cycles

Get vector Get vector and place and place

in PC in PC (3 reg. (3 reg. pairs pairs

saved)saved)

33PF1/PF2/D1 PF1/PF2/D1

of ISR of ISR instruction instruction

(3 reg. pairs (3 reg. pairs saved)saved)

33Save Save return return

addressaddress

11D2/R1/R2 of D2/R1/R2 of

ISR ISR instructioninstruction

33Sync ext. Sync ext.

signalsignal(ext. (ext.

interrupt interrupt only)only)

22cycles

Above is for PIE enabled or disabledAbove is for PIE enabled or disabled

Assumes ISR in Assumes ISR in internal RAMinternal RAM

Internal Internal interrupt interrupt occurs occurs herehere

ext. ext. interrupt interrupt occurs occurs herehere

ISR ISR instruction instruction executed executed on next on next cyclecycle


TopicsCCS setup and CCS setup and configueconfigue, project setup, project setupRealReal--time mode & H/W breakpointtime mode & H/W breakpointHow to use and configure Flash toolsHow to use and configure Flash toolsF28X Header FileF28X Header FileIQmathIQmathS/W LibraryS/W Library


Motor-Specific Software Solutions

TMS320C28XSPRC128 PMSM3_2:3-Phase Sensorless Field Orented Control

TMS320C28XSPRC197 PMSM3_2: 3-Phase Sensorless Field Orented Contro

TMS320C28XSPRC179 C28x & F28x PMSM3_4: Sensored Position Control of PMSM Using QEP

TMS320C28XSPRC178 C28x & F28x PMSM3_3: Sensored FOC of PMSM Using Resolver

TMS320C28XSPRC177 C28x & F28x DCMOTOR: Speed & Position Control of Brushed DC Motor Using QEP Without Index

TMS320C28XSPRC175 C28x & F28x BLDC3_1: Sensored Trapezoidal Control of BLDC Motor Using Hall Sensors

TMS320C28XSPRC080 C28x & F28x Digital Motor Control Library

TMS320C28XSPRC078 C28x & F28x ACI3_4: Sensor-less Direct FOC of 3-Phase ACI Motor (Simulation Model)

TMS320C28XSPRC077 C28x & F28x ACI3_3: Sensored Indirect FOC of 3-phase ACI Motor(Simulatiom Model)

TMS320C28XSPRC129 C28x & F28x PMSM3_1: 3-Phase Sensored Field Oriented Control

TMS320C24XSPRC107 C24x & F24x PMSM3_1: 3-Phase Sensored Field Oriented Control

TMS320C24XSPRC112 C24x & F24x BLDC3_1: 3-Phase Sensored Trapezoidal Control

TMS320C24XSPRC127 C24x & F24x ACI3_4: Sensorless Direct Flux Vector Control of ACI Motor

TMS320C24XSPRC111 C24x & F24x ACI3_3: 3-Phase Sensored Field Oriented Control (FOC)

TMS320C24XSPRC104 C24x & F24x ACI3_2:3-Phase Sensorless MRAS control with Constant V/Hz

TMS320C24XSPRC106 C24x & F24x ACI3_1: Three Phase ACI Motor Control with Constant V/Hz

TMS320C24XSPRC110 C24x & F24x ACI1_1: Single Phase ACI Motor Control using Constant V/Hz

TMS320C24XSPRC109 C24x & F24x PMSM3_2: 3-Phase Sensorless Field Orented Control

TMS320C24X SPRC105 C24x & F24x Digital Motor Control Library

TMS320C24XSPRC108 C24x & F24x BLDC3_2: 3-Phase Sensorless Trapezoidal Control

TMS320C28XSPRC196 BLDC3_2: Sensorless trapezoidal drive of BLDC Motor

TMS320C28XSPRC176 BLDC3_2: Sensorless Trapezoidal Control of BLDC Motor

TMS320C28XSPRC195 ACI3_4: Sensor-less Direct Flux Vector Control of 3-phase ACI Motor

TMS320C28XSPRC079 ACI3_4: Sensor-less Direct Flux Vector Control of 3-phase ACI Motor

TMS320C28XSPRC194 ACI3_1:Three Phase ACI Control with Constant V/Hz

TMS320C28XSPRC130 ACI3_1: Three Phase ACI Control with Constant V/Hz

Product GroupS/W No.Name


SPRC228Demonstrates ePWMCapabilities for Digital Power Applications

Standard ePWM

SPRC227Demonstrates HRPWM Capabilities for Digital Power Applications

High Resolution ePWM

SPRC229DC-DC Buck Converter using High Resolution ePWM

DC-DC Buck Converter

Part NumberDescriptionSystem

Digital Power System Solutions for C2808, C2806, C2802 and C2801

www.ti.com/c2000appsw


TMS320C28X DSP SPRC087 C28x™ IQMath Library - A Virtual Floating Point Engine

TMS320C28X DSP SPRC084 C28x Software Test Bench (STB) Library

TMS320C28X DSP SPRC083 C28x Signal Generator Library

TMS320C28X DSP SPRC085 C28x Fixed-Point Math Library

TMS320C28X DSP SPRC082 C28x Filter Library

TMS320C28X DSP SPRC081 C28x Fast Fourier Transforms Library

TMS320C28X DSP SPRC183 C28x Communications Driver Library

TMS320C24X DSP SPRC070 C24x Software Test Bench (STB) Library

TMS320C24X DSP SPRC071 C24x Signal Generator Library

TMS320C24X DSP SPRC068 C24x Fixed-Point Math Library

TMS320C24X DSP SPRC072 C24x Filter Library

TMS320C24X DSP SPRC069 C24x Fast Fourier Transform (FFT) Library

Product GroupS/W NumberName

Signal Processing Libraries for C2000™ Digital Signal Controllers


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