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CHAPTER 9: MEMORY MANAGEMENT ( 内内内内 ) Background Background Swapping Swapping Contiguous Allocation Contiguous Allocation Paging Paging Segmentation Segmentation Segmentation with Paging Segmentation with Paging

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Page 1: CHAPTER 9: MEMORY MANAGEMENT ( 内存管理 ) Background Background Swapping Swapping Contiguous Allocation Contiguous Allocation Paging Paging Segmentation Segmentation

CHAPTER 9: MEMORY MANAGEMENT ( 内存管理 ) BackgroundBackground Swapping Swapping Contiguous AllocationContiguous Allocation PagingPaging SegmentationSegmentation Segmentation with PagingSegmentation with Paging

Page 2: CHAPTER 9: MEMORY MANAGEMENT ( 内存管理 ) Background Background Swapping Swapping Contiguous Allocation Contiguous Allocation Paging Paging Segmentation Segmentation

BACKGROUND Sharing Sharing Management Management

CPU sharingCPU sharing Memory sharingMemory sharing

Memory managementMemory management Actual memory managementActual memory management

Contiguous partition allocationContiguous partition allocationPagingPagingsegmentationsegmentation

Virtual memory managementVirtual memory managementDemand pagingDemand pagingdemand segmentationdemand segmentation

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Background : Logical vs. Physical Address Space

Program must be brought into memory and placed within Program must be brought into memory and placed within a process for it to be run.a process for it to be run.

CPU CPU Memory Memory Logical addressLogical address ( ( 逻辑地址逻辑地址 ) and ) and Physical addressPhysical address ( ( 物物

理地址理地址 )) Logical addressLogical address ( ( 逻辑地址逻辑地址 )– generated by the CPU; )– generated by the CPU;

also referred to as also referred to as virtual addressvirtual address.. Physical addressPhysical address ( ( 物理地址物理地址 )– address seen by the m)– address seen by the m

emory unit.emory unit. Logical and physical addresses are the same in compile-tiLogical and physical addresses are the same in compile-ti

me and load-time address-binding schemes; logical (virtume and load-time address-binding schemes; logical (virtual) and physical addresses differ in execution-time addresal) and physical addresses differ in execution-time address-binding scheme.s-binding scheme.

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Background: Memory-Management Unit (MMU)

What is seen is not always true. What is seen is not always true. Hardware device that maps virtual to physical Hardware device that maps virtual to physical

address.address. In MMU scheme, the value in the relocation In MMU scheme, the value in the relocation

register is added to every address generated by register is added to every address generated by a user process at the time it is sent to memory.a user process at the time it is sent to memory.

The user program deals with The user program deals with logicallogical addresses; addresses; it never sees the it never sees the realreal physical addresses. physical addresses.

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Background:Dynamic relocation using a relocation register

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Background : Multistep Processing of a User Program

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Background : Binding of Instructions and Data to Memory

Address binding of instructions and data to memory addresses can happen at three different stages.

Compile timeCompile time: If you know at compile time where the pr: If you know at compile time where the process will reside in memory, then absolute code can be geocess will reside in memory, then absolute code can be generated. Recompiling may be required. nerated. Recompiling may be required.

Load timeLoad time: If it is not known at compile time where the : If it is not known at compile time where the process will reside in memory, then the compiler must geprocess will reside in memory, then the compiler must generate relocatable code. nerate relocatable code.

Execution timeExecution time: If the process can be moved during its e: If the process can be moved during its execution from one memory segment to another, then bindxecution from one memory segment to another, then binding must be delayed until run time. This requires hardwaring must be delayed until run time. This requires hardware support for address maps (e.g., e support for address maps (e.g., basebase and and limit registerslimit registers). ).

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Background: Dynamic Loading (v.s. static loading) Should the entire program and data of a process be in Should the entire program and data of a process be in

physical memory for the process to execute?physical memory for the process to execute? Routine is not loaded until it is called.Routine is not loaded until it is called. DiscussionDiscussion

Better memory-space utilization; unused routine is Better memory-space utilization; unused routine is never loaded.never loaded.

Useful when large amounts of code are needed to Useful when large amounts of code are needed to handle infrequently occurring cases.handle infrequently occurring cases.

No special support from the operating system is No special support from the operating system is required. required.

The OS can help by providing library routines to The OS can help by providing library routines to implement dynamic loading.implement dynamic loading.

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Background: Dynamic Linking (v.s. static linking)

Static linking(Static linking( 静态连接静态连接 ) ) dynamic linking( dynamic linking( 动态连动态连接接 ))

Linking postponed until execution time.Linking postponed until execution time. Small piece of code, Small piece of code, stubstub (存根)(存根) , used to locate the a, used to locate the a

ppropriate memory-resident library routine.ppropriate memory-resident library routine. Stub replaces itself with the address of the routine, and exStub replaces itself with the address of the routine, and ex

ecutes the routine.ecutes the routine.

Operating system needed to check if routine is in processOperating system needed to check if routine is in processes’ memory address.es’ memory address.

Dynamic linking is particularly useful for libraries.Dynamic linking is particularly useful for libraries.

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Background: Overlays (覆盖 ) Keep in memory only those instructions and Keep in memory only those instructions and

data that are needed at any given time.data that are needed at any given time.

Needed when process is larger than amount of Needed when process is larger than amount of memory allocated to it.memory allocated to it.

Implemented by user, no special support Implemented by user, no special support needed from operating system, programming needed from operating system, programming design of overlay structure is complex.design of overlay structure is complex.

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Background: Overlays for a Two-Pass Assembler

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SWAPPING (交换) A process can be A process can be swappedswapped temporarily out of memory temporarily out of memory

to a to a backing storebacking store (备份仓库)(备份仓库) , and then brought b, and then brought back into memory for continued execution.ack into memory for continued execution.

Backing store – fast disk large enough to accommodaBacking store – fast disk large enough to accommodate the copies of all memory images for all users; must te the copies of all memory images for all users; must provide direct access to these memory images.provide direct access to these memory images.

Roll out, roll inRoll out, roll in – swapping variant used for priority-b – swapping variant used for priority-based scheduling algorithms; lower-priority process is ased scheduling algorithms; lower-priority process is swapped out so higher-priority process can be loaded swapped out so higher-priority process can be loaded and executed.and executed.

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Swapping: Schematic View

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Swapping: Backing store

Swap fileSwap file

Swap deviceSwap device

Swap device and swap fileSwap device and swap file

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Swapping: Performance

Major part of swap time is transfer time; total transfer Major part of swap time is transfer time; total transfer time is directly proportional to the time is directly proportional to the amountamount of memory of memory swapped.swapped. 1000KB/5000KBS = 1/5 seconds = 200ms1000KB/5000KBS = 1/5 seconds = 200ms

Modified versions of swapping are found on many Modified versions of swapping are found on many systems, i.e., UNIX, Linux, and Windows.systems, i.e., UNIX, Linux, and Windows. UNIXUNIX Windows 3.1Windows 3.1

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CONTIGUOUS MEMORY ALLOCATION

The main memory must accommodate The main memory must accommodate both the operating system both the operating system and the various user processes.and the various user processes.

The main memory is usually divided into two The main memory is usually divided into two partitions: partitions: One for the resident operating system, usually held One for the resident operating system, usually held

in low memory with interrupt vector,in low memory with interrupt vector, The other for user processes, then held in high The other for user processes, then held in high

memory.memory. For contiguous memory allocation, each process is For contiguous memory allocation, each process is

contained in a single contiguous section of memory.contained in a single contiguous section of memory.

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Contiguous Memory Allocation: Memory protection

Why to protect memory?Why to protect memory? To protect the OS from user processesTo protect the OS from user processes And to protect user process from each other.And to protect user process from each other.

How to protect memory?How to protect memory? To use relocation registers and limit registers to To use relocation registers and limit registers to

protect user processes from each other, and from protect user processes from each other, and from changing operating-system code and data.changing operating-system code and data.

The relocation register contains the value of The relocation register contains the value of smallest physical address; the limit register smallest physical address; the limit register contains the range of logical addresses – each contains the range of logical addresses – each logical address must be less than the limit register.logical address must be less than the limit register.

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Contiguous Memory Allocation: Hardware Support for Relocation and Limit Registers

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Contiguous Memory Allocation: Types

Fixed-sized contiguous partitionFixed-sized contiguous partition

Dynamic contiguous partitionDynamic contiguous partition

Buddy systemBuddy system

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Contiguous Memory Allocation:Fixed-Sized Contiguous Partitions

Main memory is divided into a number of fixed partitMain memory is divided into a number of fixed partitions at system generation time. A process may be loaions at system generation time. A process may be loaded into a partition of equal or greater size. ded into a partition of equal or greater size. Equal-size partitionsEqual-size partitions Unequal-size partionsUnequal-size partions

Equal-size partitions: Equal-size partitions: A program may be too big to fit into a partition. A program may be too big to fit into a partition. Main-memory utilization is extremely inefficient. Main-memory utilization is extremely inefficient.

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Contiguous Memory Allocation:Fixed-Sized Contiguous Partitions Unequal-size partitions: Unequal-size partitions:

Placement algorithms for unequal-size partitions Placement algorithms for unequal-size partitions best-fit best-fit first-fit first-fit worst-fit worst-fit

Conclusion for Fixed-Sized Contiguous PartitionConclusion for Fixed-Sized Contiguous Partition Strengths: Simple to implement; little overhead Strengths: Simple to implement; little overhead Weaknesses: internal fragmentation; fixed number Weaknesses: internal fragmentation; fixed number

of processes of processes

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Contiguous Memory Allocation:Dynamic Contiguous Partitions Partitions are created dynamically, so that each Partitions are created dynamically, so that each

process is loaded into a partition of exactly the same process is loaded into a partition of exactly the same size as that process.size as that process.

The OS maintains information about:The OS maintains information about:a) allocated partitions b) free partitions (hole)a) allocated partitions b) free partitions (hole) When a process arrives, find a hole for itWhen a process arrives, find a hole for it When a process terminates, return the memory and When a process terminates, return the memory and

merge the holesmerge the holes Holes of various size are scattered throughout Holes of various size are scattered throughout

memory.memory.

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Contiguous Memory Allocation: Dynamic Contiguous Partitions

OS

process 5

process 8

process 2

OS

process 5

process 2

OS

process 5

process 2

OS

process 5

process 9

process 2

process 9

process 10

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Contiguous Memory Allocation:Dynamic Contiguous Partitions Placement algorithms: first-fit, best-fit, worst-fit. Placement algorithms: first-fit, best-fit, worst-fit.

First-fitFirst-fit: Allocate the : Allocate the firstfirst hole that is big enough. hole that is big enough. Best-fitBest-fit: Allocate the : Allocate the smallestsmallest hole that is big hole that is big

enough; must search entire list, unless ordered by enough; must search entire list, unless ordered by size. Produces the smallest leftover hole.size. Produces the smallest leftover hole.

Worst-fitWorst-fit: Allocate the : Allocate the largestlargest hole; must also hole; must also search entire list. Produces the largest leftover hole.search entire list. Produces the largest leftover hole.

Replacement algorithms: Replacement algorithms: LRU, LRU, FIFO, FIFO, and etc. and etc.

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Contiguous Memory Allocation: Dynamic Contiguous Partitions Partitions are created dynamically, so that each process Partitions are created dynamically, so that each process

is loaded into a partition of exactly the same size as that is loaded into a partition of exactly the same size as that process. process.

Dynamic Partitioning Dynamic Partitioning Strengths: Strengths:

no internal fragmentation; no internal fragmentation; more efficient use of main memory. more efficient use of main memory.

Weaknesses: Weaknesses: external fragmentation; (internal fragmentation);external fragmentation; (internal fragmentation);Compaction.Compaction.

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Contiguous Memory Allocation: Fragmentation

External FragmentationExternal Fragmentation – total memory space exists to – total memory space exists to satisfy a request, but it is not contiguous.satisfy a request, but it is not contiguous.

Internal FragmentationInternal Fragmentation – allocated memory may be – allocated memory may be slightly larger than requested memory; this size difference is slightly larger than requested memory; this size difference is memory internal to a partition, but not being used.memory internal to a partition, but not being used.

Reduce external fragmentation by compactionReduce external fragmentation by compaction Shuffle memory contents to place all free memory Shuffle memory contents to place all free memory

together in one large block.together in one large block. Compaction is possible Compaction is possible onlyonly if relocation is dynamic, and if relocation is dynamic, and

is done at execution time.is done at execution time. I/O problem: batch job in memory while it is involved in I/O problem: batch job in memory while it is involved in

I/O. Do I/O only into OS buffers.I/O. Do I/O only into OS buffers.

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Contiguous Memory Allocation: Buddy System

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Contiguous Memory Allocation: Buddy System

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Contiguous Memory Allocation: Buddy System

Easy to partition Easy to partition Easy to combineEasy to combine The buddy system is used for Linux kernel The buddy system is used for Linux kernel

memory allocation. memory allocation.

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PAGING ( 分页 )

Contiguous memory allocation Contiguous memory allocation External fragmentationExternal fragmentation Noncontiguous memory allocation Noncontiguous memory allocation no external no external

fragmentation. fragmentation. Paging: Paging:

to divide the process into equal sized pages. to divide the process into equal sized pages.

(physical division)(physical division) Segmentation: Segmentation:

to divide the process into non-equal sized. to divide the process into non-equal sized.

(logical division)(logical division) Paging + segmentationPaging + segmentation

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Paging PagingPaging

Divide physical memory into fixed-sized blocks called Divide physical memory into fixed-sized blocks called frames(frames(帧帧 ))..

Divide logical memory into fixed-sized blocks called Divide logical memory into fixed-sized blocks called pagespages(页)(页) . And page size is equal to frame size. . And page size is equal to frame size.

Divide the backing store into blocks of same size calleDivide the backing store into blocks of same size called d clustersclusters (块、簇)(块、簇)

To run a program of size To run a program of size nn pages, pages, to find to find nn free frames free frames to load program.to load program.

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PagingHow to translate logical address to physical addressHow to translate logical address to physical address Logical address (page numberLogical address (page number 页码页码 , page offset, page offset 页偏移页偏移 ) )

Page numberPage number (p)(p) – used as an index into a – used as an index into a pagepage tabletable which contains base address of each page in physical which contains base address of each page in physical memory.memory.

Page offsetPage offset (d)(d) – combined with base address to define – combined with base address to define the physical memory address that is sent to the memorthe physical memory address that is sent to the memory unit.y unit.

Page table Page table (页表)(页表) (The page table contains the base a(The page table contains the base address of each page in physical memory)ddress of each page in physical memory)

Physical address (frame numberPhysical address (frame number 帧码帧码 , page offset, page offset 页偏页偏移移 ))

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Paging

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Paging

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Paging: Page size

How to partition logical addresses?How to partition logical addresses? The page size is selected as a power of 2.The page size is selected as a power of 2. mm bit logical address bit logical address

= = m-nm-n bit page size bit page size

+ + nn bit page offset bit page offset Possible page sizes:Possible page sizes:

512B 512B 16MB 16MB

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Paging: Page size

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Paging: Page size

Logical address 0 Logical address 0 (5x4)+0 physical address (5x4)+0 physical address Logical address 1 Logical address 1 (5x4)+1 physical address (5x4)+1 physical address Logical address 2 Logical address 2 (5x4)+2 physical address (5x4)+2 physical address Logical address 3 Logical address 3 (5x4)+3 physical address (5x4)+3 physical address Logical address 4 Logical address 4 (6x4)+0 physical address (6x4)+0 physical address Logical address 5 Logical address 5 (6x4)+1 physical address (6x4)+1 physical address

Logical address 13 Logical address 13 (2x4)+2 physical address (2x4)+2 physical address

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Paging: Page size

How to select page sizes?How to select page sizes? Page table sizePage table size Internal fragmentationInternal fragmentation Disk I/ODisk I/O

Generally page sizes have grown over time as Generally page sizes have grown over time as processes, data, and main memory have become processes, data, and main memory have become larger.larger.

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Paging : The OS Concern

What should the OS do?What should the OS do? Which frames are allocated?Which frames are allocated? Which frames are available?Which frames are available? How to allocate frames for a newly arrived process?How to allocate frames for a newly arrived process?

Placement algorithm (Placement algorithm ( 放置算法放置算法 ))Replacement algorithms Replacement algorithms (替换算法)(替换算法)

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Paging : The OS Concern

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Paging: Implementation of Page Table

How to implement the page tableHow to implement the page table Small, fast registersSmall, fast registers Main memory Main memory Main memory + Translation look-aside buffMain memory + Translation look-aside buff

er (er ( 联想存储器联想存储器 ))

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Paging: Implementation of Page Table

Page table is kept in main memory.Page table is kept in main memory. Page-tablePage-table base register (base register (PTBR) points to the page PTBR) points to the page

table.table. In this scheme every data/instruction access requires In this scheme every data/instruction access requires

two memory accesses. two memory accesses. One for the page table and One for the page table and one for the data/instruction.one for the data/instruction.

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Paging: Implementation of Page Table

Page-table length registerPage-table length register (PRLR) indicates size of th (PRLR) indicates size of the page table.e page table.

The two memory access problem can be solved by the The two memory access problem can be solved by the use of a special fast-lookup hardware cache called use of a special fast-lookup hardware cache called assassociative memoryociative memory or or translation look-aside bufferstranslation look-aside buffers (TL(TLBs)Bs) Associative memory – parallel searchAssociative memory – parallel search

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Paging: Implementation of Page Table : Paging Hardware With TLB

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Paging: Implementation of Page Table : Paging Hardware With TLB

Effective Access Time (EAT)Effective Access Time (EAT)

hit ratio = 0.8hit ratio = 0.8

EAT = 0.80*120 + 0.20*220 = 140 nsEAT = 0.80*120 + 0.20*220 = 140 ns

hit ratio = 0.98hit ratio = 0.98

EAT = 0.98*120 + 0.02*220 = 122 nsEAT = 0.98*120 + 0.02*220 = 122 ns

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Paging: Memory Protection

Memory protection implemented by associating Memory protection implemented by associating protection bit with each frame.protection bit with each frame. Read-write or read-onlyRead-write or read-only Read-write or read-only or executed only or what Read-write or read-only or executed only or what

everever Valid-invalidValid-invalid bit attached to each entry in the page bit attached to each entry in the page

table:table: ““valid”valid” indicates that the associated page is in the indicates that the associated page is in the

process’ logical address space, and is thus a legal process’ logical address space, and is thus a legal page.page.

““invalid”invalid” indicates that the page is not in the indicates that the page is not in the process’ logical address space.process’ logical address space.

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Paging: Memory Protection :Valid (v) or Invalid (i) Bit In A Page TableA system: 14bit address space(0-16383), A process: uses only address of (0-10468)

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Paging: Page Table Structure

The page table can be larger:The page table can be larger:

For a 32 bit CPU: For a 32 bit CPU:

4k page => 2^32/2^12=1M Words = 4M B4k page => 2^32/2^12=1M Words = 4M B

The solution: The solution: Hierarchical PagingHierarchical Paging Hashed Page TablesHashed Page Tables Inverted Page TablesInverted Page Tables

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Paging: Page Table Structure : Hierarchical Page Tables

Break up the logical address space into Break up the logical address space into multiple page tables.multiple page tables.

A simple technique is a two-level page table.A simple technique is a two-level page table.

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Paging: Page Table Structure : Hierarchical Page Tables A logical address (on 32-bit machine with 4K A logical address (on 32-bit machine with 4K

page size) is divided into:page size) is divided into: a page number consisting of 20 bits.a page number consisting of 20 bits. a page offset consisting of 12 bits.a page offset consisting of 12 bits.

Since the page table is paged, the page number Since the page table is paged, the page number is further divided into:is further divided into: a 10-bit page number. a 10-bit page number. a 10-bit page offset.a 10-bit page offset.

Linux uses three-level paging.Linux uses three-level paging.

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Paging: Page Table Structure : Hierarchical Page Tables

Address-translation scheme for a two-level 32-bit paging architecture (Intel Pentium2)

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Paging: Page Table Structure : Hierarchical Page Tables

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Paging: Page Table Structure : Hashed Page Tables

Common in address spaces > 32 bits.Common in address spaces > 32 bits. For 64 bits, For 64 bits,

paged paged … paged tables => intolerable and paged paged … paged tables => intolerable and prohibitiveprohibitive

How to quickly find the pair given a key How to quickly find the pair given a key binary searching or hashingbinary searching or hashing

The virtual page number is hashed into a page table. This The virtual page number is hashed into a page table. This page table contains a chain of elements hashing to the page table contains a chain of elements hashing to the same location.same location.

Virtual page numbers are compared in this chain Virtual page numbers are compared in this chain searching for a match. If a match is found, the searching for a match. If a match is found, the corresponding physical frame is extracted.corresponding physical frame is extracted.

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Paging: Page Table Structure : Hashed Page Tables

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Paging: Page Table Structure : Inverted Page Tables

For an OS, many processes For an OS, many processes many page tables many page tables much overhead much overhead why not keep one big page table? why not keep one big page table?

The inverted page tableThe inverted page table One entry for each real page of memory.One entry for each real page of memory. Entry consists of the virtual address of the page stored Entry consists of the virtual address of the page stored

in that real memory location, with information about in that real memory location, with information about the process that owns that page.the process that owns that page.

Use hash table to limit the search to one — or at most Use hash table to limit the search to one — or at most a few — page-table entries. Decreases memory a few — page-table entries. Decreases memory needed to store each page table, but increases time needed to store each page table, but increases time needed to search the table when a page reference needed to search the table when a page reference occurs.occurs.

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Paging: Page Table Structure : Inverted Page Tables

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Paging: Shared Pages In a time-sharing environment, In a time-sharing environment,

4040 users execute a text editor. One text editor users execute a text editor. One text editor process consists process consists 150KB150KB code and code and 50 KB50 KB data. data.

Without sharingWithout sharing

(150KB + 50KB)*40 = 200KB * 40 = 8000KB(150KB + 50KB)*40 = 200KB * 40 = 8000KB With sharingWith sharing

50KB*40 + 150KB = 2000KB + 150KB = 50KB*40 + 150KB = 2000KB + 150KB = 2150KB2150KB

Some other heavily used programs can also be shared Some other heavily used programs can also be shared – compilers, window systems, run-time libraries, – compilers, window systems, run-time libraries, database systems, and so on. database systems, and so on.

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Paging: Shared Pages

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Paging: Shared Pages What can be sharedWhat can be shared

Reentrant code (pure code)Reentrant code (pure code)If the code is reentrant, then it never changes If the code is reentrant, then it never changes

during execution. during execution. Two or more processes can Two or more processes can execute the same code at the same time. execute the same code at the same time.

Read-only dataRead-only data What can not be sharedWhat can not be shared

Each process has its own copy of registers and data Each process has its own copy of registers and data storage to hold the data for the process’s storage to hold the data for the process’s execution. execution.

The OS should provides facility to enforce some The OS should provides facility to enforce some necessary property for sharing. necessary property for sharing.

Paging has numerous other benefits as well. Paging has numerous other benefits as well.

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SEGMENTATION Paging Paging

Mapping to allow differentiation between logical Mapping to allow differentiation between logical memory and physical memory.memory and physical memory.

Separation of the user’s view of memory and the Separation of the user’s view of memory and the actual physical memory.actual physical memory.

Chopping a process into equally-sized pieces.Chopping a process into equally-sized pieces.

Any scheme for dividing a process into a collection Any scheme for dividing a process into a collection of semantic units?of semantic units?

(syntactic, semantic)(syntactic, semantic)

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Segmentation What is the user’s view of program?What is the user’s view of program?

A program is a collection of segments. A program is a collection of segments. Procedural style, module style, object-based style, Procedural style, module style, object-based style,

object-oriented style, logical style, functional style.object-oriented style, logical style, functional style. OO Style: OO Style:

Classes (states and behavior), derived classes, Classes (states and behavior), derived classes, objects, objects, May have a main program May have a main program

Procedural style: A segment is a logical unit such as:Procedural style: A segment is a logical unit such as:main program, procedure, function, method,main program, procedure, function, method,object,local variables, global variables,object,local variables, global variables,common block, stack, symbol table, arrayscommon block, stack, symbol table, arrays

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Segmentation: User’s view of a program

A program has many segments.A program has many segments. Every segment has a name.Every segment has a name. Every segment is of variable length, its length is Every segment is of variable length, its length is

intrinsically defined by the purpose of the segment intrinsically defined by the purpose of the segment in the program. in the program.

Elements within a segment are identified by their Elements within a segment are identified by their offset from the beginning of the segment.offset from the beginning of the segment.

The order among the segments is insignificant The order among the segments is insignificant (different from pages).(different from pages).

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Segmentation: User’s View of a Program

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Segmentation: Logical View of Segmentation

A logical-address space is a collection of segmentsA logical-address space is a collection of segments Each segment has a name and a length. Each segment has a name and a length. The address specifies both the segment name and the The address specifies both the segment name and the

offset within the segment. offset within the segment. In implementation, the address specifies both the In implementation, the address specifies both the

segment numbersegment number and the offset within the segment. and the offset within the segment. X86: CS, DS, etc. X86: CS, DS, etc.

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Segmentation: Logical View of Segmentation

1

3

2

4

1

4

2

3

user space physical memory space

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Segmentation: Logical View of Segmentation How to segment How to segment

By programmerBy programmer By compilerBy compiler

A Pascal compiler might create separate segments for the A Pascal compiler might create separate segments for the followingfollowing The global variables;The global variables; The procedure call stack, to store parameters and The procedure call stack, to store parameters and

return addresses;return addresses; The code portion of each procedure or function;The code portion of each procedure or function; The local variables of each procedure or function.The local variables of each procedure or function.

A Fortran compiler might create a separate segment for A Fortran compiler might create a separate segment for each common block. Arrays might be assigned separate each common block. Arrays might be assigned separate segments.segments.

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Segmentation: Hardware How to map logical addresses <segment-number, How to map logical addresses <segment-number,

offset> to physical address?offset> to physical address? Each entry of the segment table has a segment base Each entry of the segment table has a segment base

and a segment limit; each table entry has:and a segment limit; each table entry has: base – contains the starting physical address where base – contains the starting physical address where

the segments reside in memory.the segments reside in memory. limitlimit – specifies the length of the segment. – specifies the length of the segment.

Two special registersTwo special registers Segment-table base register (STBR)Segment-table base register (STBR) points to the points to the

segment table’s location in memory.segment table’s location in memory. Segment-table length register (STLR)Segment-table length register (STLR) indicates indicates

number of segments used by a program.number of segments used by a program.

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Segmentation: Hardware A local address consists of two parts: a segment A local address consists of two parts: a segment

number number ss, and an offset , and an offset dd.. The segment number The segment number ss is used as an index into the is used as an index into the

segment table. segment table. To check segment number To check segment number ss is legal if is legal if s < STLRs < STLR.. To get both the base and limit values for the To get both the base and limit values for the

segment.segment. The offset The offset dd must be between must be between 00 and the segment limit and the segment limit

If invalid, illegal memory access.If invalid, illegal memory access. If valid, If valid, base + dbase + d physical address. physical address.

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Segmentation: Hardware

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Segmentation: Hardware

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Segmentation: Hardware A process has 5 segments numbered from 0 through 4A process has 5 segments numbered from 0 through 4 For the logical space, segment table, physical For the logical space, segment table, physical

memory layout, see the previous slide. memory layout, see the previous slide. Address mappingAddress mapping

Segment 1 Byte 1222 => invalidSegment 1 Byte 1222 => invalid Segment 2 Byte 400 => 4300+53Segment 2 Byte 400 => 4300+53 Segment 3 Byte 852 => 3200+852Segment 3 Byte 852 => 3200+852

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Segmentation: Protection of Segments Easy to protect the whole segmentsEasy to protect the whole segments

To protect the executable codeTo protect the executable code To protect the read-only dataTo protect the read-only data To auto-check array indexes if the array is put in To auto-check array indexes if the array is put in

its own segmentits own segment

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Segmentation: Sharing of Segments

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Segmentation: Sharing of Segments The problem with sharing segmentsThe problem with sharing segments

Logical address: (segment number + offset)Logical address: (segment number + offset)The shared segment maybe use (segment The shared segment maybe use (segment

number +offset) to reference to its own address. number +offset) to reference to its own address. The shared segment should have one single The shared segment should have one single

segment number.segment number.• Could be a problemCould be a problem

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SEGMENTATION + PAGING Paging or segmentation?Paging or segmentation? In the old days, In the old days,

Motorola 68000 used paging.Motorola 68000 used paging. Intel 80x86 used segmentation.Intel 80x86 used segmentation.

Now Now both combines paging and segmentationboth combines paging and segmentation

The OS for I386 The OS for I386 OS/2 from IBMOS/2 from IBM NT from MSNT from MS

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Segmentation + Paging: Intel 386 The logical address space of a process (16KB segment descrThe logical address space of a process (16KB segment descr

iptor table) is divided into two partitions. iptor table) is divided into two partitions. Information about the first partition (8KB segment descriptoInformation about the first partition (8KB segment descripto

r table) is in LDT.r table) is in LDT. Information about the second partition (8KB segment descriInformation about the second partition (8KB segment descri

ptor table) is in GDT.ptor table) is in GDT. Every entry in LDT or GDT consists of 8 bytes, with detaileEvery entry in LDT or GDT consists of 8 bytes, with detaile

d information about a particular segment including the base d information about a particular segment including the base location and length of that segment. location and length of that segment.

The machine has 6 segment registers, allowing 6 segments tThe machine has 6 segment registers, allowing 6 segments to be addressed at any one time by a process.o be addressed at any one time by a process.

The machine has 8-byte microprogram registers to hold the The machine has 8-byte microprogram registers to hold the corresponding descriptors from either the LDT or GDT. corresponding descriptors from either the LDT or GDT.

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Segmentation + Paging: Intel 386 I386I386

Logical addresses Logical addresses Linear addresses Linear addresses Physical addressesPhysical addresses

Logical addresses Logical addresses Linear addresses Linear addresses Segment + offsetSegment + offsetSegment (16bits)Segment (16bits)

• How to segment registers?How to segment registers?–Shifting leftShifting left–Shifting rightShifting right

Segment base + offset Segment base + offset linear addresses linear addresses

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Segmentation + Paging: Intel 386 I386I386

Linear addresses Linear addresses Physical addresses Physical addresses One level paging?One level paging?

• 2^32/2^12 = 2^20 entries2^32/2^12 = 2^20 entries

• 2^20 * 4 = 4MB 2^20 * 4 = 4MB Two level pagingTwo level paging

• 10 bit for page directory10 bit for page directory

• 10 bit for page page entry10 bit for page page entry

• 12 bit for page offset. 12 bit for page offset.

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Segmentation + Paging: Intel 386

Address-translation scheme for a two-level 32-bit paging architecture is similar to the following diagram.

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Segmentation + Paging: Intel 386

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Linux MMtask_struct (include/linux/sched.h)task_struct (include/linux/sched.h)

mm_struct (include/linux/sched.h)mm_struct (include/linux/sched.h)

vm_area_struct (include/linux/mm.h)vm_area_struct (include/linux/mm.h)

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Homework 9.99.9 9.109.10 9.119.11 9.129.12 9.169.16

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