chapter three–80x86 micropocessor principles of microcomputers 2015年9月19日 2015年9月19日...

2023年4月19日星期三 1

Chapter Three–80x86 Micropocessor Principles of Microcomputers

Chapter Three

80x86 Microprocessor

80x86 微处理器（ 4 ）



8086 Segment Registers• The 8086 has four special segment registers: cs, ds, es, and

ss. These stand for Code Segment, Data Segment, Extra Segment, and Stack Segment, respectively. These registers are all 16 bits wide. They deal with selecting blocks (segments) of main memory. A segment register (e.g., cs) points at the beginning of a segment in memory.(???)

• Segments of memory on the 8086 can be no larger than 65,536 bytes long. This infamous “64K segment limitation” has disturbed many a programmer. We’ll see some problems with this 64K limitation, and some solutions to those problems, later.



8086 Segment Registers• The cs register points at the segment containing the curre

ntly executing machine instructions. • The data segment register, ds, generally points at global va

riables for the program. • The extra segment register, es, is exactly that – an extra se

gment register. • The ss register points at the segment containing the 8086 st

ack. The stack is where the 8086 stores important machine state information, subroutine return addresses, procedure parameters, and local variables. In general, you do not modify the stack segment register because too many things in the system depend upon it.



8086 Segment Registers• Although it is theoretically possible to store

data in the segment registers, this is never a good idea. The segment registers have a very special purpose – pointing at accessible blocks of memory. Any attempt to use the registers for any other purpose may result in considerable grief.



8086 Special Purpose Registers• There are two special purpose registers on the 808

6 CPU: the instruction pointer (ip) and the flags register. You do not access these registers the same way you access the other 8086 registers. Instead, the CPU generally manipulates these registers directly.

• The ip register contains the address of the currently executing instruction. This is a 16 bit register which provides a pointer into the current code segment (16 bits lets you select any one of 65,536 different memory locations). We’ll come back to this register when we discuss the control transfer instructions later.



8086 Special Purpose Registers

• The flags register is unlike the other registers on the 8086. The other registers hold eight or 16 bit values. The flags register is simply an collection of one bit values which help determine the current state of the processor. Although the flags register is 16 bits wide, the 8086 uses only nine of those bits. Of these flags, four flags you use all the time: zero, carry, sign, and overflow. These flags are the 8086 condition.


Chapter Three–80x86 Micropocessor Principles of MicrocomputersEEE/CSE 226

SegmentRegisters

CODE

STACK

DATA

EXTRA

MEMORY

Address 0H

0FFFFFH

64K DataSegment

64K Code Segment

Segments are < or = 64K,can overlap, start at an addressthat ends in 0H.

CS:0

I-14

Segment Starting address is segment

register value shifted 4 places to the left.



CODE

DATA

STACK

EXTRA

0100H

0B200H

0CF00H

0FF00H

DS:

SS:

ES:

CS:

01000H

0B2000H

0CF000H

0FF000H

10FFFH

0C1FFFH

0DEFFFH

0FFFFFH

0HSegment Registers

Memory Segments

Segments are < or = 64K and can overlap.

8086 Memory Terminology

I-15Note that the Code segment is < 64K since 0FFFFFH is the highest address.



The Code Segment

Memory

Segment Register

Offset

Physical orAbsolute Address

0

+

CS:

IP

0400H

0056H

4000H

4056H

0400

0056

04056H

The offset is the distance in bytes from the start of the segment.The offset is given by the IP for the Code Segment.Instructions are always fetched with using the CS register.

I-16

CS:IP = 400:56Logical Address

0H

0FFFFFH

The physical address is also called the absolute address.

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The Stack Segment

Memory

Segment Register

Offset

Physical Address

+

SS:

SP

0A00

0100

0A000H

0A100H

0A00 0

0100

0A100H

The stack is always referenced with respect to the stack segment register.The stack grows toward decreasing memory locations.The SP points to the last or top item on the stack.

PUSH - pre-decrement the SPPOP - post-increment the SP

The offset is given by the SP register.

I-17

SS:SP

0H

0FFFFFH

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The Data Segment

Memory

Segment Register

Offset

Physical Address

+

DS:

EA

05C0

0050

05C00H

05C50H

05C0 0

0050

05C50H

Data is usually fetched with respect to the DS register.The effective address (EA) is the offset.The EA depends on the addressing mode.

I-18

DS:EA

0H

0FFFFFH

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控制寄存器

IP(Instruction Pointer)——IP(Instruction Pointer)—— 指令指针寄存器。指令指针寄存器。用来存放下

一条要读取的指令在代码段内的偏移地址。用户程序不能直接

访问 IP 。

FLAGS——FLAGS—— 标志寄存器。标志寄存器。它是一个 16 位的寄存器，但只

用了其中 9 位，这 9 位包括 6 个状态标志位， 3 个控制标志位

，如图 3.5 所示。

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图 3.5 8086/8088 的标志寄存器

OF

15 11

DF

10

IF

9

TF

8

SF

7

ZF

6

AF

4

PF

2

CF

0

¿ØÖÆ±êÖ¾Î»£ºTF¡¢IF¡¢DF×´Ì¬±êÖ¾Î»£ºCF¡¢PF¡¢AF¡¢ZF¡¢SF¡¢OF

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1. 1. 状态标志位（状态标志位（ 66 位）位）

状态标志位用来反映算术和逻辑运算结果的一些特征。下面分别介绍这 6 个状态标志位的功能。

CF(Carry Flag)——CF(Carry Flag)—— 进位标志。进位标志。当进行加减运算时，若最高位发生进位或借位则 CF 为 1 ，否则为 0 。通常用于判断无符号数运算结果是否超出了计算机所能表示的无符号数的范围。

PF(Parity Flag)——PF(Parity Flag)—— 奇偶标志位。奇偶标志位。当指令执行结果的低 8

位中含有偶数个 1 时， PF 为 1 ，否则为 0 。

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AF(Auxiliary Flag)——AF(Auxiliary Flag)—— 辅助进位标志位。辅助进位标志位。当执行一条加法或减法运算指令时，若结果的低字节的低 4 位向高 4 位有进位或借位，则 AF 为 1 ，否则为 0 。

ZF(Zero Flag)——ZF(Zero Flag)—— 零标志位。零标志位。若当前的运算结果为 0 ，则 Z

F 为 1 ，否则为 0 。

SF(Sign Flag)——SF(Sign Flag)—— 符号标志位。符号标志位。当运算结果的最高位为 1 时， SF=1 ，否则为 0 。

OF(Overflow Flag)——OF(Overflow Flag)—— 溢出标志位。溢出标志位。当运算结果超出了带符号数所能表示的数值范围，即溢出时， OF=1 ，否则为 0 。用来判断带符号数运算结果是否溢出。

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0101 0100 0011 1001

+ 0100 0101 0110 1010

1001 1001 1010 0011

最高位 = 1 SF=1低 8 位中偶数为 4 个 PF=1运算结果不为 0 ZF=0低 4 位向前有进位 AF=1最高位向前没有进位 CF=0次高位向前有进位 Cs=0 ， Cp=1 ， OF=Cs Cp=1

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

O D I T S Z A P C

+1 01011

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例 3.1 设变量 x=11101111B ， y=11001000B ， X=010110

1000001010B ， Y=01001100 10100011B ，请问分别执行 x+y 和X+Y 操作后标志寄存器中各状态位的状态如何？

11101111

+) 11001000

10110111

1自动丢失

0101101000001010

0100110010100011

1010011010101101

CF=0CF=1

DF=1 DF=1

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状态位执行 x+y 后执行 X+Y 后

CF 最高位 D7 向前有进位， CF=1 最高位 D15 向前没有进位， CF=0

PF 低 8 位中 1 的个数为偶数 (6) ， PF=1 低 8 位中 1 的个数为奇数 (5) ， PF=0

AF 低 4 位向前有进位， AF=1 低 4 位向前没有进位， AF=0

ZF 计算结果不为 0 ， ZF=0 计算结果不为 0 ， ZF=0

SF 最高位 D7 为 1 ， SF=1 最高位 D15 为 1 ， SF=1

OF CFDF=0 ，没有溢出， OF=0 CFDF=1 ，结果溢出， OF=1

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2. 控制标志位（ 3 位位）——用来控制 CPU 的操作，由程序设置或清除。它们是： TF(Trap Flag)—— 跟踪（陷阱）标志位。是为测试程序的方便而设置。若将 TF 置 1 ， CPU 处于单步工作方式。 IF(Interrupt Flag)—— 中断允许标志位。是用来控制可屏蔽中断的控制标志位。若将 IF 置 1 ，表示允许 CPU 接受外部从 I

NTR 引脚上发来的可屏蔽中断请求；若用 CLI 指令将 IF 清 0 ，则禁止 CPU 接受可屏蔽中断请求信号。

DF(Direction Flag)—— 方向标志位。若将 DF 置 1 ，串操作按减地址方式进行，也就是说，从高地址开始，每操作一次地址自动递减；否则按增地址方式进行。

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注意注意有关寄存器，尤其是在存储器寻址时用来存放操有关寄存器，尤其是在存储器寻址时用来存放操作数在段内偏移地址的地址寄存器和标志寄存器中各作数在段内偏移地址的地址寄存器和标志寄存器中各控制标志位的使用方法，将在后续章节中涉及到时还控制标志位的使用方法，将在后续章节中涉及到时还将进一步详细介绍，请读者务必熟练掌握。将进一步详细介绍，请读者务必熟练掌握。

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8088CPU8088CPU 与与 8086CPU8086CPU 的异同的异同

二者内部结构基本相似，执行单元 EU 完全相同，其指令系统、寻址方式及程序设计方法都相同。区别仅在于总线接口单元 BIU ，归纳起来主要有以下几个方面的差异：

1 ．外部数据总线位数不同。 8086 外部数据总线 16 位， 8088

外部数据总线 8 位。

2 ．指令队列缓冲器大小不同。 8086 指令队列可容纳 6 个字节；而 8088 指令队列只能容纳 4 个字节。

3. 部分引脚的功能定义有所区别。

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Pinouts See Fig 7-2 in

textbook and Appendix A.

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The 8086 comes in a 40 pin package which means that some pins havemore than one use or are multiplexed. The packaging technology of timelimited the number of pin that could be used.

In particular, the address lines 0 - 15 are multiplexed with data lines 0-15,address lines 16-19 are multiplexed with status lines. These pins are

AD0 - AD15, A16/S3 - A19/S6

The 8088 does not have the upper 8 data lines so the pins are A8 - A15.

The 8086 has one other pin that is multiplexed and this is BHE’/S7. BHE stands for Byte High Enable. This is an active low signal that is asserted when there is data on the upper half of the data bus. There is no need for this signal on an 8088.

The 8086 has two modes of operation that changes the function of some pins.The SDK-86 uses the 8086 in the minimum mode with the MN/MX’ pin tied to5 volts. This is a simple single processor mode. The IBM PC uses an 8088 in the maximum mode with the MN/MX” pin tied to ground. This is the mode required for a coprocessor like the 8087.

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In the minimum mode the following pins are available.

HOLD When this pin is high, another master is requesting control of the local bus, e.g., a DMA controller.

HLDA HOLD Acknowledge: the 8086 signals that it is going to float the local bus.

WR’ Write: the processor is performing a write memory or I/O operation.

M/IO’ Memory or I/O operation.

DT/R’ Data Transmit or Receive.

DEN’ Data Enable: data is on the multiplexed address/data pins.

ALE Address Latch Enable: the address is on the address/data pins.This signal is used to capture the address in latches to establish the address bus.

INTA’ Interrupt acknowledge: acknowledges external interrupt requests.

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The following are pins are available in both minimum and maximum modes.

VCC + 5 volt power supply pin.

GND Ground

RD’ READ: the processor is performing a read memory or I/O operation.

READY Acknowledgement from wait-state logic that the data transfer will be completed.

RESET Stops processor and restarts execution from FFFF:0. Must be highfor 4 clocks. CS = 0FFFFH, IP = DS = SS = ES = Flags = 0000H, noother registers are affected.

TEST’ The WAIT instruction waits for this pin to go low. Used with 8087.

NMI Non Maskable Interrupt: transition from low to high causes aninterrupt. Used for emergencies such as power failure.

INTR Interrupt request: masked by the IF bit in FLAG register.

CLK Clock: 33% duty cycle, i.e., high 1/3 the time.

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Timing

Figure 7-1(b) of Textbook

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第 3 章中文作业中文教材 :

P84

1

2

3

9

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第 3 章英文作业1. Convert the following logical addresses to physical addresses. Assume all v

alues are hexadecimal: a) 1000:1000 b) 1234:5678 c) 0:1000 d) 100:9000 e) FF00:1000 f) 800:8000 g) 8000:800 h) 234:9843 i) 1111:FFFF j) FFFF:102. Besides memory addressing modes, what are the other two major addressi

ng modes on the 8086?3. Give an example for each of the following addressing modes: a) Register b) Immediate

c) Displacement only d) Register Indirect e) Based indexed f) Based indexed plus displacement

4. List all of the 8086 eight bit registers.5. List all the 8086 general purpose 16 bit registers, and describe the “special

purposes” of each of the general purpose registers.6. List all the 8086 segment registers.

chapter three–80x86 micropocessor principles of microcomputers 2015年9月19日 2015年9月19日...

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