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TRANSCRIPT
Dow.com
CircupositTM 6500 process: Next Generation Horizontal Electroless Copper Process with Ionic Catalyst System for ELIC and IC Substrate Application
新一代水平化铜工艺的应用
Contents
1. Market Outlook
2. ELIC and IC substrate PCB Technology Requirement
3. Introduction of CircupositTM 6500 process
4. Bath Stability of CP6530 & CP6550
5. Plating performance
6. Copper grain structure and boundary study
7. CircupositTM 6500 performance of IC substrate PCB
8. Highlights
9. Q & A
2
Market Outlook
Global PCB market trend towards advanced technology boards with excellent reliability requirement (High-density-interconnect(HDI), Integrated Circuit packaging substrate(IC substrate), Flex and Rigid Flex).
3
Global PCB Product Mix, YR 2000 (L) vs YR 2014 (R) (Source: Prismark)
Multi-layer
boards45%
HDI17%
IC PKG15%
Flex/RF23%
Multi-layer
boards77%
HDI5%
IC PKG8%
Flex/RF10%
Technology Requirements
High Density Interconnect (HDI) is a technology of using small form factor in complex electronic circuit designs. Everylayer interconnection(ELIC) is a compact design using viafill technology. High reliability and excellent coverage is needed.
4
Vias: ~75-100um dia
Through holes: ~100-300um dia
SEM Photo of Via:
Important reliability
of this electroless
copper layer
https://www.protoexpress.com/hdi/hdi-for-semiconductor
www.apple.com.hk , www.samsung.com.hk
www.ifixit.com
https://en.wikipedia.org/wiki/HDI
Modified Semi Additive Process (MSAP)半加成法
55
A modified SAP process, also referred to as Advanced-Pattern Process, is often used in HDI fabrication. In this case, a laminate coated with a thin copper foil is used for the starting material, rather than a bare dielectric.*
*Quoted from: Next Generation Electroplating Technology for High Planarity, Minimum Surface Deposition Microvia
Filling , Dow Electronic Materials, The Dow Chemical Company
IC Substrate PCB Application
MSAP introduces to IC substrate PCB application for achieving line/space lower than 40/40um. In Electroless Copper, extra requirements in:-
6
High Electroless Copper Thickness in Via Bottom
- >200nm-300nm in Via Bottom
Compatible to patterning steps in MSAP process
7
• Customer std processDesmear
• CIRCUPOSITTM 3323A or 233
Conditioner
•NaPS microetchMicroetch
• CIRCUPOSITTM 6520 Predip
Predip
• CIRCUPOSITTM 6530 Catalyst
Catalyst
• CIRCUPOSITTM 6540 Reducer
Reducer
• CIRCUPOSITTM 6550 Electroless Copper
Els Cu
Key Chemicals Control Parameters
CIRCUPOSITTM 6530 Catalyst
Pd: 200 ppm; pH 9.0 – 9.5
CIRCUPOSITTM 6550 Electroless Copper
1) Cu 2.5 g/L2) Rochelle salt3) NaOH4) HCHO5) Stabilizer 6) SG =1.04-1.09
Introduction of Dow Ionic Catalyst Process - CircupositTM 6500 Process
Bath Stability of Circuposit 6530 Ionic Catalyst Bath
&Circuposit 6550 Electroless Copper Bath
8
Bath Life of Circuposit 6530 Ionic Catalyst Bath
9
Long Catalyst Bath Life - Greater than 1 Month
Catalyst Items Starting Aging 22h Aging 44h Aging 68h Aging 192h
DowTurbidity /NTU 0.2 2.9 4.9 7.1 9.8
[Pd] /ppm 198 198 204 200 210
CompetitionTurbidity /NTU 0.4 4.0 10.0 17.1 47.0
[Pd] /ppm 197 206 196 201 195
0
50
100
150
200
250
0
15
30
45
60
75
0 22 44 68 192
Turb
idit
y (N
TU)
Aging time (hr)
Catalyst stability comparison
Turbidity _Dow
Turbidity_Comp
[Pd] _Dow
[Pd]_Comp
[Pd]
(pp
m)
Aging condition: 40 oC heating with strong agitation.
10
Stability test of CP6530 Ionic Catalyst Bath
Stability Test of Circuposit 6530 Ionic Catalyst Bath
11
Competitor DOW
Status Starting.After 192
hours (8 days)
Starting.After 192
hours (8 days)
Filter paper
This test showed higher stability of catalyst will have less sludge contain in catalyst bath. This will have less catalyst consume in filter chamber and lower risk for the sludge stick on the panels.
Competition CP6530
After 192 hours (8 days)
Catalyst Filter in filter chamber.
Electroless Copper Bath life
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Stable tartrate-based e’less Cu bath.No plate out after 1 week production (SG=1.090)
Plate Out of generic tartrate
High Stability of CP 6550
Simulated Stability Test43 ˚C Bath Temperature without air agitationKeep 48hr without any plate out for CP6550
Piping in sump tank
Filter Chamber
Plating Performances
13
ICDNo break between
innerlayer, e’less and EP Cu
HCT Pin-PullNo break between via pad
and e’less Cu
Peel Strength
Backlight CoverageDegree of e’less Cu
coverage in through-hole and via
Electroless Plated Coupons
Electrolytic Plated Coupons
Electroplating
Mode
1
Mode
2Mode 3
No break between via pad and e’less Cu
MorphologySmoothness of the e’less Cu deposit
SubstrateCu film
Adhesion of plated Cufilm to the smooth substrate surface
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Plating Performance Evaluation
Plating Coverage In Different Kinds of Laminates
15
IT158 IT180 370HR TUC662 NPGN S1141
Excellent coverage on glass and resin
Backlight Performances in One Month Catalyst Bath Life
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Backlight grading are larger than >4.5, out of 5 throughout Catalyst Bath life
PinPull Test (盲孔底拉斷測試)
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PTH & 25um EP Cu
• 125 ˚C for 6 hoursBake
• ɸ3mm2 tape mask
• 12min fresh 10% H2SO4 + 3.5 % H2O2
Etch
• 125 ̊C for 2 hoursBake
• 5X 10s float @ 288 ̊CSolder Float
• Using tensile elongation tester to pull the pin
Pin Pull
Mid-Via break
Interface break
Pad break
Source from Reliability Test Methods for Copper Plated Filled Microvia by Motorola
Pass PassFail
PinPull Test (盲孔底拉斷測試)
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Pin-pull monitoring result
Pinpull test has 100% pass rate
High Current Test (HCT) Result (高電流測試)
19
Circuit break time requirement is >60 seconds.
Testing Criteria:
• First 30 sec., Temp.≧140 C;
• Next 30 sec., 180 C ≦Temp.≦ 240 C
Applying constant current: 2.3A, 11V max.
(Current may be changed depending on the design of a coupon)
High Current Test (HCT) Result (高電流測試)
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HCT tests are passed.
Day of Catalyst HCT pass time
Day 03 >60 sec
Day 04 >60 sec
Day 13 >60 sec
Day 15 >60 sec
Day 30 >60 sec
Throwing Power of Electroless Copper (Through hole)
21
Throwing power of through holes is ~100%
210um320um
Throwing Power of Electroless Copper (Blind Via)
22
Throwing power of blind via is 70-80%. (Ni-free)
22
Thickness (nm) Left Right
Top 109 ± 16 111 ± 15
Middle 105 ± 13 105 ± 2
Bottom 99 ± 12 80 ± 10
Sampling area for thickness measurement
Ø 85 um42 um
Other HDI Reliability Tests
23
Reliability tests are all passed.
Test Requirements Result
HDI
Hot oil shock test(260 ̊C x 10 sec -> IPA dipping 20 ̊C x 10 sec)x10 cycles
All Pass1) No copper plating void2) No barrel and foil crack3) No separation on
through hole
Thermal shock cycle test(-55 ̊C x 15 min <-> 125 ̊C x 15 min) x 100 cycles
IR reflow test (240 peak x 5 cycles)
Copper grain structure and boundary study
24
Electroless Copper Grain Structure
25
Circuposit TM 6500
Overall Resin
Via Pad Morphology
Even coverage and good grain structure
Copper to Copper Grain Boundary
26
Interface Study by EBSD
27
Electroless
copper
interface
FIB/SEM Analysis of Copper to Copper Grain Boundary
28
No demarcation line observed.
CircupositTM 6500 Performance in IC substrate PCB
29
Morphology of Deposited Copper On IC Substrate PCB Blind Via
30
Smooth morphology in hole wall and via bottom
f 125 mm
42mm
Line Speed (eCu dwell time)
1.0m/min (8.7min)
0.8m/min(11min)
0.6m/min (14.5min)
Thickness (nm) Left Right Left Right Left Right
Top 550 ± 74 530 ± 30 740 ± 60 810 ± 112 910 ± 42 825 ± 90
Bottom 205 ± 16 221 ± 24 320 ± 40 221 ± 24 465 ± 146 389 ± 14
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Electroless Copper Bath containing Nickel (typically 150 - 200 ppm) was used
Via Bottom Electroless Copper Thickness
Other IC Substrate Board Reliability Tests
32
Reliability tests are all passed.
Test Requirements Result
IC Substrate
PCT test (121 ̊C x100%x2 atm) -> 96hrs Pass
Thermal shock cycle test(-55 ̊C x 15 min <-> 125 ̊C x 15 min ->500 cycles)
Pass
HAST test (85 ̊C x 85% -> 168 hrs) Pass
Highlights of CircupositTM 6500 Process
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High Performance in blind via reliability
- Strong interconnect of electroless copper between target pad and EP copperc
Excellent Coverage
- Excellent Coverage in different kinds of laminates
Cost Effective
– High stability of ionic palladium catalyst bath
Sustainable
– High stability of electroless copper by using EDTA free and Cyanide free chemistry
34
ThankYou