conversion analogique-numerique ΣΔhassan/ciman_16_12_09_part1.pdf · conversion...
TRANSCRIPT
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Circuits Circuits Integres Mixtes Analogique-NumeriqueIntegres Mixtes Analogique-Numerique
[email protected]@lip6.fr
http://www-asim.lip6.fr/~hassan/ciman.phphttp://www-asim.lip6.fr/~hassan/ciman.php
Conversion Conversion Analogique-Numerique Analogique-Numerique ΣΔΣΔ
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entrée analogique
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Bruit de Quantification
où
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Rapport Signal sur Bruit
!
OSR"2 # SNRdB + 3dB
# +0.5 bit of resolution
3
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+ H(z) ADC
DAC
Noise ShapingNoise Shaping
X(s)X(s) X(z)X(z) Y(z)Y(z)
•• The continuous-time analog signal, X(s), is sampled at the input to obtain a The continuous-time analog signal, X(s), is sampled at the input to obtain adiscrete-time signal, X(z).discrete-time signal, X(z).•• H(z) is a discrete-time analog filter, usually implemented in the switched H(z) is a discrete-time analog filter, usually implemented in the switchedcapacitors technique.capacitors technique.•• Y(z) is the discrete-time digital output signal. Y(z) is the discrete-time digital output signal.
Under certain conditions:Under certain conditions:•• The ADC can be modeled as a source of quantization noise. The ADC can be modeled as a source of quantization noise.•• Ideally, in a discrete-time system the DAC does not add error. Ideally, in a discrete-time system the DAC does not add error.
The ADC is put in a feedback loop with a filter H(z):The ADC is put in a feedback loop with a filter H(z):
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Linear Mathematical ModelLinear Mathematical Model
+ H(z)X(s)X(s) X(z)X(z) Y(z)Y(z)
+
E(z)E(z)
--++
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Y (z) = E(z)+H (z) X(z)"Y (z)[ ]
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1+H (z)[ ]Y (z) = E(z)+H (z)X(z)
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Y (z) =1
1+H (z)E(z)+
H (z)
1+H (z)X(z)
!
NTF(z) =Y (z)
E(z)=
1
1+H (z)Noise Transfer Function:Noise Transfer Function:
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STF(z) =Y (z)
X(z)=
H (z)
1+H (z)Signal Transfer Function:Signal Transfer Function:
ffss=1/T=1/T
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1st order 1st order ΣΔΣΔ Modulator Modulator
+X(s)X(s) X(z)X(z) Y(z)Y(z)
+
E(z)E(z)
--++
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Y (z) =1
1+H (z)E(z)+
H (z)
1+H (z)X(z)
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y[n] = e[n]" e[n "1]+ x[n "1]Inverse z TransformInverse z Transform
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z"1
1" z"1
ffss=1/T=1/T
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H (z) =z"1
1" z"1
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Y (z) = (1" z"1)E(z)+ z
"1X(z)
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Y (z) = E(z) " z"1E(z) + z
"1X(z)
Quantization errorQuantization error
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q[n] = e[n]" e[n "1]
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if fin = 0 " e[n] = e[n #1] " q[n] = 0
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as fin " # e[n] $ e[n %1] # q[n]"
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1st order 1st order ΣΔΣΔ Modulator Modulator
+X(s)X(s) X(z)X(z) Y(z)Y(z)
+
E(z)E(z)
--++
!
Y (z) =1
1+H (z)E(z)+
H (z)
1+H (z)X(z)
!
NTF(z) =Y (z)
E(z)=1" z
"1Noise Transfer Function:Noise Transfer Function:
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STF(z) =Y (z)
X(z)= z
"1Signal Transfer Function:Signal Transfer Function:
!
z"1
1" z"1
ffss=1/T=1/T
!
H (z) =z"1
1" z"1
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Y (z) = (1" z"1)E(z)+ z
"1X(z)
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1st order 1st order ΣΔΣΔ Noise Transfer Function Noise Transfer Function
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NTF(") =1# e# j"T
= 2 j e# j"
T
2ej"T
2 # e# j"
T
2
2 j
letlet
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z" ej#T
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NTF(z) =1" z"1
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Noise Power = E( f )2" NTF( f )
2
# fm
fm
$ df!
NTF(") = 2 j e# j"
T
2 sin "T
2
$
% &
'
( )
!
="2
12
# 2
3
2 fm
fs
$
% &
'
( )
3
!
="2
12 fs#
$ fm
fm
% 4sin2 &f
fs
'
( )
*
+ , df
!
="2
12
# 2
3
1
OSR3
!
In -Band
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NTF( f )2
= 4sin2 "
f
fs
#
$ %
&
' (
44
ffmm
!
fs /2
!
fs
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OSR"2 # SNRdB + 9dB
# +1.5 bit of resolution
!
fs
!
fs /2
!
NTF( f ) = 2sin "f
fs
#
$ %
&
' (
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Integrator Circuit Integrator Circuit
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H (s) =Vout(s)
Vin(s)=
"1
s RC
Continuous-Time IntegratorContinuous-Time Integrator
Continuous-Time and Discrete-Time ResistorContinuous-Time and Discrete-Time Resistor
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1st order 1st order ΣΔΣΔ using Switched Capacitors using Switched Capacitors
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2nd order 2nd order ΣΔΣΔ Modulator Modulator
+X(s)X(s) X(z)X(z) Y(z)Y(z)
+
E(z)E(z)
--++
!
NTF(z) =Y (z)
E(z)= 1" z"1( )
2
!
STF(z) =Y (z)
X(z)= z
"1
Noise Transfer Function:Noise Transfer Function:
Signal Transfer Function:Signal Transfer Function:
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z"1
1" z"1
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Y (z) = (1" z"1)2E(z)+ z
"1X(z)
ffss=1/T=1/T
!
1
1" z"1 +--
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2nd order 2nd order ΣΔΣΔ Noise Transfer Function Noise Transfer Function
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Noise Power = E( f )2" NTF( f )
2
# fm
fm
$ df
!
="2
12
# 4
5
1
OSR5
!
In -Band
!
f / fs
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NTF( f ) = 4sin2 "
f
fs
#
$ %
&
' (
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OSR"2 # SNRdB +15dB
# +2.5 bits of resolution
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SNR of Ideal SNR of Ideal ΣΔ ΣΔ ModulatorsModulators
!
"2
12
# 2
3
1
OSR3
!
"2
12
# 4
5
1
OSR5
!
"2
12
1
OSR
!
"2
12
# 2n
2n+1
1
OSR2n+1
Conventional ADC:Conventional ADC:
1st Order 1st Order ΣΔΣΔ::
2nd Order 2nd Order ΣΔΣΔ::
nth Order nth Order ΣΔ ??ΣΔ ??
In-Band In-Band Noise Power:Noise Power:
Not Really !!Not Really !!
1-bit 1-bit ΣΔΣΔ
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SNR of Ideal SNR of Ideal ΣΔ ΣΔ ModulatorsModulators
!
"2
12
# 2
3
1
OSR3
!
"2
12
# 4
5
1
OSR5
!
"2
12
1
OSR
!
"2
12
# 2n
2n+1
1
OSR2n+1
Conventional ADC:Conventional ADC: 1st Order 1st Order ΣΔΣΔ:: 2nd Order 2nd Order ΣΔΣΔ::
nth Order nth Order ΣΔ ??ΣΔ ??
In-Band In-Band Noise Power:Noise Power:
Not Really !!Not Really !!
For a For a High High SNR:SNR:• Increase oversampling ratio, OSR ↑• Increase order of noise-shaping function, n ↑ • Increase number of bits in the quantizer, Δ ↓
Non-IdealitiesNon-Idealities::•• the sampling frequency is limited• n>2 => stability problems • # bits in the quantizer > 1 => Feedback DAC linearity problems
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DAC LinearityDAC Linearity
DigitalDigitalInputInput
AnalogAnalogOutputOutput
DigitalDigitalInputInput
AnalogAnalogOutputOutput
1-bit DAC1-bit DAC Multi-bit DACMulti-bit DAC
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Data Weighted AveragingData Weighted Averaging
Switched-Capacitors DAC:Switched-Capacitors DAC:
Current SourcesCurrent Sources DAC:DAC:ConventionalConventional DWADWA
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H. Aboushady University of Paris VI
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H. Aboushady University of Paris VI
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H. Aboushady University of Paris VI
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H. Aboushady University of Paris VI
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H. Aboushady University of Paris VIOSROSR
n=1
n=2
n=3n=4n=6n=8
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H. Aboushady University of Paris VI
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H. Aboushady University of Paris VI
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H. Aboushady University of Paris VI
n=1
n=2
n=3n=4n=6n=8
OSROSR