2017 Intel Corporation. All rights reserved. Intel and the Intel logo are trademarks of Intel Corporation or its subsidiaries in the U.S. and/or other countries. *Other names and brands may be claimed as the property of others. For more complete information about compiler optimizations, see our Optimization Notice.
2017 Intel Corporation. All rights reserved. Intel and the Intel logo are trademarks of Intel Corporation or its subsidiaries in the U.S. and/or other countries. *Other names and brands may be claimed as the property of others. For more complete information about compiler optimizations, see our Optimization Notice.
FPGA SDK for OpenCL FPGA
AE AE
https://software.intel.com/en-us/articles/optimization-notice#opt-enhttps://software.intel.com/en-us/articles/optimization-notice#opt-en
2017 Intel Corporation. All rights reserved. Intel and the Intel logo are trademarks of Intel Corporation or its subsidiaries in the U.S. and/or other countries. *Other names and brands may be claimed as the property of others. For more complete information about compiler optimizations, see our Optimization Notice.
2017 Intel Corporation. All rights reserved. Intel and the Intel logo are trademarks of Intel Corporation or its subsidiaries in the U.S. and/or other countries. *Other names and brands may be claimed as the property of others. For more complete information about compiler optimizations, see our Optimization Notice.
FPGA
https://software.intel.com/en-us/articles/optimization-notice#opt-enhttps://software.intel.com/en-us/articles/optimization-notice#opt-en
2017 Intel Corporation. All rights reserved. Intel and the Intel logo are trademarks of Intel Corporation or its subsidiaries in the U.S. and/or other countries. *Other names and brands may be claimed as the property of others. For more complete information about compiler optimizations, see our Optimization Notice.
FPGAs in the cloud
26 factor speed up for the Intel Xeon processor/Stratix V QPI with the faster interconnect. CERN, 4/14/17
Arria10 FPGA can achieve 5x improvement in the performance of LSTM accelerator card compared to GPU. JD.com, 4/26/17
Genomics Pipeline: BIGstack also includes optimizations for Intel FPGAs with early results showing a potential for more than 35x improvement in the PairHMM algorithmBroad Institute (MIT and Harvard), 5/24/17
Azures FPGA-based accelerated networking reduces inter-virtual machine latency by up to 10x while freeing CPUs for other tasks.Microsoft, Build Conference 2017, 5/8/17 ZTE has achieved a new record beyond a thousand images per
second in facial recognition with what is known as theoretical high accuracy achieved for its custom topology. Intels Arria 10 FPGA accelerated the raw design performance more than 10x while maintaining the accuracy. ZTE, 1/24/17
We see 2017 as the year of the FPGA in data centersOVH, Acceleration-as-a-Service Announcement, 3/14/17
At Alibaba Cloud, we offer customers access to a number of services in the cloud, and adding an FPGA-based acceleration offering means they can access that powerful computing without the cost or requirement of building out their own infrastructure. Alibaba Cloud, 3/11/17
https://software.intel.com/en-us/articles/optimization-notice#opt-en
2017 Intel Corporation. All rights reserved. Intel and the Intel logo are trademarks of Intel Corporation or its subsidiaries in the U.S. and/or other countries. *Other names and brands may be claimed as the property of others. For more complete information about compiler optimizations, see our Optimization Notice.
2017 Intel Corporation. All rights reserved. Intel and the Intel logo are trademarks of Intel Corporation or its subsidiaries in the U.S. and/or other countries. *Other names and brands may be claimed as the property of others. For more complete information about compiler optimizations, see our Optimization Notice.
FPGA
https://software.intel.com/en-us/articles/optimization-notice#opt-enhttps://software.intel.com/en-us/articles/optimization-notice#opt-en
2017 Intel Corporation. All rights reserved. Intel and the Intel logo are trademarks of Intel Corporation or its subsidiaries in the U.S. and/or other countries. *Other names and brands may be claimed as the property of others. For more complete information about compiler optimizations, see our Optimization Notice.
2017 Intel Corporation. All rights reserved. Intel and the Intel logo are trademarks of Intel Corporation or its subsidiaries in the U.S. and/or other countries. *Other names and brands may be claimed as the property of others. For more complete information about compiler optimizations, see our Optimization Notice.
FPGA
https://software.intel.com/en-us/articles/optimization-notice#opt-enhttps://software.intel.com/en-us/articles/optimization-notice#opt-en
2017 Intel Corporation. All rights reserved. Intel and the Intel logo are trademarks of Intel Corporation or its subsidiaries in the U.S. and/or other countries. *Other names and brands may be claimed as the property of others. For more complete information about compiler optimizations, see our Optimization Notice.
2017 Intel Corporation. All rights reserved. Intel and the Intel logo are trademarks of Intel Corporation or its subsidiaries in the U.S. and/or other countries. *Other names and brands may be claimed as the property of others. For more complete information about compiler optimizations, see our Optimization Notice.
FPGA
https://software.intel.com/en-us/articles/optimization-notice#opt-enhttps://software.intel.com/en-us/articles/optimization-notice#opt-en
2017 Intel Corporation. All rights reserved. Intel and the Intel logo are trademarks of Intel Corporation or its subsidiaries in the U.S. and/or other countries. *Other names and brands may be claimed as the property of others. For more complete information about compiler optimizations, see our Optimization Notice.
2017 Intel Corporation. All rights reserved. Intel and the Intel logo are trademarks of Intel Corporation or its subsidiaries in the U.S. and/or other countries. *Other names and brands may be claimed as the property of others. For more complete information about compiler optimizations, see our Optimization Notice.
FPGA
PCI express, Ethernet, SRIO, Interlaken
15
https://software.intel.com/en-us/articles/optimization-notice#opt-enhttps://software.intel.com/en-us/articles/optimization-notice#opt-en
2017 Intel Corporation. All rights reserved. Intel and the Intel logo are trademarks of Intel Corporation or its subsidiaries in the U.S. and/or other countries. *Other names and brands may be claimed as the property of others. For more complete information about compiler optimizations, see our Optimization Notice.
2017 Intel Corporation. All rights reserved. Intel and the Intel logo are trademarks of Intel Corporation or its subsidiaries in the U.S. and/or other countries. *Other names and brands may be claimed as the property of others. For more complete information about compiler optimizations, see our Optimization Notice.
FPGA
FPGA
20Kb
DSP
ARM
9
I/O
I/O
I/O
I/O
https://software.intel.com/en-us/articles/optimization-notice#opt-enhttps://software.intel.com/en-us/articles/optimization-notice#opt-en
2017 Intel Corporation. All rights reserved. Intel and the Intel logo are trademarks of Intel Corporation or its subsidiaries in the U.S. and/or other countries. *Other names and brands may be claimed as the property of others. For more complete information about compiler optimizations, see our Optimization Notice.
2017 Intel Corporation. All rights reserved. Intel and the Intel logo are trademarks of Intel Corporation or its subsidiaries in the U.S. and/or other countries. *Other names and brands may be claimed as the property of others. For more complete information about compiler optimizations, see our Optimization Notice.
FPGA:
1-bit
1bit:AND, OR, NOT, ADD, SUB
1-bit ()
https://software.intel.com/en-us/articles/optimization-notice#opt-enhttps://software.intel.com/en-us/articles/optimization-notice#opt-en
2017 Intel Corporation. All rights reserved. Intel and the Intel logo are trademarks of Intel Corporation or its subsidiaries in the U.S. and/or other countries. *Other names and brands may be claimed as the property of others. For more complete information about compiler optimizations, see our Optimization Notice.
2017 Intel Corporation. All rights reserved. Intel and the Intel logo are trademarks of Intel Corporation or its subsidiaries in the U.S. and/or other countries. *Other names and brands may be claimed as the property of others. For more complete information about compiler optimizations, see our Optimization Notice.
FPGA:
https://software.intel.com/en-us/articles/optimization-notice#opt-enhttps://software.intel.com/en-us/articles/optimization-notice#opt-en
2017 Intel Corporation. All rights reserved. Intel and the Intel logo are trademarks of Intel Corporation or its subsidiaries in the U.S. and/or other countries. *Other names and brands may be claimed as the property of others. For more complete information about compiler optimizations, see our Optimization Notice.
2017 Intel Corporation. All rights reserved. Intel and the Intel logo are trademarks of Intel Corporation or its subsidiaries in the U.S. and/or other countries. *Other names and brands may be claimed as the property of others. For more complete information about compiler optimizations, see our Optimization Notice.
FPGA:
https://software.intel.com/en-us/ar