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Principles of Power Conversion
1.1 Introduc tion
The a dvent a nd wides prea d a vaila bility of reliab le a nd e fficient sta nda rd
power modules ha s d ras tica lly cha nged the focus of the power system
designer. In the days of centralized custom power supplies, the designer
needed to understa nd the d etails of converter operation, a nd w as often
instrumental in ma king c hoice s such a s se lection of co nverter topology,
operating freq uency a nd c omponents . The need for this level of deta iled
knowledge about the internal workings of the converter is largely eliminated
when using standard modules from reliable suppliers, and the designer can
direct his time and energy to system related issues. Most of the converter
topology c hoices w ill be trans pa rent to the e nd us er - that is, the
spe cifica tions of the mod ule a nd its performanc e in the end sys tem w ill not
be affected.
There a re s ome choices , how ever, tha t w ill affect performance and thesys tem d es igner sho uld b e fa milia r with these co nsiderations . The 1999
introd uction o f sync hronous or ac tive rectifica tion in pow er modules ha s
dras tica lly improved efficiency, one of the mo st important sys tem
co nsiderations. Multi-phase or interlea ved to pologies ha ve a n effect on
dynamic response, system decoupling requirements and converter form
fac tor. The d esigner should ha ve enoug h knowledge of the trad e-offs
associated with these types of design decisions to make an intelligent
selection of power modules.
In this treatment of the principles of power conversion we will give only a brief
summary of the various types of topologies and how they relate to each
other. More foc us w ill be g iven to topologies tha t a re prese ntly use d in
various Artesyn produc ts, w ith the mos t empha sis reserved for disc uss ion of
topological choices that directly affect the specifications or system
performance of the po we r converter.
System designers need no longer be
experts in power conversion. Emergence
of high quality standard power modules
and distributed pow er architectures mean
than he can now concentrate on the actual
system design. However, the designer still
needs some knowledge of this impo rtant
and complex component.
C hapter 1:
Princ iples of Power Conversion
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1.2 Basic Principles
In this section we will review why power conversion is
suc h a ubiq uitous req uirement in toda y's electronic
sys tems . We w ill define the difference betw een up
conversion and down conversion and also distinguish
between the two circuit techniques used for power
co nversion - linea r and sw itchmod e regula tion.
The Need for Power Conversion
With the exc eption of the mos t s imple b atte ry powe red
devices , a ll electronic e q uipment requires so me s ort of
power conversion. Electronic circuitry operates from DC
voltag e s ources while po we r delivery to the use r's
system is in the form of AC power. Furthermore, the end
circuitry design is optimized to operate from specific
levels of DC voltage so that more than one value of DC
voltag e is need ed in most sys tems. The la test ICs now
require DC vo lta g es a s low a s 1V, while so me c ircuitry
operate s at DC voltag es up to 100V. The va rious DC
voltag e levels s ometimes must be seq uenced orcontrolled so that they can be turned on and off in a
desired way. For most equipment, galvanic isolation of
the DC voltages from the powerline is needed to meet
international safety standards. Other standards define the
interface between the powerline and the power
co nverter(s). Thes e type s o f req uirements d efine the need
for AC/DC c onve rters.
More s ystems now utilize a distributed pow er
architecture (DPA) which provides an intermediate DC
voltag e from which the fina l DC c ircuit voltage s a re
de rived . Thes e DC /DC c onverters ma y or ma y not req uire
iso lation, but retain the need for generating spe cific a nd
regulated DC voltag e outputs. S ophistica ted ba ttery
powered eq uipment such as laptop c omputers a lso
Power Factor Correct ion
require conversion, regulation and control of the DC
battery voltage in order to meet the needs of the internal
circuitry.
To s umma rize, a lmos t a ll electronic eq uipme nt use s
pow er convers ion in one form or ano ther. The pow er
co nverter performs s everal functions, a nd the relative
importanc e o f these functions w ill sometimes dete rmine
the topo log y s elected for a s pec ific co nverter. The
functions o f a pow er converter include:
Iso la t ion from the Powerline
Me et P o w erline S t a nd a rd s
Provide regulated DC Voltage(s)
P o w er S e q ue nc ing a n d C ontro l
Up vs. Down Conversion
One prima ry d elinea tion b etw een various topologies is
whether the output voltage of the converter is above orbelow the input s upply voltag e. If the output volta ge is
low er than the input voltag e it is referred to a s 'd ow n
conversion'. If the output voltage is higher than the input
voltag e it is referred to a s 'up co nversion'. Up c onversion
is so metimes referred to in the literature a s 'boo st' a nd
dow n conversion as 'b uck'. Often the two terms ca n be
used interchangeably, but it should be noted that 'boost'
and 'buck' are also the names of much more specific
DC/DC c onverter topologies tha t will be d isc uss ed late r
in this cha pter. For that rea so n, w e w ill use 'up
co nversion' and 'dow n conversion' when referring to the
voltag e trans forma tion through the co nverter in the more
general sense.
POWERAPPS
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Both of these techniques find widespread use in
electronic e q uipment, so me exa mples of which a re listed
below:
Common applications of up conversion
P ower Fac to r Correc tion (P FC)
Generation of higher voltages in battery powered
equipment
Generation of bac klight voltages for LCD displays
UP S sys tems
Common applications of down conversion
Mos t DC/D C power m odules
Mos t AC/D C converters
IC Linear regula to rs
Linear vs. Switchmode Conversion
There a re tw o b as ic me thodo log ies for ac com plishing
pow er co nversion. The firs t is c a lled 'linea r reg ula tion'
because the regulation characteristic is achieved with
one o r more s emiconducto r devices (bipola r trans istors
or MOSFETs) op era ting in their linea r reg ion. The s ec ond
method ology is ca lled 'sw itchmod e' c onversion. In this
case, the voltage conversion is achieved by switching
one or more semiconductor devices rapidly between their
'on' or cond ucting s tate a nd their 'off' or non-conducting
sta te. We w ill disc uss the d eta ils late r, but for now we
ca n summarize the compa rison b etween the two by
sta ting that the linear regulator has the ad vantag es of
simplicity, low output noise and excellent regulation
whereas the switchmode converters offer the powerful
advantage of high efficiency.
The ma jority of this cha pter will foc us o n sw itchm od e
co nverter topolog ies since they a re now the prevalent
choice for most electronic eq uipment. How ever, the linea r
reg ulato r still ha s a pla ce and it is important to
understa nd its performa nce and limitations, w hich w e w ill
address here.
Historically, the first active voltage regulators were linear
reg ulato rs, first implemented with vacuum tubes and then
with pow er tra nsistors. One of their a dva ntag es is
simplicity. As sho w n in Figure 1.1, o nly a few
components are needed for implementation, especially
w ith the integ rated circuits a va ila ble tod a y. The
sc hematic s hows a disc rete pas s element, but this a lso
can be integrated into the control IC for low power
applications. A negative feedback loop is used to
regulate the output voltage at the desired value by means
of se lec ting the va lues o f the voltag e d ivider R1 and R2.
The pa ss trans ist or (or FET) is driven b y the op a mp to
ma inta in Vout a t the de sired va lue. Va ria tions of Vin w ill
ha ve a neg ligible effect o n Vout (go od line regulation) a nd
the load regulation is also excellent, limited only by the
loop ga in of the op a mp circuit. Ass uming a clean low-
noise input voltag e, the o utput voltag e w ill also be very
clean a nd q uiet. Low freq uency AC ripple o n the input
will be significa ntly a ttenuated by the ga in of the
regulating circuit, and the linear regulator has no inherent
internal noise so urce s.
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POWERAPPS
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Figure 1 - Linear Regulator Topo logy
The key to unde rsta nding the limitations o f the linea r
regulator is to note that the entire output current is
continuously conducted by the pa ss element and that the
DC voltage drop across the pass element will be Vin -
Vout. Consequently, the power loss in the pass element
will be given by Iout x (Vin - Vout), and if the input voltage
is significa ntly higher than the output voltag e this po we r
loss can be quite large and the efficiency of the regulator
very low. For example, for an output volta ge of 5V a nd a n
input voltag e o f 48V, the po we r los s in the pa ss element
w ill be (48V - 5V) x Iout or 43 x Iout. The loa d p ow er will
be 5V x Iout and the input power 48V x Iout.
Consequently, the efficiency will be P out/P in or
5xIout/48xIout or 10.4%. This wo uld be an unac cep tab le
efficiency for ma ny a pplica tions .
The relations hip betw een the input a nd outp ut volta ge
and efficiency is shown in Figure 1.2 which assumes an
output volta ge of 3V. As c a n be s een, 60 to 70% is the
highest expected efficiency when the need for a
minimum voltage across the pass device and circuit
operating tolerances are taken into account.
Corresponding s witchmode des igns ca n de liver
efficienc ies of ove r 85%. The efficienc y c ha rac terist ic o f
the linear regulator imposes a strong disadvantage. If
there is a significa nt difference betw een the input and
output voltag es ac compa nied by a significa nt output
current, the large pow er los se s in the pas s e lement w ill
require the usage of large heatsinks which add to the size
and cos t of the des ign. S ince the ab solute power loss for
a given ra tio of Vout/Vin will be proportional to the output
current, this approach will usually only be practical for
low current de signs.
Figure 1.2 - Maximum Efficiency of 3V Linear Regulator
One obvious s olution to the a bove problem is to se t the
input voltage as low as possible for a given output
voltag e. This will inde ed dra stica lly improve the e fficienc y
of the linea r reg ula tor but at the expens e of ha ving to
provide the preset input voltage . At other than low pow er
levels, some type of conversion (or line-frequency
tra nsformer) wo uld b e required to d o this, w hich a dd s tothe complexity and cost of the overall system. Other
disadvantages of the linear regulator are that it can only
provide dow n co nversion and that it has no inherent
galvanic isolation between the input and output voltages.
Bec ause of the limitations d esc ribed ab ove a nd the
a vaila bility o f sw itchmod e d es igns , the linea r reg ula tor is
Pass Element
VIN VOUT
VIN- VOUT
VREF
IOUT
R2
R1
+
-
Power Factor Correct ion
0
10
20
30
40
50
60
70
80
0.0 5.0 10.0 15.0 20.0 25.0 30.0 35.0
Input Voltage (Volts)
Efficiency(%)
RangeofMinimumInputVoltage
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now somewhat out of favor. It still has a place, however,
mos tly for low current a pplica tions whe re low c os t is
more important than efficiency. Figure 1.3 summarizes
the ad vantag es and disadva ntages of the linear regulator.
Figure 1.3 - Linear Regulator Characteristics
1.3 Switchmode Topologies
Before disc ussing spec ific sw itchmode topologies, w e
will look a t s ome ba sic principles of sw itchmod e
co nversion that ap ply to a ll of them. In general,
switchmode converters can be either isolated or non-
iso la ted. By isolation we imply ga lvanic iso la tion s o tha t
there is no DC path from the input of the converter to its
output. In this type of converter the input and output
grounds are isolated from each other, which allows for
additional flexibility in system grounding configurations.
The isolation a lso provides a sa fety ba rrier that isolates
the secondary from primary voltages that are deemed to
be a safety hazard to personnel. Most electronic
eq uipment ope rating from the AC pow erline need s a t
least one stage of isolated conversion to meet various
agency safety requirements. On the other hand, isolation
usually increases the complexity and cost of the
co nverter and is o ften not req uired in a spe cific s ystem
co nfigura tion. The top ology e xa mples in this cha pter will
show the most common usage of each topology - some
iso late d a nd s ome no n-iso late d. Keep in mind tha t it is
often fea sible to use the sa me, o r simila r, topo log y w ith
or without isolation.
Another consideration that encompasses all topologies is
the op erating freq uenc y of the c onverter. This is one of
the most critical decisions that the converter designer
ma kes. Fortunate ly the end user of the co nverter
generally does not need to be concerned with it if the
converter designer has made a wise choice. However, it
is useful to be aw are of the most ba sic considerations,
which a re the e fficiency a nd s ize o f the co nverter.
Co nverters o perate by tra nsferring energy from the input
to the output. For a g iven pow er level, the e nergy
transferred per cycle is inversely proportional to the
operating freq uency. S ince this tra nsferred energy is
sto red in ca pa citors or inductors during p ortions of the
operating cycle and is transferred through a transformer
in ma ny ca se s, the size of these circuit elements will be
smaller when a higher operating frequency is selected.
So the highest possible operating frequency would
appear to be advantageous.
Unfortunately, high frequency operation comes at a cost
- impa cts on t he e fficienc y o f the c onverter. The FETs,
bipolar transistors and switching diodes used in power
converters have tw o types of loss es - static c onduction
losses and switching losses. As a first approximation, it
ca n be a ss umed that the static loss es w ill not be a ffected
by the s elec tion o f ope ra ting freq uency. The s witching
los ses , how ever, a re s trong ly influenced by the operating
freq uency. Eac h pow er semicond uctor will exhibit an
energy loss when it is turned on and again when it is
turned off (or for polarity reversals in the case of diodes).
Adva nta g es Dis a dva nta g es
S imple Low Effic ienc y
Low C ost Need for Hea ts inks
Line/Loa d Regula tion La rg e S ize
Low Nois e No Is ola tion
Only Dow n Co nversion
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Figure 1.4 - Op erating Frequency Considerations
Topology Tree
While we will look at a few specific topologies in more
deta il, it is us eful to g et a n overview of how the mos t
co mmon top ologies relate to ea ch o ther. Figure 1.5 is a
'topology tree' which defines some of these relationships.
It sho uld b e noted that w hile there are hundreds of
known topologies, only the most common are shown.
Switchmode converters are sub-divided into resonant
variable frequency and pulse width modulated
topologies. Since pulse width modulated topologies are
in much w ider use, they rec eive the mos t a ttention. P ulse
width mod ulate d topologies a re further divided into d irec t
a nd indirec t types . Direct co nverters trans fer energy from
the input to the output during the 'on time' of the
converter switch(s). Indirect converters accomplish the
energy transfer during the 'off time' of the pow er
sw itch(s). S ome o f the major benefits o r areas of
application are shown for each major topology along with
exa mples of Artes yn pow er prod ucts that utilize s ome o f
the topologies.
POWERAPPS
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Since the number of these energy losses per second will
be proportiona l to the op erating freq uency, the overall
tra nsition po we r los ses will increas e w ith ope ra ting
freq uency a nd a t s ome point the c onverter efficiency w ill
deg rade una cc epta bly. This effect is s omew hat offset by
using various res ona nt sw itching techniques to minimize
loss es, but eventually the pa ras itic loss es as soc iated
with less than idea l components and pac kag ing
techniques will impose an upper limit on useful operating
frequency.
These des ign trad e-offs a re de picted in a g eneral wa y in
Figure 1.4. As c an b e s een, there is a n optimal rang e of
operating freq uency for ea ch d es ign. The lower operating
freq uency is mo st often limited by either the co nverter
becoming too large or by the desire to keep the
operating frequency above the audible frequency range.
For these rea so ns, 25kHz is the low est operating
freq uenc y tha t is p rac tica l. The uppe r limit on o pera ting
frequency is determined by efficiency, availability of
spec ialized co mponents and the ad vanced pa ckaging
a nd ma nufac turing te chniques req uired for high
freq uenc y op erat ion. This upper limit is now in the ra nge
of 3MHz. Most of today's converters operate somewhere
in the range of 100kHz to 2MHz.
Power Factor Correct ion
Overall Design Merit
Efficiency
Size
Optimal Freq uency Rang e
Operating Freq uencyEfficiency
Limit
3MHz
Audible Noise
and Size Limits25KHz
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Buck
The b uck topo log y s how n in Fig ure 1.6 is one of the
most basic. It is a non-isolated down converter operatingin the direct m ode . Load current is c onduc ted directly by
the s ingle sw itch e lement d uring the o n-time a nd through
the output diode D1 during the off-time. Adva ntag es of
the buck are simplicity and low cost. Disadvantages
include a limited p ow er ra nge and a DC pa th from input
to output in the event of a shorted switch element, which
ca n ma ke se co nda ry circuit protec tion mo re difficult.
Useful P ower Level 1 to 50 Wa tts
S w itch Volta ge S tress Vin
S witch P ower S tres s P in
Tra ns former Utiliza tion N/A
Duty Cyc le
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Us eful P ow er Level 1 to 50 Wa tts
S w itch Volta ge S tress Vout
S w itch P ower S tress P in
Tra ns former Utiliza tion N/A
Duty Cyc le
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The flyba ck topology is one of the mos t comm on a nd
cost-effective means of generating moderate levels of
iso la ted pow er in AC/DC c onverters. Additiona l output
voltag es c an be g enerated ea sily by ad ding a dditional
sec onda ry w indings. There a re s ome d isa dvantag es
how ever. Reg ula tion a nd o utput ripple a re no t a s tightly
controlled as in some of the other topologies to be
discussed later and the s tress es on the pow er switch a re
higher.
Useful pow er level 5 to 150 Wa tts
S w itch volta ge s tress Vin + (Np/Ns) Vout
S witch pow er s tress P in
Transformer utiliza t ion Poor/specialized design
Duty cyc le
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Resonant Reset Forward
The ba sic forwa rd topology c a n be mod ified slightly, a s
show n in Figure 1.10, to a chieve res ona nt res et
operation. The a dd itiona l ca pa citance C r resona tes with
the ma gnetizing inducta nce of the trans former during the
off-time a nd rese ts the trans former co re. This increas es
the utilization of the transformer core and results in a
much more effective ma gnetic d es ign (no reset winding)
a long with a larger maximum duty cyc le (the ba sic
forward topology is limited to 50% duty). C r is the
combination of stray ca pac itance and a sma ll disc rete
cera mic c a pa citor. The do wns ide is tha t the reso nant
tra nsition d uring the off-time increa se s the voltag e s tres s
on the switch element and output diodes.
Useful P ow er Level 10 to 40 Wa tts
S w itc h Volta ge Stres s C an be >2 x Vin
S witch P ower S tress P in
Transformer Utilization Excellent/no taps required
Duty Cyc le
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Half Bridge
The ha lf bridg e to polog y, as de picted in Figure 1.13, is
used in many applications due to its wide useful power
range a nd goo d performanc e cha ra cteristics. The tapped
winding full-wa ve s eco nda ry circuit is identica l to tha t
sho w n for the push-pull co nverter. The p rima ry, ho w ever,
is different. C a pa citors C 1 and C 2 form a voltag e d ivider
that centers one end of the untapped primary winding at
Vin/2. Po we r switch de vices Q1 and Q2 a re a lternately
turned o n to c ond uct c urrent throug h the prima ry of T1.
The duty c yc le ca n ap proa ch unity, allow ing o nly for a
minimal 'dead time' when both power switches are off.
Because of the capacitive voltage divider, the non-
conducting FETs ees only Vin as a voltag e stress - half
the stress of the push-pull circuit. Because two power
devices share the input current load and see reduced
voltage stresses, the half bridge is a very popular choice
for off-line c onverters up to several hundred wa tts.
Figure 1.13 - Half Bridge Converter
Us eful P ow er Level 50 to 400 Wa tts
S witch Volta ge S tres s Vin
S w itch P ow er S tress P in/2
Transformer Utiliza t ion Good/sec . tap required
Duty Cyc le
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Full Bridge
The full bridg e to polog y, sho w n in Figure 1.14, is ve ry
simila r to the ha lf bridg e. The o nly d ifferenc e is tha t the
capacitive voltage divider is replaced with two additional
pow er sw itch d evices . In this c onfiguration, Q1 and Q4
co nduct simultaneo usly to impose the entire input
voltag e a cros s the trans former prima ry. Then, a fter a
short dead time, Q3 and Q2 conduct to reverse the
polarity of the primary current. Since the primary power is
shared by two more devices than in the half bridge, with
no a dd itiona l voltage stress es , the full bridg e c onverter is
ca pa ble of much higher powe r levels. Most high pow er
(>600W) off-line converters use some form of the full
bridg e. The do wns ide s to this topology a re increas ed
complexity a nd c ost.
Figure 1.14 - Full Bridge Converter
Us eful P ow er Level 200 to 2,000 Wa tts
S witch Volta ge S tress Vin
S w itch P ow er S tress P in/4
Transformer Utiliza t ion Good/sec . tap required
Duty C ycle
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Figure 1.15 - Phase Shifted Full Bridge Converter
Us eful P ow er Le ve l 1,000 to 5,000 Wa tts
S witch Volta ge S tress Vin
S w itch P ow er S tress P in/4
Trans former Ut ilizat ion Excellent/no taps required
Duty Cycle 48
All
24 /485 - 50
40 - 100
80 - 200
150 - 500
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Figure 1.17 - The Value of Synchronous Rectification
The s ynchronous rectifica tion reduces the po we r
dissipated in the c onverter by ap proxima tely 2 Watts ,
w hich a llow s for the elimination of the hea tsink. This, in
turn, reduc es the height ab ove the c ircuit board b y half,
allowing for closer board to board spacing. Perhaps more
importantly, it a llow s for completely a utomate d S MT
assembly, eliminating the need for manual assembly
processes with their attendant cost and quality issues. As
the output voltage level goes down, the importance of
efficiency becomes more and more important. Consider
that, o ver the next 3 yea rs, the ma jority of high-
performance elec tronics will be operating a t voltage
levels betw een 1.0 a nd 3.5 Volts a nd tha t volta ge levels
for demanding processor power applications are
projecte d to rea ch a s low a s 0.7 Volts within the next 5
yea rs. These types of dema nds will drive the need for
sync hronous rectifica tion.
What is sync hronous rectifica tion? Ba sica lly, the outputrectifier diode s a re replac ed w ith MOSFETs , w hich g ives
the be nefit of low er cond uction los s es . The first
ge nerations of DC/DC c onverters us ed silico n diodes for
output rectifica tion. These diodes had a forward
co nduction voltag e d rop o f ab out 0.7V. These we re s oon
replac ed w ith schottky diodes tha t had a forwa rd d rop of
a round 0.5V. S ince the pow er los s is this voltag e d rop
multiplied by the co nducted output current, the po we r
los se s w ere much improved . MOSFETs ta ke this e ffect
one step further by offering even lower forward
co nduction los se s. The forwa rd d rop c an be low ered
dra ma tica lly by s electing MOS FETs w ith low dra in to
so urce on resista nce a nd b y pa ralleling d evices for very
dem and ing ap plica tions . The s ilicon a rea is ess entially
increas ed until the d esired forwa rd voltag e d rop is
achieved.
They a re ca lled ' sy nchrono us' rectifiers be ca use , unlike
conventional diodes that are self-commutating, the
MOSFETs mus t be turned o n a nd off by mea ns o f a
signal to their gate and this signal must be synchronized
to the operation of the c onverter. P ow er IC
ma nufa cturers a re ma king this tas k ea sier for the DC /DC
designer by the introduction of intelligent synchronous
rectifica tion c ontrollers, s ome of w hich even a llow for
adjustable turn-on and turn-off delays to minimize
dea dtime a nd further increas e e fficiency.
The ma jor disa dva ntag e o f sync hronous rectifica tion is
the ad ditional complexity and cos t a ss ociated w ith the
MOSFETdevices and associated control electronics. At
low output voltag es , how ever, the resulting increas e in
efficiency more than offsets the cost disadvantage in
ma ny a pplica tions. The co st pe nalty, w hich is now les s
than $5 per converter, should become even less as more
integrated control electronics become available and
volumes ramp up. Another disa dva ntag e only applies for
applications where two or more converters must be
pa ralleled for the purpos e o f increas ing the output pow er
ca pa bility. In ge neral, ORing d iod es must be used in
se ries with ea ch c onverter output to p revent interac tion
betw een the MOSFETs in connected co nverters. If the
POWERAPPS
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Power Factor Correct ion
Applica tion (3.0V @ 30W)
Rectification
Efficiency (%)
P ow er Diss . (W)
Cooling
Height (Inches )
Assembly
Schottky
84%
5.7W
Heatsink
1.0"
Manual HS Attac h
Synchronous
89%
3.7W
No Heats ink
0.5"
Automated SMT
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paralleling is done to provide redundancy, the ORing
diodes w ould be req uired in any ca se, a nd the
sync hronous rectifica tion w ould not prese nt any
pa rticular disad vanta ge . P ara lleling of c onverters will be
discus se d in more deta il in a late r chap ter.
Multi-phase Topology
Another very recent d evelopment is the a dvent o f the
multi-phase co nverter topology, which is a technique for
creating a power converter from a set of two or more
ide ntica l sm a ller conve rters . Thes e s ma ller conve rter'cells' are connected so that the output of the resultant
la rge r converter represents a summa tion of the outputs
of the cells. The cells a re ope ra ted a t a c ommon
frequency, but with the phase shifted between them so
that the co nversion sw itching oc curs a t regula r intervals.
The b a sic c onfiguration is s how n in Figure 1.18. For
purposes of this general discussion, the actual topology
internal to each converter cell is not important.
Figure 1.18 - Multi-Phase Topo logy
This a pproa ch provides se vera l benefits to the end user,
the most noticeable of which is the effect on the output
ripple waveform. Figure 1.19 compares the ripple of a
multi-phase co nverter for n=2 with the ripple o f ea ch o f
the ce lls. Note tha t the p-p ripple is reduc ed by a fac tor
of 2 w hile the effective freq uenc y is do ubled. This w ill
mean that significantly less decoupling capacitance is
required in the s ys tem. The use of the multi-phas e
topology has essentially doubled the effective frequency
while not enco untering a ny of the c omponent, e fficiency
a nd pa ckag ing limitations o f ra ising the freq uency of a
single c onverter. The improvem ent in freq uenc y a nd p -p
ripple will be even more dramatic for larger values of n -
the ripple frequency will be n x f, where f is the operating
freq uency of ea ch c onverter.
Figure 1.19 - Effect of Multi-Phase Topo logy on
Output Ripple (n=2)
There a re also pa ckag ing-rela ted a dva ntag es to using a
multi-phase approach. Since each cell operates at a low
power level, the component sizes are much smaller than
would be needed to fabricate a single converter with the
sa me tota l output pow er. With the c omponent he ight
reduced, a lower profile converter can be made which
15
Vout1
OutputRippleVolta
ge
Time
Vout2
Vout
Converter #1
Converter #2
oooo
Converter #n
Vout1
Vou t
Vin
Vout2
Voutn
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will reduce the required board-to-board pitch. Also, since
each cell is small and light, they can be mounted to the
system's circuit boa rd using a utomated SMTtechniques ,
reducing assembly cost. Even a high power converter
ca n be automatically a ss embled to the c ircuit boa rd b y
this means. Since the power dissipated in the converter
cells is sprea d out uniformly o ver the c ircuit boa rd a rea ,
thermal hot s pots a re reduced relative to a single higher
pow er converter, lead ing to s ystem co oling efficiencies
suc h a s the removal of hea tsinks and /or reduc ed a ir flow
velocities.
The disa dva ntag es of this a pproac h revolve a round
relia bility a nd c os t. S ince the tota l number of
co mponents in the s ummation of co nverter cells is
a pproximate ly n times the numbe r of compo nents in a
single higher po we r converter, high q uality c omponents
and manufacturing tec hniques must be used to a chieve
the desired overall reliability. Fortunately, the component
and assembly quality levels available today allow this to
be a chieved for many a pplica tions . The increas ed
component count can also have a n adverse impac t on
total hardw are cos t, although the sa vings in pac kag ing,
cooling and reduced decoupling requirements often
offset this c os t. To-da te, the mos t co mmon a pplica tion
for the multi-phase a pproa ch is in voltag e regulator
mod ules for high pe rforma nce p roc es so r chips.
1.5 AC/DC Topology Select ion
As w a s the c a se for DC/DC c onverters, the top ologies
a ctua lly in produc tion for AC/DC c onverters is a s ma ll
sub-se t o f the to tal number a vailab le. S ince AC/DC
co nverters op erate from wha t is es se ntially the rectified
AC pow erline voltage , the to pologies tha t a re o ptimized
for high voltag e input w ill tend to b e p referred . This is
true for both single phase and three phase AC inputs and
for all international powerline voltages. Most equipment
a lso req uires ga lvanic iso lation of the s eco nda ry circuit
voltag es from the po we rline, w hich results in the usa ge of
iso late d to pologies. The mos t co mmon exc eption is low
power se aled eq uipment with no user ac ces s, for which
non-isolated topologies a re sometimes ac cepta ble.
Thes e c onverters w ill not b e c overed here. The ot her
most common exception is high voltage output non-
iso late d front-end po we r supplies that a re s ometimes
used in high power Datacom applications as the front
end fo r iso la ted DC/DC c onverters. Thes e co nverters
normally use a boost topology, which will be discussed
la ter. Figure 1.20 show s the mos t co mmonly use d
topologies as a function of power level.
Figure 1.20 - Most Commonly Used AC/DC Topo logies
POWERAPPS
16
Power Factor Correct ion
P ow er Ra ng e (W) Is ola tio n C ommo n To po lo gies C ommo n Applic atio ns
1 - 100
80 - 250
200 - 500
500 - 1000
50 - 2000
Yes
Yes
Yes
Yes
No
Flyback /Forward
Flyback /Forward /Half Bridge
Half Bridge /Full Bridge
Full B ridge
Boos t
Dataco m, Telecom, PC s
Dataco m, Telecom, PC s
Data com , Telecom
Data com , Telecom
PFC, HV Front-Ends