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A Robust AlGaN/GaN HEMTTechnology for RF SwitchingApplications
Michael D. Hodge1,2, Rama Vetury1, Jeff Shealy1,and Ryan Adams2
1) RF Micro Devices, Charlotte, NC
2) University of North Carolina at Charlotte, Charlotte, NC
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Outline
Advantages of GaN Materials for RF Switching
Background on GaN reliability
OFF-State Step Stress Experiment
Conclusion
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GaN Material Advantages
Ruggedness
Low Loss,Low Noise
PowerHandling
UNREALIZEDPotential
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Why GaN for RF Switches ?
GaN-on-SiC
Engineer COFF, low Ron high BKDN
high ID,max
Low RTH
High Max TCH
Si PSi PSi PSi P----iiii----N:N:N:N:
Drive CurrentDependence
GaAs pHEMT:GaAs pHEMT:GaAs pHEMT:GaAs pHEMT:
BKDN vs RON Trade
Si P-i-N GaAs FET GaN FET
Loss
Isolation
Power Handling
Speed
Linearity
Operating Efficiency Engineering Complexity
High Power RF Switch Technologies
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Device Design - GaN RF switch
Path Control FET
Symmetric Operation
Power Amp/Switching FET
Non-symmetric Operation
Gate
Source Connected FP
DrainSource
PA FET
SiN
Gate
S/DS/D
LGCFP
Switch FET
LG-O
LG
SiN
Switch
LNA
HPA
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GaN High Temperature Reliability Test
18 19 20 21 22 23 24 25 26 27 2810
0
102
104
106
108
1010
1/kT
MTT
F
350 325 300 275 250 225 200 175 150
Tch (C)
18 19 20 21 22 23 24 25 26 27 2810
0
102
104
106
108
1010
1/kT
MTTF
350 325 300 275 250 225 200 175 150
Tch (C)
RFMDGaN1High Power
RFMDGaN2High Linearity
GaN High TemperatureReliability Test
SampleSize
GaN1High
Power
GaN 2High
Linearity
TotalDevices
Wafers
Fab Lots
Epi Vendors
Number ofTemperatures
Results GaN1HighPower
GaN2High
Linearity
MTTF Hrs
Ea eV
TCHANNEL C
VDS V
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Reliability Concerns in GaN HEMTs
Inverse Piezoelectric Effect (IPE)
Requires
High electric field
Observed to have no time
dependence
Impact
Physical crystal defect
Symptoms
Parametric degradation
Ron, Idmax, Idss
Increased gate leakage
Hot Electron InducedDegradation (HEI)
Requires
High electric field
Carriers
Time dependent
Impact
Hot electrons induce traps in bufferand/or barrier layers
Symptoms Parametric degradation
Ron, Idmax, Idss
7
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Inverse Piezoelectric Related Literature
Failure Within Minutesof Stress
20-100 minutes
2T is the most stressful
Critical Voltage
17-38V (GaN-on-SiC)
Study Stress Conditions Critical Voltage (V) Total Stress Time (Mins) Technology Notes
(1) Joh 2006 Vds=0V, Vgs=-15V to -34V 17-34V 100 GaN-on-SiC Lg dependent
(2) Joh 2008 Vds=0V, Vg=-10V to -50V
Vgs=-8V, Vd=10V to 50V
27V (2T)38V (3T)
40 GaN-on-SiC 2T stress harsher than3T
(3) Demirtas2009
Vds=0V, Vgs=-1V to 20V 37V GaN-on-SiC70V GaN-on-Si
20 GaN-on-SiCGaN-on-Si
Vcrit of GaN-on-Si >GaN-on-SiC
(4) Makaram2010
Vg=-7V, Vd=8V to 50V 150C base
Vg=-7V, Vd=50V 150C base
20V 42
10 and 1000
GaN-on-SiC Metal etch to reveal pits
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-200
-150
-100
-50
0
50
100
150
200
-200
-150
-100
-50
0
50
100
150
200
0 10 20 30 40 50 60
Vgs(V)
Vds=
0V
Vds(V)
Vgs=
-8V
Time (mins)
Device A - Condition 1&3
Device B - Condition 1&3
Device A - Condition 2&4
Device B - Condition 2&4
Base TempConditions 1&2 = 25C
Conditions 3&4 = 85C
Step Stress Test Conditions
Designed to replicate IPE literature stress test conditions2
Lds = 4.25um
2 .J. Joh and J. A. del Alamo, Critical Voltage for Electrical Degradation of GaN High-ElectronMobility Transistors, IEEE Electron Device Lett., vol. 29, no. 4, pp. 287-289, Apr. 2008.
Device A Lds = 3.1um
Vbd = 110V
Device B
Lds = 4.5um Vbd = 200V
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-25
-20
-15
-10
-5
0
5
0 10 20 30 40 50 60 70 80 90 100
Ron(%)
Stress Voltage (V)
Device A - Condition 1
A1
A2
A3
A4
A5
Tbase= 25C, Vds= 0V, Vgs= 0 to -100V
-25
-20
-15
-10
-5
0
5
0 10 20 30 40 50 60 70 80 90 100
Ron(%)
Stress Voltage (V)
Device A - Condition 2
A1
A2
A3
A4
A5
Tbase= 25C, Vds= 0 to 100V, Vgs= -8V
-25
-20
-15
-10
-5
0
5
0 10 20 30 40 50 60 70 80 90 100
Ron(%)
Stress Voltage (V)
Device A - Condition 3
A1
A2
Tbase= 85C, Vds= 0V, Vgs= 0 to -100V
-25
-20
-15
-10
-5
0
5
0 10 20 30 40 50 60 70 80 90 100
Ron(%)
Stress Voltage (V)
Device A - Condition 4
A1
A2
Tbase= 85C, Vds= 0 to 100V, Vgs= -8V
No degradation of Ron up device breakdown
No degradation in Idss and Idmax observed
Any degradation is
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No degradation of Id
Negative threshold shift
Indicates enhancement of channel carriers
Step Stress Test Results Device A
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Longer term stress
Held at most stressful condition according to literature
Vds=0V, Vgs= -100V
No further parametric change after 6 and 60 hours.
Step Stress Test Results Device A
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Summary of Step Stress
Comprehensive OFF-state stress test
Multiple bias configurations
2 Terminal 3 Terminal
Multiple base temperatures
25C
85C
Devices stressed just before catastrophic breakdown
No parametric degradation observed
Ron
Idss
Idmax
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Conclusions
No degradation observed in the OFF-state stress
No IPE related degradation observed in AlGaN/GaN switch FETs
AlGaN/GaN technology robust for RF switching applications
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Acknowledgements
The authors would like to thank for their support and discussions
AFRL
Dr. John Blevins
Dr. Chris Bozada
ONR
Dr. Paul Maki
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Appendix
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RFMD GaN Power Amplifier
No difference over extended time
300 hours and 1016 hours overlays
Stress Study Results PA OFF-State
Test Condition Base Temp (C) Vds (V) Approx Id(mA/mm)
Pdiss (W/mm) Vgs (V)
1 245 60 0.03 0.0018 -10
2 245 100 2 0.2 -10
No crystal defect
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Constant Stress Test Result
OFF-State No degradation observed
Results are inconsistent with IPE related degradation