-
55
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,Taipei Hsien 221, Taiwan, R.O.C.
DJ1 Calpella UMA X01Cover Page
A3
1 90Monday, April 26, 2010
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,Taipei Hsien 221, Taiwan, R.O.C.
DJ1 Calpella UMA X01Cover Page
A3
1 90Monday, April 26, 2010
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,Taipei Hsien 221, Taiwan, R.O.C.
DJ1 Calpella UMA X01Cover Page
A3
1 90Monday, April 26, 2010
Intel PCH
2010-04-23REV : X01
DJ1 Calpella UMA Schematics DocumentArrandale
DY : Nopop Component
-
55
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,Taipei Hsien 221, Taiwan, R.O.C.
DJ1 Calpella UMA X01
Block Diagram
2 90Monday, April 19, 2010
A3
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,Taipei Hsien 221, Taiwan, R.O.C.
DJ1 Calpella UMA X01
Block Diagram
2 90Monday, April 19, 2010
A3
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,Taipei Hsien 221, Taiwan, R.O.C.
DJ1 Calpella UMA X01
Block Diagram
2 90Monday, April 19, 2010
A3
Thermal
KBC
Int. KB
INPUTS
SYSTEM DC/DC
+PWR_SRCOUTPUTS
26
LPC Bus
TPS51611
256kB
+CPU_GFX_CORE
Flash ROM
Intel CPUDDRIII800/1066
Slot 0DDRIII 800/1066 Channel A
Slot 1
8,9,10,11,12,13,14
19
18
DJ1 UMA Block Diagram
+0.75V_DDR_VTT
+3.3V_RTC_LDO
ISL62882INPUTS
+VCC_COREOUTPUTS
SYSTEM DC/DCRT8207GQW
+V_DDR_REF
OUTPUTS
CPU DC/DC
+PWR_SRC
+1.5V_SUSINPUTS
RT8205BGQW
+PWR_SRC+5V_ALW
OUTPUTS
+3.3V_ALW
TPS51218OUTPUTS
SYSTEM DC/DC
INPUTS
+PWR_SRCINPUTS
SYSTEM DC/DC
+1.5V_RUN
OUTPUTSBQ24745
INPUTS
MAXIM CHARGER
+PWR_SRC+PBATT
+5V_ALW2
+DC_IN
Bluetooth 73USB 2.0 x 1
76PCIE
63
54CAMERA
Right Side:USB x 2
USB 2.0 x 1
USB 2.0 x 2
USB 2.0
CRT
LVDS(Dual Channel)LCD
Arrandale
RGB CRT
Intel
5959
S
A
T
A
ODD
14 USB 2.0/1.1 ports
PCHS
A
T
A
High Definition AudioSATA ports (6)
LPC I/FACPI 1.1
HDD
PCI/PCI BRIDGE
32
CardReader RealtekRTS5138
SD/MMC/MS/MS Pro/xD USB2.0
AzaliaCODEC
AZALIA
2CH SPEAKER
30
HP1
Internal Analog MIC
55
NPCE781BA0DXNUVOTON
SPI
39
PCIE ports (8)
39,40
INPUTS
SYSTEM DC/DC
+5V_RUN
OUTPUTS
26
+5V_ALW
APL5930
+3.3V_ALW
+3.3V_RUN+3.3V_ALW
+1.8V_RUN
USB 2.0 x 2
L6: BottomL5 GND
+PWR_SRC
Fan
DDRIII 800/1066 Channel B DDRIII800/1066
Clock Generator
54
7
37
SLG8SP585
622568
20,21,22,23,24,25,26,27,28
68
TouchPAD
PCB LAYER
L3: SignalL4: Signal
L2: VCCL1: Top
Project code : 91.4EK01.001PCB P/N : 48.4EK19.0SBRevision : 10212-SB
92HD79B1
EMC2102
DMIx4
71
58
S
P
I
4MBFlash ROM
62
+1.5V_SUS
SYSTEM DC/DCSwitches
INPUTS OUTPUTS
+1.05V_VTT
+15V_ALW
10/100 NICPCIE x 1
ATHEROS RJ45CONN
I
/
O
B
o
a
r
d
C
o
n
n
e
c
t
o
r
Left Side:USB x 1
AR8152/AR8151
PCIE x 1
47,48
49
46
50
53
51
42
MIC IN
802.11a/b/gMini-Card
FDIx4x2(UMA)
-
55
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,Taipei Hsien 221, Taiwan, R.O.C.
DJ1 Calpella UMA X01Power Block Diagram
A3
3 90Friday, April 16, 2010
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,Taipei Hsien 221, Taiwan, R.O.C.
DJ1 Calpella UMA X01Power Block Diagram
A3
3 90Friday, April 16, 2010
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,Taipei Hsien 221, Taiwan, R.O.C.
DJ1 Calpella UMA X01Power Block Diagram
A3
3 90Friday, April 16, 2010
Charger
BQ24745
+PBATT
Adapter
Battery
TPS51125
+5V_ALW2
Regulator LDO Switch
+5V_ALW+3.3V_RTC_LDO
AO4468
+5V_RUN
G547F2P81U-GP
+5V_USB1
+3.3V_ALW
ISL62882
+VCC_CORE
TPS51218
+PWR_SRC TPS51116
+0.75V_DDR_VTT+V_DDR_REF +1.5V_SUS
Power Shape
AO4407A
+15V_ALW
+1.05V_VTT
APL5930
+1.8V_RUN
AO4468
+1.5V_RUN
G547F2P81U-GP
+5V_USB2
AO3403
+3.3V_LAN
AO4468
+3.3V_RUN
RTS5159
+3.3V_RUN_CARD
SI3456DDV
+LCDVDD
2000mA2000mA 6330mA
10330mA82mA
2000mA 300mA
6661mA300mA 1761mA
11145mA
48000mA 24800mA
1000mA
3500mA
16825mATPS51611
+CPU_GFX_CORE
22000mA
-
AA
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,Taipei Hsien 221, Taiwan, R.O.C.
DJ1 Calpella UMA X01SMBUS Block Diagram
A2
4 90Friday, April 16, 2010
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,Taipei Hsien 221, Taiwan, R.O.C.
DJ1 Calpella UMA X01SMBUS Block Diagram
A2
4 90Friday, April 16, 2010
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,Taipei Hsien 221, Taiwan, R.O.C.
DJ1 Calpella UMA X01SMBUS Block Diagram
A2
4 90Friday, April 16, 2010
LDDC_CLK
LDDC_DATA
+3.3V_RUN
TPDATA
TPCLK
+5V_RUN
TouchPad Conn.TPDATA
TPCLKPSCLK1
PSDAT1
LCD CONN
PCH SMBus Block Diagram
PCH
SMBCLK
SMBDATA
GPIO62/SDA2
GPIO61/SCL2
KBC
CLK_SMB
ThermalSCL
SDA
+3.3V_RUN
SRN2K2J-1-GP
+3.3V_ALW
SRN2K2J-1-GP
+3.3V_RUN
DMN66D0LDW-7-GP
DAT_SMB
KBC_SCL1
KBC_SDA1
MinicardWLANSMB_DATA
SMB_CLK
SCL1
SDA1
BAT_SCL
BAT_SDA
SMBus address:D2
SMBus Address:A0
SMBus Address:A4
DIMM 1SCL
SDA +KBC_PWR
DIMM 2SCL
SDA
SMBus address:16
PCH_SMB_CLK
PCH_SMB_DATA
PCH_SMBCLK
PCH_SMBDATA
PBAT_SMBCLK1
PBAT_SMBDAT1
KBC SMBus Block Diagram
Battery Conn.PCH_SMBCLK
PCH_SMBDATA
ClockGeneratorSCLK
SDATA
PCH_SMBCLK
PCH_SMBDATA
BQ24745SCL
SDA
TPDATA
TPCLK
+3.3V_RUN
DMN66D0LDW-7-GP
THERM_SCL
THERM_SDASMBus address:7A
PCH_SMBDATA
PCH_SMBCLK
SMBus address:12
+3.3V_RUN
+3.3V_RUN
DMN66D0LDW-7-GP
+3.3V_RUN
SRN2K2J-1-GP
+5V_CRT_RUN
SRN2K2J-1-GP
CRT CONNDDC_CLK_CONDDC_DATA_CONGMCH_DDCCLK
GMCH_DDCDATA
SRN10KJ-5-GP
SRN4K7J-8-GP
SRN4K7J-8-GP
SRN2K2J-1-GP
NPCE781BA0DX
SRN100J-3-GP
XDPSML0CLKSML0DATASML0_CLK
SML0_DATA
18
19
7
76
23
SRN4K7J-8-GP
+3.3V_ALW
23
PCH
SML1CLK/GPIO58
SML1DATA/GPIO75
L_DDC_CLK
L_DDC_DATA
CRT_DDC_CLK
CRT_DDC_DATA
+3.3V_ALW
SRN2K2J-1-GP
-
AA
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,Taipei Hsien 221, Taiwan, R.O.C.
DJ1 Calpella UMA X01Thermal/Audio Block Diagram
Custom
5 90Friday, April 16, 2010
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,Taipei Hsien 221, Taiwan, R.O.C.
DJ1 Calpella UMA X01Thermal/Audio Block Diagram
Custom
5 90Friday, April 16, 2010
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,Taipei Hsien 221, Taiwan, R.O.C.
DJ1 Calpella UMA X01Thermal/Audio Block Diagram
Custom
5 90Friday, April 16, 2010
Thermal Block Diagram
ThermalEMC2102
DP1
DN1
SC470P50V3JN-2GP
DP2
DN2
DP3
DN3
Audio Block Diagram
CodecALC269Q_VB5
HPOUT
MICIN
SPEAKER
HP0_PORT_A_L
HP0_PORT_A_R
VREFOUT_A_OR_F
SPKR_PORT_D_L-
SPKR_PORT_D_R+
EMC2102_DP3
EMC2102_DN3
MMBT3904-3-GP
HP1_PORT_B_L
HP1_PORT_B_R
AnalogMIC
PORTC_L
PORTC_R
VREFOUT_C
SC470P50V3JN-2GP
Put under CPU.
EMC2102_DP1
EMC2102_DN1
MMBT3904-3-GPSC470P50V3JN-2GP
Place near CPUand PCH.
MMBT3904-3-GP
System Sensor(UMA only)
EMC2102_DP1
EMC2102_DN1
-
AA
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,Taipei Hsien 221, Taiwan, R.O.C.
DJ1 Calpella UMA X01Table of Content
A3
6 90Friday, April 16, 2010
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,Taipei Hsien 221, Taiwan, R.O.C.
DJ1 Calpella UMA X01Table of Content
A3
6 90Friday, April 16, 2010
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,Taipei Hsien 221, Taiwan, R.O.C.
DJ1 Calpella UMA X01Table of Content
A3
6 90Friday, April 16, 2010
SPKRName Schematics Notes
HAD_DOCK_EN#/GPIO[33]
Low (0):High (1) :
HDA_SDO Weak internal pull-down. Do not pull high.
HDA_SYNC
CFG[0]
CFG[7]
Calpella Schematic Checklist Rev.0_7
INIT3_3V# Weak internal pull-down. Do not pull high.
GNT3#/GPIO55
Default Mode:Low (0) = Top Block Swap Mode
GNT0#,GNT1#/GPIO51
Weak internal pull-down. Do not pull high.
Weak internal pull-down. Do not pull high.
Weak internal pull-up. Do not pull low.
Processor StrappingPCH Strapping
Default (SPI):
GNT2#/GPIO53
Default - Internal pull-up.Low (0)
GPIO33 Default:Disable ME in Manufacturing Mode:
SPI_MOSI
CFG[4] Disabled - No Physical Display Port attached toEmbedded DisplayPort.
CFG[3]
Internal weak Pull-down. Connect to Vcc3_3 with 8.2-k- 10-k weak pull-up resistor.
Enable iTPM:Disable iTPM:
NV_ALE Enable Danbury:
Disable Danbury:
Pin Name
USB TablePCIE Routing
LANE3 LAN
NC_CLE Weak internal pull-up. Do not pull low.
Strap Description Configuration (Default value for each bit is 1 unless specified otherwise)
1:EmbeddedDisplayPortPresence
Calpella Schematic Checklist Rev.0_7
0: Enabled - An external Display Port device isconnected to the Embedded Display Port.
PCI-Express StaticLane Reversal
1:0: Normal Operation. Lane Numbers Reversed 15 -> 0, 14 -> 1, ...
DefaultValue
PCI-ExpressConfigurationSelect
1:0: Single PCI-Express Graphics Bifurcation enabled
Reserved -Temporarily usedfor earlyClarksfieldsamples.
Clarksfield (only for early samples pre-ES1) - Connect to GND with 3.01K Ohm/5% resistorNote: Only temporary for early CFD samples(rPGA/BGA) [For details please refer to the WW33MoW and sighting report].For a common motherboard design (for AUB and CFD),the pull-down resistor should be used. Does notimpact AUB functionality.
1
1
1
0
GPIO15
GPIO8
Reboot option at power-upDefault Mode:No Reboot Mode with TCO Disabled:
Internal pull-up. (Connect to ground with 4.7-k weakpull-down resistor).
INTVRMEN High (1) = Integrated VRM is enabledLow (0) = Integrated VRM is disabled Left both GNT0# and GNT1# floating. No pull uprequired.Boot from PCI: Connect GNT1# to ground with 1-k pull-down resistor. Leave GNT0# Floating.Boot from LPC: Connect both GNT0# and GNT1# to ground with1-k pull-down resistor.
= Configures DMI for ESI compatible operation (for serversonly. Not for mobile/desktops).
Do not pull low. Connect to ground with 1-k pull-down resistor.
Connect to Vcc3_3 with 8.2-k weak pull- up resistor. Left floating, no pull-down required. Connect to Vcc3_3 with 8.2-k weak pull-up resistor. Connect to ground with 4.7-k weak pull-down resistor.
Flash Descriptor Security will be overridden. Flash Descriptor Security will be in effect.
GPIO27 Default = Do not connect (floating)High(1) = Enables the internal VccVRM to have a clean supply foranalog rails. No need to use on-board filter circuit.Low (0) = Disables the VccVRM. Need to use on-board filtercircuits for analog rails.
LANE2 MiniCard WLAN
13 X
X
12 X
WLAN (I/O Board)
USB0 (I/O Board)
10
0
11
USB3
Pair
4
USB
5
2
3
1
Device
X67
89
X
BLUETOOTH
USB2
CARD READER
X
CAMERA
X
-
55
4
4
3
3
2
2
1
1
D D
C C
B B
A A
FSC
CK_PWRGD
CLK_XTAL_OUTCLK_XTAL_IN
CPU_STOP#
CLK_CPU_BCLK1CLK_CPU_BCLK1#
CLK_IN_DMICLK_IN_DMI#
CLK_PCIE_SATA1CLK_PCIE_SATA1#
CLK_MCH_DREFCLK1CLK_MCH_DREFCLK1#
CLK_XTAL_INCLK_XTAL_OUT
CK_PWRGDCPU_STOP#
FSC
PCH_SMBCLKPCH_SMBDATA
+3.3V_RUN+3.3V_RUN_SL585 +1.05V_VTT
+1.05V_RUN_SL585_IO
+1.05V_VTT
+3.3V_RUN_SL585
+3.3V_RUN
+3.3V_RUN_SL585 +1.05V_RUN_SL585_IO
CLKIN_DMI#23CLKIN_DMI23
CLK_CPU_BCLK23CLK_CPU_BCLK#23
CLK_PCIE_SATA23CLK_PCIE_SATA#23
DREFCLK#23DREFCLK23
CLK_PCH_14M 23
PCH_SMBDATA 18,19,23,76PCH_SMBCLK 18,19,23,76
VR_CLKEN# 47
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,Taipei Hsien 221, Taiwan, R.O.C.
DJ1 Calpella UMA X01Clock Generator SLG8SP585
7 90Thursday, April 22, 2010
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,Taipei Hsien 221, Taiwan, R.O.C.
DJ1 Calpella UMA X01Clock Generator SLG8SP585
7 90Thursday, April 22, 2010
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,Taipei Hsien 221, Taiwan, R.O.C.
DJ1 Calpella UMA X01Clock Generator SLG8SP585
7 90Thursday, April 22, 2010
FSC 0 1
133MHz100MHz
(Default)SPEED
SSID = CLOCK
1
2
C715SC12P50V2JN-3GPC715SC12P50V2JN-3GP
1 2
R701
2K2R2J-2-GP
R701
2K2R2J-2-GP
1 2X701
X-14D31818M-37GP82.30005.901
X701
X-14D31818M-37GP82.30005.901
1
2
EC701SC4D7P50V2CN-1GP
DYEC701
SC4D7P50V2CN-1GP
DY
V
D
D
_
D
O
T
1
V
S
S
_
D
O
T
2
DOT_963DOT_96#4
V
D
D
_
2
7
5
27MHZ 627MHZ_SS 7
V
S
S
_
2
7
8
V
S
S
_
S
A
T
A
9
SRC_1/SATA10SRC_1/SATA#11
V
S
S
_
S
R
C
1
2
SRC_213SRC_2#14
V
D
D
_
S
R
C
_
I
O
1
5
CPU_STOP# 16
V
D
D
_
S
R
C
1
7
V
D
D
_
C
P
U
_
I
O
1
8
CPU_1#19CPU_120
V
S
S
_
C
P
U
2
1
CPU_0#22CPU_023
V
D
D
_
C
P
U
2
4
CKPWRGD/PD# 25
V
S
S
_
R
E
F
2
6
XTAL_OUT 27XTAL_IN 28
V
D
D
_
R
E
F
2
9
REF_0/CPU_SEL 30
SDA 31SCL 32
G
N
D
3
3
U701
SLG8SP585VTR-GP
U701
SLG8SP585VTR-GP
1
2
C701
SC1U
10V2KX-1G
P
DYC701
SC1U
10V2KX-1G
P
DY
12 3
4
RN
0R4P2R-PADRN702
RN
0R4P2R-PADRN702
12 3
4
RN
0R4P2R-PADRN703
RN
0R4P2R-PADRN703
12 3
4
RN
0R4P2R-PADRN704
RN
0R4P2R-PADRN704
1
2
C703
SCD1U
16V2ZY-2G
P
C703
SCD1U
16V2ZY-2G
P
1
2
C707
SCD1U
16V2ZY-2G
P
C707
SCD1U
16V2ZY-2G
P
1
2
R70510KR2J-3-GP
R70510KR2J-3-GP
1
2
C702
SC10U
10V5ZY-1G
P
DYC702
SC10U
10V5ZY-1G
P
DY
1
2
C711
SCD1U
16V2ZY-2G
P
C711
SCD1U
16V2ZY-2G
P
1 2R7090R0603-PAD-1-GP
R7090R0603-PAD-1-GP
G
S
D
. . .
.
.
Q7012N7002E-1-GP
. . .
.
.
Q7012N7002E-1-GP
1
2
C705
SCD1U
16V2ZY-2G
P
C705
SCD1U
16V2ZY-2G
P
1
2
R7044K7R2J-2-GPDYR7044K7R2J-2-GPDY
1 2R7080R0603-PAD-1-GP
R7080R0603-PAD-1-GP
1
2
R70710KR2J-3-GPR70710KR2J-3-GP
1
2
C704
SCD1U
16V2ZY-2G
P
C704
SCD1U
16V2ZY-2G
P
1
2
C709
SC1U
10V2KX-1G
P
DYC709
SC1U
10V2KX-1G
P
DY
12 3
4
RN
0R4P2R-PADRN701
RN
0R4P2R-PADRN701
1
2
C708
SCD1U
16V2ZY-2G
P
C708
SCD1U
16V2ZY-2G
P
1
2
C710
SC10U
10V5ZY-1G
P
C710
SC10U
10V5ZY-1G
P
1
2
C712
SCD1U
16V2ZY-2G
P
C712
SCD1U
16V2ZY-2G
P
12
R70333R2J-2-GPR70333R2J-2-GP
1
2
C714SC12P50V2JN-3GP
C714SC12P50V2JN-3GP
-
55
4
4
3
3
2
2
1
1
D D
C C
B B
A A
EXP_RBIAS
PEG_IRCOMP_R
DMI_PTX_CRXN022
DMI_CTX_PRXN022
DMI_PTX_CRXN122DMI_PTX_CRXN222DMI_PTX_CRXN322
DMI_PTX_CRXP022DMI_PTX_CRXP122DMI_PTX_CRXP222DMI_PTX_CRXP322
DMI_CTX_PRXN122DMI_CTX_PRXN222DMI_CTX_PRXN322
DMI_CTX_PRXP022DMI_CTX_PRXP122DMI_CTX_PRXP222DMI_CTX_PRXP322
FDI_TXN022FDI_TXN122FDI_TXN222FDI_TXN322FDI_TXN422FDI_TXN522FDI_TXN622FDI_TXN722
FDI_TXP022FDI_TXP122FDI_TXP222FDI_TXP322FDI_TXP422FDI_TXP522FDI_TXP622FDI_TXP722
FDI_FSYNC022FDI_FSYNC122
FDI_LSYNC022FDI_LSYNC122
FDI_INT22
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,Taipei Hsien 221, Taiwan, R.O.C.
DJ1 Calpella UMA X01CPU (PCIE/DMI/FDI)
8 90Thursday, April 22, 2010
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,Taipei Hsien 221, Taiwan, R.O.C.
DJ1 Calpella UMA X01CPU (PCIE/DMI/FDI)
8 90Thursday, April 22, 2010
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,Taipei Hsien 221, Taiwan, R.O.C.
DJ1 Calpella UMA X01CPU (PCIE/DMI/FDI)
8 90Thursday, April 22, 2010
Main:62.10053.6012nd :62.10040.6113rd :62.10055.321
SSID = CPU
1 2R801 49D9R2F-GPR801 49D9R2F-GP
1 2R802 750R2F-GPR802 750R2F-GP
DMI_RX0#A24DMI_RX1#C23DMI_RX2#B22DMI_RX3#A21
DMI_RX0B24DMI_RX1D23DMI_RX2B23DMI_RX3A22
DMI_TX0#D24DMI_TX1#G24DMI_TX2#F23DMI_TX3#H23
DMI_TX0D25DMI_TX1F24
DMI_TX3G23DMI_TX2E23
FDI_TX0#E22FDI_TX1#D21FDI_TX2#D19FDI_TX3#D18FDI_TX4#G21FDI_TX5#E19FDI_TX6#F21FDI_TX7#G18
FDI_TX0D22FDI_TX1C21FDI_TX2D20FDI_TX3C18FDI_TX4G22FDI_TX5E20FDI_TX6F20FDI_TX7G19
FDI_FSYNC0F17FDI_FSYNC1E17
FDI_INTC17
FDI_LSYNC0F18FDI_LSYNC1D17
PEG_ICOMPI B26PEG_ICOMPO A26
PEG_RBIAS A25PEG_RCOMPO B27
PEG_RX0# K35PEG_RX1# J34PEG_RX2# J33PEG_RX3# G35PEG_RX4# G32PEG_RX5# F34PEG_RX6# F31PEG_RX7# D35PEG_RX8# E33PEG_RX9# C33
PEG_RX10# D32PEG_RX11# B32PEG_RX12# C31PEG_RX13# B28PEG_RX14# B30PEG_RX15# A31
PEG_RX0 J35PEG_RX1 H34PEG_RX2 H33PEG_RX3 F35PEG_RX4 G33PEG_RX5 E34PEG_RX6 F32PEG_RX7 D34PEG_RX8 F33PEG_RX9 B33
PEG_RX10 D31PEG_RX11 A32PEG_RX12 C30PEG_RX13 A28PEG_RX14 B29PEG_RX15 A30
PEG_TX0# L33PEG_TX1# M35PEG_TX2# M33PEG_TX3# M30PEG_TX4# L31PEG_TX5# K32PEG_TX6# M29PEG_TX7# J31PEG_TX8# K29PEG_TX9# H30
PEG_TX10# H29PEG_TX11# F29PEG_TX12# E28PEG_TX13# D29PEG_TX14# D27PEG_TX15# C26
PEG_TX0 L34PEG_TX1 M34PEG_TX2 M32PEG_TX3 L30PEG_TX4 M31PEG_TX5 K31PEG_TX6 M28PEG_TX7 H31PEG_TX8 K28PEG_TX9 G30
PEG_TX10 G29PEG_TX11 F28PEG_TX12 E27PEG_TX13 D28PEG_TX14 C27PEG_TX15 C25
P
C
I
E
X
P
R
E
S
S
-
-
G
R
A
P
H
I
C
S
DMI
Int
el(R)
FDI
1 OF 9
A
U
B
U
R
N
D
A
L
E
CPU1A
P
C
I
E
X
P
R
E
S
S
-
-
G
R
A
P
H
I
C
S
DMI
Int
el(R)
FDI
1 OF 9
A
U
B
U
R
N
D
A
L
E
CPU1A
-
55
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PEG_CLK#_RPEG_CLK_R
VDDPWRGOOD_R
BCLK_CPU_P_RBCLK_CPU_N_R
H_COMP3
H_COMP2
H_COMP1
H_COMP0
SKTOCC#_R
H_CATERR#
H_CATERR#
H_CPURST#
PLT_RST#_R
BCLK_ITP_PBCLK_ITP_N
SM_DRAMRST#
SM_RCOMP_0SM_RCOMP_1SM_RCOMP_2
H_PWRGD_XDP
SM_RCOMP_2
SM_RCOMP_1
SM_RCOMP_0
PM_EXTTS#1_C
XDP_TDI_R
XDP_TDO_M
XDP_TDI_M
XDP_TDO_R
XDP_TDI
XDP_TDO
XDP_TRST#
XDP_TCLK
XDP_PREQ#
XDP_TDI_R
XDP_TMS
H_CPURST#
XDP_PRDY#XDP_PREQ#
XDP_TCLKXDP_TMS
XDP_TDI_RXDP_TDO_RXDP_TDI_MXDP_TDO_M
H_DBR#_R
XDP_TRST#
XDP_DBRESET#
XDP_OBS0XDP_OBS1
XDP_OBS3XDP_OBS2
XDP_OBS5XDP_OBS4
XDP_OBS7XDP_OBS6
XDP_OBS1
XDP_OBS5
H_CPUPWRGD_XDP
XDP_TDI
XDP_RST#_R
XDP_TDO
XDP_OBS2
XDP_TMS
BCLK_ITP_N
XDP_OBS6
H_PWRGDPM_PWRBTN#_XDP
XDP_PRDY#
XDP_OBS3
XDP_OBS7
PCIE_CLK_XDP_P
BCLK_ITP_P
XDP_TRST#
XDP_OBS0
H_PWRGD_XDP
XDP_OBS4
H_CPURST#XDP_RST#_R
XDP_PREQ#
PM_EXTTS#0_C
XDP_TCLK
VCCPWRGOOD
H_PROCHOT#
SM_DRAMRST#
VTT_PWRGD_R3 VDDPWRGOOD_R
VDDPWRGOOD_R
+1.05V_VTT
+1.05V_VTT
+1.05V_VTT
+1.05V_VTT
+1.05V_VTT
+3.3V_RUN
+1.5V_RUN
+1.5V_SUS
CLK_EXP_N 23CLK_EXP_P 23
H_PM_SYNC22
PM_DRAM_PWRGD22
BCLK_CPU_P 25BCLK_CPU_N 25
H_PECI25
H_PWRGD25,42
PLT_RST#21,37,70,76
H_VTTPWRGD49
PM_EXTTS#1 19
SML0_DATA23
XDP_DBRESET# 22
PM_PWRBTN#_R22
PLT_RST# 21,37,70,76
H_THERMTRIP#25,37,42
PM_EXTTS#0 18
SML0_CLK23
VTT_PWRGD37,42,49
H_PROCHOT#47
PM_EXTTS#0_C 53
DDR3_DRAMRST# 18,19
DDR_RST_GATE 25
VDDPWRGOOD_KBC37
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,Taipei Hsien 221, Taiwan, R.O.C.
DJ1 Calpella UMA X01CPU (THERMAL/CLOCK/PM )
9 90Thursday, April 22, 2010
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,Taipei Hsien 221, Taiwan, R.O.C.
DJ1 Calpella UMA X01CPU (THERMAL/CLOCK/PM )
9 90Thursday, April 22, 2010
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,Taipei Hsien 221, Taiwan, R.O.C.
DJ1 Calpella UMA X01CPU (THERMAL/CLOCK/PM )
9 90Thursday, April 22, 2010
Processor Compensation SignalsProcessor Pullups
DDR3 Compensation Signals
Scan Chain (Default)
Stuff --> R921, R924, R926No Stuff --> R922, R925
CPU Only
GMCH Only
Stuff --> R921, R922No Stuff --> R924, R926, R925Stuff --> R926, R925No Stuff --> R921, R922, R924
JTAG MAPPING
SSID = CPU
1119
No Stuff1.27k 3k
0.75kS3 circuitR920R919
1.1kNormal
1 2R910 24D9R2F-L-GPR910 24D9R2F-L-GP
1
2
C915SCD047U16V2ZY-1GP
C915SCD047U16V2ZY-1GP
12 3
4
RN
0R4P2R-PADRN906
RN
0R4P2R-PADRN906
1 2R903 20R2F-GPR903 20R2F-GP
1
2
C902SCD1U16V2KX-3GPDYC902SCD1U16V2KX-3GPDY
123
4RN905
SRN10KJ-5-GP
RN905
SRN10KJ-5-GP
1 2R933 68R2-GPR933 68R2-GP
1 2R911 130R2F-1-GPR911 130R2F-1-GP
1 2R921 0R2J-2-GPDYR921 0R2J-2-GPDY
G
S
D....
.
Q901
2N7002E-1-GP
....
.
Q901
2N7002E-1-GP
1 2R902 49D9R2F-GPR902 49D9R2F-GP
1 2R925 0R2J-2-GPDYR925 0R2J-2-GPDY
1
2
R9191K1R2F-GPDYR9191K1R2F-GPDY
1 2R914 51R2J-2-GPDYR914 51R2J-2-GPDY
12 3
4
RN
0R4P2R-PADRN903
RN
0R4P2R-PADRN903
1 2R930 0R2J-2-GPDYR930 0R2J-2-GPDY
1
2
R937750R2F-GPR937750R2F-GP
1 2R931 1KR2J-1-GPDYR931 1KR2J-1-GPDY
1 2R907 100R2F-L1-GP-UR907 100R2F-L1-GP-U
1 2R926
0R0402-PAD
R926
0R0402-PAD
1 2
R977
1K6R2F-GP
R977
1K6R2F-GP
1 2R917 51R2J-2-GPDYR917 51R2J-2-GPDY
1 2R918 51R2J-2-GPDYR918 51R2J-2-GPDY
1 2R935 0R2J-2-GPDYR935 0R2J-2-GPDY
B1
A2
GND3Y 4
VCC 5
U927
74LVC1G08GW-1-GP
U927
74LVC1G08GW-1-GP
1 2R932 0R2J-2-GPDYR932 0R2J-2-GPDY
1 2
3 45 67 89 10
11 1213 1415 1617 1819 2021 2223 2425 2627 2829 3031 3233 3435 3637 3839 4041 4243 4445 4647 4849 5051 5253 5455 5657 5859 60
64
61NP1
NP2
62
63
XDP1
PAD-60P-GP
DY
XDP1
PAD-60P-GP
DY
1 2
R913
1K6R2F-GP
R913
1K6R2F-GP
1 2R906 49D9R2F-GPR906 49D9R2F-GP
1 2R9080R0402-PAD
R9080R0402-PAD
SM_RCOMP1 AM1SM_RCOMP2 AN1
SM_DRAMRST# F6
SM_RCOMP0 AL1
BCLK# B16BCLK A16
BCLK_ITP# AT30BCLK_ITP AR30
PEG_CLK# D16PEG_CLK E16
DPLL_REF_SSCLK# A17DPLL_REF_SSCLK A18
CATERR#AK14
COMP3AT23
PECIAT15
PROCHOT#AN26
THERMTRIP#AK15
RESET_OBS#AP26
VCCPWRGOOD_1AN14
VCCPWRGOOD_0AN27
SM_DRAMPWROKAK13
VTTPWRGOODAM15
RSTIN#AL14
PM_EXT_TS0# AN15PM_EXT_TS1# AP15
PRDY# AT28PREQ# AP27
TCK AN28TMS AP28
TRST# AT27
TDI AT29TDO AR27
TDI_M AR29TDO_M AP29
DBR# AN25
BPM0# AJ22BPM1# AK22BPM2# AK24BPM3# AJ24BPM4# AJ25BPM5# AH22BPM6# AK23BPM7# AH23
COMP2AT24
PM_SYNCAL15
TAPPWRGOODAM26
COMP1G16
COMP0AT26
SKTOCC#AH24
C
L
O
C
K
S
MISC
THERMAL
PWR MANAG
EMENT
D
D
R
3
M
I
S
C
J
T
A
G
&
B
P
M
2 OF 9
A
U
B
U
R
N
D
A
L
E
CPU1B
C
L
O
C
K
S
MISC
THERMAL
PWR MANAG
EMENT
D
D
R
3
M
I
S
C
J
T
A
G
&
B
P
M
2 OF 9
A
U
B
U
R
N
D
A
L
E
CPU1B
1 2
R978
1K6R2F-GPDYR978
1K6R2F-GPDY
1
2
R92851R2J-2-GPR92851R2J-2-GP
1
2
R9341KR2J-1-GPR9341KR2J-1-GP
1 2R901 20R2F-GPR901 20R2F-GP
1 2R909
0R0402-PAD
R909
0R0402-PAD
1 2R9120R0402-PAD
R9120R0402-PAD
1 2R904 68R2-GPDYR904 68R2-GPDY
1 2R929 0R2J-2-GPDYR929 0R2J-2-GPDY
1 2R927 1KR2J-1-GPDYR927 1KR2J-1-GPDY
1
2
C901SCD1U16V2KX-3GPDY
C901SCD1U16V2KX-3GPDY
12 3
4
RN
0R4P2R-PADRN901
RN
0R4P2R-PADRN901
1
2
C903SCD1U10V2KX-5GPC903SCD1U10V2KX-5GP
1
2
R9240R0402-PADR9240R0402-PAD
1
2
R915750R2F-GPR915750R2F-GP
1 2R916 51R2J-2-GPDYR916 51R2J-2-GPDY
1
2
R92351R2J-2-GPR92351R2J-2-GP
1TP901TPAD14-GP TP901TPAD14-GP
1 2R905 49D9R2F-GPR905 49D9R2F-GP
1 2R922 0R2J-2-GPDYR922 0R2J-2-GPDY
1 2
R988100KR2J-1-GPR988100KR2J-1-GP
-
55
4
4
3
3
2
2
1
1
D D
C C
B B
A A
M_A_DQ44
M_A_DQ36
M_A_DQ47
M_A_DQ40M_A_DQ39
M_A_DQ37
M_A_DQ35M_A_DQ34
M_A_DQ59
M_A_DQ54M_A_DQ53
M_A_DQ63
M_A_DQ60M_A_DQ61
M_A_DQ58
M_A_DQ51
M_A_DQ48
M_A_DQ57
M_A_DQ55
M_A_DQ49M_A_DQ50
M_A_DQ62
M_A_DQ52
M_A_DQ56
M_A_DQ[63..0]M_A_DQ0M_A_DQ1M_A_DQ2M_A_DQ3
M_A_DQ7
M_A_DQ5M_A_DQ4
M_A_DQ6
M_A_DQ12
M_A_DQ10
M_A_DQ13
M_A_DQ9M_A_DQ8
M_A_DQ11
M_A_DQ15M_A_DQ14
M_A_DQ27
M_A_DQ25
M_A_DQ20M_A_DQ19
M_A_DQ30
M_A_DQ18
M_A_DQ16
M_A_DQ28
M_A_DQ17
M_A_DQ26
M_A_DQ31
M_A_DQ29
M_A_DQ22M_A_DQ23M_A_DQ24
M_A_DQ21
M_A_DQ46
M_A_DQ42
M_A_DQ38
M_A_DQ32
M_A_DQ45
M_A_DQ33
M_A_DQ43
M_A_DQ41
M_A_DM0M_A_DM1M_A_DM2M_A_DM3M_A_DM4M_A_DM5M_A_DM6M_A_DM7
M_A_A0
M_A_A6
M_A_A3
M_A_A5
M_A_A7
M_A_A1M_A_A2
M_A_A4
M_A_A10
M_A_A8
M_A_A13
M_A_A11
M_A_A9
M_A_A12
M_A_A14M_A_A15
M_B_DQ0M_B_DQ1M_B_DQ2M_B_DQ3M_B_DQ4M_B_DQ5M_B_DQ6M_B_DQ7M_B_DQ8M_B_DQ9M_B_DQ10M_B_DQ11
M_B_DQ15
M_B_DQ13M_B_DQ12
M_B_DQ14
M_B_DQ16M_B_DQ17M_B_DQ18M_B_DQ19
M_B_DQ23
M_B_DQ21M_B_DQ20
M_B_DQ22
M_B_DQ28
M_B_DQ26
M_B_DQ29
M_B_DQ25
M_B_DQ31
M_B_DQ24
M_B_DQ27
M_B_DQ30
M_B_DQ32M_B_DQ33M_B_DQ34M_B_DQ35
M_B_DQ39
M_B_DQ37M_B_DQ36
M_B_DQ38
M_B_DQ44
M_B_DQ42
M_B_DQ45
M_B_DQ41
M_B_DQ47
M_B_DQ40
M_B_DQ43
M_B_DQ46
M_B_DQ48M_B_DQ49M_B_DQ50M_B_DQ51
M_B_DQ55
M_B_DQ53M_B_DQ52
M_B_DQ54
M_B_DQ60
M_B_DQ58
M_B_DQ61
M_B_DQ57
M_B_DQ63
M_B_DQ56
M_B_DQ59
M_B_DQ62
M_B_DQ[63..0]
M_B_A12
M_B_A9
M_B_A11
M_B_A13
M_B_A8
M_B_A10
M_B_A0M_B_A1M_B_A2M_B_A3M_B_A4M_B_A5M_B_A6M_B_A7
M_B_DM0M_B_DM1M_B_DM2M_B_DM3M_B_DM4M_B_DM5M_B_DM6M_B_DM7
M_B_A14
M_A_DQS#0
M_A_DQS#3
M_A_DQS#6
M_A_DQS#4
M_A_DQS#1M_A_DQS#2
M_A_DQS#5
M_A_DQS#7
M_A_DQS5
M_A_DQS7
M_A_DQS2M_A_DQS3M_A_DQS4
M_A_DQS0M_A_DQS1
M_A_DQS6
M_B_A15
M_B_DQS#0M_B_DQS#1M_B_DQS#2M_B_DQS#3M_B_DQS#4M_B_DQS#5M_B_DQS#6M_B_DQS#7
M_B_DQS0M_B_DQS1M_B_DQS2M_B_DQS3M_B_DQS4M_B_DQS5M_B_DQS6M_B_DQS7
M_A_DQ[63..0]18
M_B_DQ[63..0]19M_CLK_DDR0 18M_CLK_DDR#0 18M_CKE0 18
M_CS#1 18M_CS#0 18
M_CLK_DDR1 18M_CLK_DDR#1 18M_CKE1 18
M_ODT1 18M_ODT0 18
M_CLK_DDR2 19M_CLK_DDR#2 19M_CKE2 19
M_CS#3 19M_CS#2 19
M_ODT3 19M_ODT2 19
M_CLK_DDR3 19M_CLK_DDR#3 19M_CKE3 19
M_A_BS018M_A_BS118M_A_BS218
M_B_BS019M_B_BS119M_B_BS219
M_A_CAS#18M_A_RAS#18M_A_WE#18
M_B_CAS#19M_B_RAS#19M_B_WE#19
M_A_DM[7..0] 18M_A_DQS#[7..0] 18
M_A_DQS[7..0] 18M_A_A[15..0] 18
M_B_DQS#[7..0] 19M_B_DM[7..0] 19
M_B_DQS[7..0] 19M_B_A[15..0] 19
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,Taipei Hsien 221, Taiwan, R.O.C.
DJ1 Calpella UMA X01CPU (DDR)
10 90Thursday, April 22, 2010
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,Taipei Hsien 221, Taiwan, R.O.C.
DJ1 Calpella UMA X01CPU (DDR)
10 90Thursday, April 22, 2010
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,Taipei Hsien 221, Taiwan, R.O.C.
DJ1 Calpella UMA X01CPU (DDR)
10 90Thursday, April 22, 2010
SSID = CPU
SA_BS0AC3SA_BS1AB2SA_BS2U7
SA_CAS#AE1SA_RAS#AB3SA_WE#AE9
SA_CK0 AA6
SA_CK1 Y6
SA_CK0# AA7
SA_CK1# Y5
SA_CKE0 P7
SA_CKE1 P6
SA_CS0# AE2SA_CS1# AE8
SA_ODT0 AD8SA_ODT1 AF9
SA_DM0 B9SA_DM1 D7SA_DM2 H7SA_DM3 M7SA_DM4 AG6SA_DM5 AM7SA_DM6 AN10SA_DM7 AN13
SA_DQS0 C8
SA_DQS0# C9
SA_DQS1 F9
SA_DQS1# F8
SA_DQS2 H9
SA_DQS2# J9
SA_DQS3 M9
SA_DQS3# N9
SA_DQS4 AH8
SA_DQS4# AH7
SA_DQS5 AK10
SA_DQS5# AK9
SA_DQS6 AN11
SA_DQS6# AP11
SA_DQS7 AR13
SA_DQS7# AT13
SA_MA0 Y3SA_MA1 W1SA_MA2 AA8SA_MA3 AA3SA_MA4 V1SA_MA5 AA9SA_MA6 V8SA_MA7 T1SA_MA8 Y9SA_MA9 U6
SA_MA10 AD4SA_MA11 T2SA_MA12 U3SA_MA13 AG8SA_MA14 T3SA_MA15 V9
SA_DQ0A10SA_DQ1C10SA_DQ2C7SA_DQ3A7SA_DQ4B10SA_DQ5D10SA_DQ6E10SA_DQ7A8SA_DQ8D8SA_DQ9F10SA_DQ10E6SA_DQ11F7SA_DQ12E9SA_DQ13B7SA_DQ14E7SA_DQ15C6SA_DQ16H10SA_DQ17G8SA_DQ18K7SA_DQ19J8SA_DQ20G7SA_DQ21G10SA_DQ22J7SA_DQ23J10SA_DQ24L7SA_DQ25M6SA_DQ26M8SA_DQ27L9SA_DQ28L6SA_DQ29K8SA_DQ30N8SA_DQ31P9SA_DQ32AH5SA_DQ33AF5SA_DQ34AK6SA_DQ35AK7SA_DQ36AF6SA_DQ37AG5SA_DQ38AJ7SA_DQ39AJ6SA_DQ40AJ10SA_DQ41AJ9SA_DQ42AL10SA_DQ43AK12SA_DQ44AK8SA_DQ45AL7SA_DQ46AK11SA_DQ47AL8SA_DQ48AN8SA_DQ49AM10SA_DQ50AR11SA_DQ51AL11SA_DQ52AM9SA_DQ53AN9SA_DQ54AT11SA_DQ55AP12SA_DQ56AM12SA_DQ57AN12SA_DQ58AM13SA_DQ59AT14SA_DQ60AT12SA_DQ61AL13SA_DQ62AR14SA_DQ63AP14
D
D
R
S
Y
S
T
E
M
M
E
M
O
R
Y
A
3 OF 9
A
U
B
U
R
N
D
A
L
E
CPU1C
D
D
R
S
Y
S
T
E
M
M
E
M
O
R
Y
A
3 OF 9
A
U
B
U
R
N
D
A
L
E
CPU1C
SB_BS0AB1SB_BS1W5SB_BS2R7
SB_CAS#AC5SB_RAS#Y7SB_WE#AC6
SB_CK0 W8
SB_CK1 V7
SB_CK0# W9
SB_CK1# V6
SB_CKE0 M3
SB_CKE1 M2
SB_CS0# AB8SB_CS1# AD6
SB_ODT0 AC7SB_ODT1 AD1
SB_DM0 D4SB_DM1 E1SB_DM2 H3SB_DM3 K1SB_DM4 AH1SB_DM5 AL2SB_DM6 AR4SB_DM7 AT8
SB_DQS4 AG2
SB_DQS4# AH2
SB_DQS5 AL5
SB_DQS5# AL4
SB_DQS6 AP5
SB_DQS6# AR5
SB_DQS7 AR7
SB_DQS7# AR8
SB_DQS0 C5
SB_DQS0# D5
SB_DQS1 E3
SB_DQS1# F4
SB_DQS2 H4
SB_DQS2# J4
SB_DQS3 M5
SB_DQS3# L4
SB_MA0 U5SB_MA1 V2SB_MA2 T5SB_MA3 V3SB_MA4 R1SB_MA5 T8SB_MA6 R2SB_MA7 R6SB_MA8 R4SB_MA9 R5
SB_MA10 AB5SB_MA11 P3SB_MA12 R3SB_MA13 AF7SB_MA14 P5SB_MA15 N1
SB_DQ0B5SB_DQ1A5SB_DQ2C3SB_DQ3B3SB_DQ4E4SB_DQ5A6SB_DQ6A4SB_DQ7C4SB_DQ8D1SB_DQ9D2SB_DQ10F2SB_DQ11F1SB_DQ12C2SB_DQ13F5SB_DQ14F3SB_DQ15G4SB_DQ16H6SB_DQ17G2SB_DQ18J6SB_DQ19J3SB_DQ20G1SB_DQ21G5SB_DQ22J2SB_DQ23J1SB_DQ24J5SB_DQ25K2SB_DQ26L3SB_DQ27M1SB_DQ28K5SB_DQ29K4SB_DQ30M4SB_DQ31N5SB_DQ32AF3SB_DQ33AG1SB_DQ34AJ3SB_DQ35AK1SB_DQ36AG4SB_DQ37AG3SB_DQ38AJ4SB_DQ39AH4SB_DQ40AK3SB_DQ41AK4SB_DQ42AM6SB_DQ43AN2SB_DQ44AK5SB_DQ45AK2SB_DQ46AM4SB_DQ47AM3SB_DQ48AP3SB_DQ49AN5SB_DQ50AT4SB_DQ51AN6SB_DQ52AN4SB_DQ53AN3SB_DQ54AT5SB_DQ55AT6SB_DQ56AN7SB_DQ57AP6SB_DQ58AP8SB_DQ59AT9SB_DQ60AT7SB_DQ61AP9SB_DQ62AR10SB_DQ63AT10
D
D
R
S
Y
S
T
E
M
M
E
M
O
R
Y
-
B
4 OF 9
A
U
B
U
R
N
D
A
L
E
CPU1D
D
D
R
S
Y
S
T
E
M
M
E
M
O
R
Y
-
B
4 OF 9
A
U
B
U
R
N
D
A
L
E
CPU1D
-
55
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CFG0
CFG0
CFG4
CFG7
CFG3
SA_DIMM_VREF#SB_DIMM_VREF#
CFG3
CFG7
CFG4
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,Taipei Hsien 221, Taiwan, R.O.C.
DJ1 Calpella UMA X01CPU (RESERVED)
11 90Friday, April 16, 2010
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,Taipei Hsien 221, Taiwan, R.O.C.
DJ1 Calpella UMA X01CPU (RESERVED)
11 90Friday, April 16, 2010
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,Taipei Hsien 221, Taiwan, R.O.C.
DJ1 Calpella UMA X01CPU (RESERVED)
11 90Friday, April 16, 2010
PCI-Express Configuration Select
CFG01:Single PEG0:Bifurcation enabled
CFG4 - Display Port Presence
CFG41:Disabled; No Physical Display Portattached to Embedded Display Port0:Enabled; An external Display Portdevice is connected to the EmbeddedDisplay Port
VSS (AP34) can be left NC isCRB implementation; EDS/DGrecommendation to GND.
CFG7(Reserved) - Temporarily used for early Clarksfield samples.
CFG7 Clarksfield (only for early samples pre-ES1) -Connect to GND with 3.01K Ohm/5% resistor.
Note: Only temporary for early CFD sample(rPGA/BGA) [For details please refer to theWW33 MoW and sighting report].For a common M/B design (for AUB and CFD),the pull-down resistor shouble be used. Doesnot impact AUB functionality.
CFG3 - PCI-Express Static Lane Reversal
CFG31 :Normal Operation0 :Lane Numbers Reversed15 -> 0, 14 -> 1, ...
SSID = CPU
1
2
R11023KR2J-2-GPDYR11023KR2J-2-GPDY
1
2
R11043KR2F-GPDYR11043KR2F-GPDY
1
2
R11013KR2F-GPDYR11013KR2F-GPDY
1
2
R11033KR2F-GPDYR11033KR2F-GPDY
CFG0AM30CFG1AM28CFG2AP31CFG3AL32CFG4AL30CFG5AM31CFG6AN29CFG7AM32CFG8AK32CFG9AK31CFG10AK28CFG11AJ28CFG12AN30CFG13AN32CFG14AJ32CFG15AJ29CFG16AJ30CFG17AK30
RSVD#AH25 AH25RSVD#AK26 AK26
RSVD#AJ26 AJ26RSVD#AJ27 AJ27
RSVD_TP#H16H16
RSVD#AL28 AL28RSVD#AL29 AL29RSVD#AP30 AP30RSVD#AP32 AP32RSVD#AL27 AL27RSVD#AT31 AT31RSVD#AT32 AT32RSVD#AP33 AP33RSVD#AR33 AR33
RSVD#AR32 AR32
RSVD#J28J28RSVD#J29J29
RSVD#A19A19RSVD#B19B19
RSVD#A20A20RSVD#B20B20
RSVD#T9T9RSVD#U9U9
RSVD#AB9AB9RSVD#AC9AC9
RSVD_TP#AA5 AA5RSVD_TP#AA4 AA4
RSVD_TP#R8 R8
RSVD_TP#AA2 AA2RSVD_TP#AA1 AA1
RSVD_TP#R9 R9
RSVD_TP#AD3 AD3
RSVD_TP#AG7 AG7
RSVD_TP#AD2 AD2
RSVD_TP#AE3 AE3
RSVD_TP#V4 V4RSVD_TP#V5 V5RSVD_TP#N2 N2
RSVD_TP#W3 W3RSVD_TP#W2 W2RSVD_TP#N3 N3
RSVD_TP#AD5 AD5
RSVD_TP#AE5 AE5
RSVD_TP#AD7 AD7
RSVD_TP#AD9 AD9
RSVD#AL26 AL26
RSVD#AP25AP25RSVD#AL25AL25RSVD#AL24AL24RSVD#AL22AL22RSVD#AJ33AJ33RSVD#AG9AG9RSVD#M27M27RSVD#L28L28SA_DIMM_VREF#J17SB_DIMM_VREF#H17RSVD#G25G25RSVD#G17G17RSVD#E31E31RSVD#E30E30
RSVD#AJ13 AJ13RSVD#AJ12 AJ12
RSVD_TP#E15 E15RSVD_TP#F15 F15
KEY A2RSVD#D15 D15RSVD#C15 C15
RSVD#AJ15 AJ15RSVD#AH15 AH15
VSS AP34
RSVD_NCTF#AR2 AR2
R
E
S
E
R
V
E
D
5 OF 9
A
U
B
U
R
N
D
A
L
E
CPU1E
R
E
S
E
R
V
E
D
5 OF 9
A
U
B
U
R
N
D
A
L
E
CPU1E
1TP1116TP11161TP1117TP1117
-
55
4
4
3
3
2
2
1
1
D D
C C
B B
A A
H_VID6
H_VID0H_VID1H_VID2H_VID3H_VID4H_VID5
H_VTTVID1
TP_VSS_SENSE_VTT
+VCC_CORE
+1.05V_VTT
+1.05V_VTT
+1.05V_VTT
+VCC_CORE
+VCC_CORE
H_VID[6..0] 47
VCC_SENSE 47VSS_SENSE 47
PSI# 47
PM_DPRSLPVR 47
IMVP_IMON 47
VTT_SENSE 49
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,Taipei Hsien 221, Taiwan, R.O.C.
DJ1 Calpella UMA X01CPU (VCC_CORE)
12 90Thursday, April 22, 2010
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,Taipei Hsien 221, Taiwan, R.O.C.
DJ1 Calpella UMA X01CPU (VCC_CORE)
12 90Thursday, April 22, 2010
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,Taipei Hsien 221, Taiwan, R.O.C.
DJ1 Calpella UMA X01CPU (VCC_CORE)
12 90Thursday, April 22, 2010
PROCESSOR CORE POWER
The decoupling capacitors, filterrecommendations and sense resistors on theCPU/PCH Rails are specific to the CRBImplementation. Customers need to follow the recommendations in the Calpella PlatformDesign Guide.
Please note that the VTT RailValues are AuburndaleVTT=1.05V; ClarksfieldVTT=1.1V
H_VTTVID1 = Low, 1.1VH_VTTVID1 = High, 1.05V
48A
SSID = CPU
2010/04/19X01
1
2
C1214
SC10U
6D3V5KX
-1GP
C1214
SC10U
6D3V5KX
-1GP
1
2
C1206
SC10U
6D3V5KX
-1GP
DY
C1206
SC10U
6D3V5KX
-1GP
DY1
2
C1238
SC10U
6D3V5KX
-1GP
DY
C1238
SC10U
6D3V5KX
-1GP
DY
1
2
C1221
SC10U
6D3V5KX
-1GP
C1221
SC10U
6D3V5KX
-1GP
1
2
R1201100R2F-L1-GP-UR1201100R2F-L1-GP-U
1
2
C1209
SC10U
6D3V5KX
-1GP
C1209
SC10U
6D3V5KX
-1GP
1
2
C1212
SC10U
6D3V5KX
-1GP
DY
C1212
SC10U
6D3V5KX
-1GP
DY
1
2
C1234
SC10U
6D3V5M
X-3G
P
DY
C1234
SC10U
6D3V5M
X-3G
P
DY
1
2
C1218
SC10U
6D3V5KX
-1GP
C1218
SC10U
6D3V5KX
-1GP
1
2
R1204100R2F-L1-GP-UR1204100R2F-L1-GP-U
1
2
C1211
SC10U
6D3V5KX
-1GP
C1211
SC10U
6D3V5KX
-1GP
1
2
C1237
SC10U
6D3V5KX
-1GP
DY
C1237
SC10U
6D3V5KX
-1GP
DY
1
2
C1240
SC10U
6D3V5KX
-1GP
C1240
SC10U
6D3V5KX
-1GP
1
2
C1226
SC10U
6D3V5M
X-3G
P
DYC1226
SC10U
6D3V5M
X-3G
P
DY
1
2
C1210
SC10U
6D3V5KX
-1GP
C1210
SC10U
6D3V5KX
-1GP
1
2
C1217
SC10U
6D3V5KX
-1GP
C1217
SC10U
6D3V5KX
-1GP
1
2
C1224
SC10U
6D3V5KX
-1GP
C1224
SC10U
6D3V5KX
-1GP
1
2
C1236
SC10U
6D3V5KX
-1GP
C1236
SC10U
6D3V5KX
-1GP
1
2
C1235
SC10U
6D3V5KX
-1GP
C1235
SC10U
6D3V5KX
-1GP
1
2
C1230
SC10U
6D3V5KX
-1GP
C1230
SC10U
6D3V5KX
-1GP
1
2
C1205
SC10U
6D3V5KX
-1GP
C1205
SC10U
6D3V5KX
-1GP
1
2
C1223
SC10U
6D3V5KX
-1GP
C1223
SC10U
6D3V5KX
-1GP
1
2
C1202
SC10U
6D3V5KX
-1GP
C1202
SC10U
6D3V5KX
-1GP
1
2
C1222
SC10U
6D3V5M
X-3G
P
DYC1222
SC10U
6D3V5M
X-3G
P
DY
1
2
C1229
SC10U
6D3V5M
X-3G
P
C1229
SC10U
6D3V5M
X-3G
P
1
2
C1220
SC10U
6D3V5KX
-1GP
DY
C1220
SC10U
6D3V5KX
-1GP
DY
1
2
C1243
SC10U
6D3V5KX
-1GP
C1243
SC10U
6D3V5KX
-1GP
1
2
C1227
SC10U
6D3V5KX
-1GP
C1227
SC10U
6D3V5KX
-1GP
1
2
C1201
SC10U
6D3V5KX
-1GP
C1201
SC10U
6D3V5KX
-1GP
1
2
C1213
SC10U
6D3V5KX
-1GP
C1213
SC10U
6D3V5KX
-1GP
1
2
C1219
SC10U
10V5ZY-1G
P
DYC1219
SC10U
10V5ZY-1G
P
DY
1
2
C1241
SC10U
6D3V5M
X-3G
P
C1241
SC10U
6D3V5M
X-3G
P
1
2
C1231
SC10U
6D3V5M
X-3G
P
C1231
SC10U
6D3V5M
X-3G
P
1
2
C1232
SC10U
6D3V5KX
-1GP
C1232
SC10U
6D3V5KX
-1GP
1
2
C1225
SC10U
6D3V5KX
-1GP
C1225
SC10U
6D3V5KX
-1GP
1
2
C1216
SC10U
6D3V5KX
-1GP
C1216
SC10U
6D3V5KX
-1GP
1 TP1201TPAD14-GPTP1201TPAD14-GP
1
2
C1208
SC10U
6D3V5KX
-1GP
C1208
SC10U
6D3V5KX
-1GP
1
2
C1233
SC10U
6D3V5KX
-1GP
C1233
SC10U
6D3V5KX
-1GP
1
2
C1203
SC10U
10V5ZY-1G
P
DYC1203
SC10U
10V5ZY-1G
P
DY
ISENSE AN35
VTT_SENSE B15
PSI# AN33
VID0 AK35VID1 AK33VID2 AK34VID3 AL35VID4 AL33VID5 AM33VID6 AM35
PROC_DPRSLPVR AM34
VTT_SELECT G15
VCC_SENSE AJ34
VSS_SENSE_VTT A15
VCCAG35VCCAG34VCCAG33VCCAG32VCCAG31VCCAG30VCCAG29VCCAG28VCCAG27VCCAG26VCCAF35VCCAF34VCCAF33VCCAF32VCCAF31VCCAF30VCCAF29VCCAF28VCCAF27VCCAF26VCCAD35VCCAD34VCCAD33VCCAD32VCCAD31VCCAD30VCCAD29VCCAD28VCCAD27VCCAD26VCCAC35VCCAC34VCCAC33VCCAC32VCCAC31VCCAC30VCCAC29VCCAC28VCCAC27VCCAC26VCCAA35VCCAA34VCCAA33VCCAA32VCCAA31VCCAA30VCCAA29VCCAA28VCCAA27VCCAA26VCCY35VCCY34VCCY33VCCY32VCCY31VCCY30VCCY29VCCY28VCCY27VCCY26VCCV35VCCV34VCCV33VCCV32VCCV31VCCV30VCCV29VCCV28VCCV27VCCV26VCCU35VCCU34VCCU33VCCU32VCCU31VCCU30VCCU29VCCU28VCCU27VCCU26VCCR35VCCR34VCCR33VCCR32VCCR31VCCR30VCCR29VCCR28VCCR27VCCR26VCCP35VCCP34VCCP33VCCP32VCCP31VCCP30VCCP29VCCP28VCCP27VCCP26
VTT0 AF10VTT0 AE10VTT0 AC10VTT0 AB10VTT0 Y10VTT0 W10VTT0 U10VTT0 T10VTT0 J12VTT0 J11
VTT0 AH14VTT0 AH12VTT0 AH11VTT0 AH10VTT0 J14VTT0 J13VTT0 H14VTT0 H12VTT0 G14VTT0 G13VTT0 G12VTT0 G11VTT0 F14VTT0 F13VTT0 F12VTT0 F11VTT0 E14VTT0 E12VTT0 D14VTT0 D13VTT0 D12VTT0 D11VTT0 C14VTT0 C13VTT0 C12VTT0 C11VTT0 B14VTT0 B12VTT0 A14VTT0 A13VTT0 A12VTT0 A11
VSS_SENSE AJ35
VTT0 J16VTT0 J15
P
O
W
E
R
CPU CORE SUPPLY
1
.
1
V
R
A
I
L
P
O
W
E
R
S
E
N
S
E
L
I
N
E
S
C
P
U
V
I
D
S
6 OF 9
A
U
B
U
R
N
D
A
L
E
CPU1F
P
O
W
E
R
CPU CORE SUPPLY
1
.
1
V
R
A
I
L
P
O
W
E
R
S
E
N
S
E
L
I
N
E
S
C
P
U
V
I
D
S
6 OF 9
A
U
B
U
R
N
D
A
L
E
CPU1F
1
2
C1215
SC10U
6D3V5KX
-1GP
DY
C1215
SC10U
6D3V5KX
-1GP
DY1
2
C1242
SC10U
6D3V5KX
-1GP
C1242
SC10U
6D3V5KX
-1GP
1
2
C1207
SC10U
6D3V5KX
-1GP
DY
C1207
SC10U
6D3V5KX
-1GP
DY
1
2
C1204
SC10U
10V5ZY-1G
P
DYC1204
SC10U
10V5ZY-1G
P
DY
1TP1202TPAD14-GPTP1202TPAD14-GP
-
55
4
4
3
3
2
2
1
1
D D
C C
B B
A A
GFX_IMON_C
+1.05V_VTT
+1.5V_RUN
+1.05V_VTT
+1.05V_VTT
+1.8V_RUN
+1.05V_VTT
+1.5V_RUN
+1.5V_SUS
+1.5V_RUN
+1.5V_SUS
+1.5V_RUN
+1.5V_SUS
+1.5V_RUN
+1.5V_SUS+CPU_GFX_CORE
VCC_AXG_SENSE 53VSS_AXG_SENSE 53
GFX_VR_EN 53GFX_DPRSLPVR 53GFX_IMON 53
GFX_VID6 53GFX_VID5 53GFX_VID4 53GFX_VID3 53GFX_VID2 53GFX_VID1 53GFX_VID0 53
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,Taipei Hsien 221, Taiwan, R.O.C.
DJ1 Calpella UMA X01CPU (VCC_GFXCORE)
13 90Thursday, April 22, 2010
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,Taipei Hsien 221, Taiwan, R.O.C.
DJ1 Calpella UMA X01CPU (VCC_GFXCORE)
13 90Thursday, April 22, 2010
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,Taipei Hsien 221, Taiwan, R.O.C.
DJ1 Calpella UMA X01CPU (VCC_GFXCORE)
13 90Thursday, April 22, 2010
Please note that the VTT RailValues are: Auburndale VTT=1.05V
18A
1.35A
3AClarksfield VTT=1.1V
SSID = CPU
425302_425302_Calpella_S3PowerReduction_WhitePapeRevision 0.7
22A
2010/04/19X01
1
2
C1306SC10U6D3V5M
X-3G
P
C1306SC10U6D3V5M
X-3G
P
1
2
C1316SC10U6D3V5KX
-1GP
C1316SC10U6D3V5KX
-1GP
1
2
C1309
SC10U6D3V5M
X-3G
P
C1309
SC10U6D3V5M
X-3G
P
1
2
C1312
SC10U6D3V5M
X-3G
P
C1312
SC10U6D3V5M
X-3G
P
1
2
C1323
SC10U6D3V5M
X-3G
P
C1323
SC10U6D3V5M
X-3G
P
1 2R1304 0R2J-2-GPDYR1304 0R2J-2-GPDY
1
2
C1304SC1U6D3V2KX
-GP
C1304SC1U6D3V2KX
-GP
1
2
C1324
SC10U6D3V5M
X-3G
P
C1324
SC10U6D3V5M
X-3G
P
1
2
C1376SCD1U10V2KX-4GP
DYC1376SCD1U10V2KX-4GP
DY
1
2
C1310
SC10U6D3V5KX
-1GP
C1310
SC10U6D3V5KX
-1GP
1
2
C1313
SC10U6D3V5KX
-1GP
C1313
SC10U6D3V5KX
-1GP
1
2
C1325
SC10U6D3V5M
X-3G
P
C1325
SC10U6D3V5M
X-3G
P
1
2
C1317SC10U6D3V5MX-3GPDY C1317SC10U6D3V5MX-3GPDY
1
2
C1326
SC10U6D3V5M
X-3G
P
C1326
SC10U6D3V5M
X-3G
P
1
2
C1320SC4D
7U6D3V5KX-3G
P
C1320SC4D
7U6D3V5KX-3G
P
1
2
C1301SC1U6D3V2KX
-GP
C1301SC1U6D3V2KX
-GP
1
2
C1377SCD1U10V2KX-4GP
DYC1377SCD1U10V2KX-4GP
DY
1
2
C1311
SC10U6D3V5KX
-1GP
C1311
SC10U6D3V5KX
-1GP
1
2
C1378SCD1U10V2KX-4GP
DYC1378SCD1U10V2KX-4GP
DY
1
2
C1315
SC10U6D3V5KX
-1GP
C1315
SC10U6D3V5KX
-1GP
1
2
C1322SC10U6D3V5MX-3GPC1322SC10U6D3V5MX-3GP
1
2
C1314
S
C
1
0
U
1
0
V
5
K
X
-
2
G
PDYC1314
S
C
1
0
U
1
0
V
5
K
X
-
2
G
PDY
1
2
C1321
SC2D
2U6D3V3KX-G
P
C1321
SC2D
2U6D3V3KX-G
P
GFX_VID0 AM22GFX_VID1 AP22GFX_VID2 AN22GFX_VID3 AP23GFX_VID4 AM23GFX_VID5 AP24GFX_VID6 AN24
GFX_VR_EN AR25GFX_DPRSLPVR AT25
GFX_IMON AM24
VAXG_SENSE AR22VSSAXG_SENSE AT22
VAXG1AT21VAXG2AT19VAXG3AT18VAXG4AT16VAXG5AR21VAXG6AR19VAXG7AR18VAXG8AR16VAXG9AP21VAXG10AP19VAXG11AP18VAXG12AP16VAXG13AN21VAXG14AN19VAXG15AN18VAXG16AN16VAXG17AM21VAXG18AM19VAXG19AM18VAXG20AM16VAXG21AL21VAXG22AL19VAXG23AL18VAXG24AL16VAXG25AK21VAXG26AK19VAXG27AK18VAXG28AK16VAXG29AJ21VAXG30AJ19VAXG31AJ18VAXG32AJ16VAXG33AH21VAXG34AH19VAXG35AH18VAXG36AH16
VTT1J24VTT1J23VTT1H25
VTT1K26VTT1J27VTT1J26VTT1J25VTT1H27VTT1G28VTT1G27VTT1G26VTT1F26VTT1E26VTT1E25
VDDQ AJ1VDDQ AF1VDDQ AE7VDDQ AE4VDDQ AC1VDDQ AB7VDDQ AB4VDDQ Y1VDDQ W7VDDQ W4VDDQ U1VDDQ T7VDDQ T4VDDQ P1VDDQ N7VDDQ N4VDDQ L1VDDQ H1
VTT1 P10VTT1 N10VTT1 L10VTT1 K10
VTT1 L26VTT1 L27VTT1 M26
VTT1 J22VTT1 J20VTT1 J18VTT1 H21VTT1 H20VTT1 H19
P
O
W
E
R
G
R
A
P
H
I
C
S
V
I
D
s
GRAPHICS
D
D
R
3
-
1
.
5
V
R
A
I
L
S
FDI
PEG & DMI
S
E
N
S
E
L
I
N
E
S
1
.
1
V
1
.
8
V
7 OF 9
A
U
B
U
R
N
D
A
L
E
CPU1G
P
O
W
E
R
G
R
A
P
H
I
C
S
V
I
D
s
GRAPHICS
D
D
R
3
-
1
.
5
V
R
A
I
L
S
FDI
PEG & DMI
S
E
N
S
E
L
I
N
E
S
1
.
1
V
1
.
8
V
7 OF 9
A
U
B
U
R
N
D
A
L
E
CPU1G
1
2
C1328
SC10U6D3V5M
X-3G
P
C1328
SC10U6D3V5M
X-3G
P
1
2
C1305SC1U6D3V2KX
-GP
C1305SC1U6D3V2KX
-GP
1
2
C1302SC1U6D3V2KX
-GP
C1302SC1U6D3V2KX
-GP
1
2
TC1301SE330U2D5VDM-2GP
DY TC1301SE330U2D5VDM-2GP
DY
1
2
C1307SC10U6D3V5M
X-3G
P
C1307SC10U6D3V5M
X-3G
P
1
2
C1379SCD1U10V2KX-4GP
DYC1379SCD1U10V2KX-4GP
DY
1
2
C1318SC1U6D3V2KX
-GP
C1318SC1U6D3V2KX
-GP
1
2
C1308
SC10U6D3V5KX
-1GP
C1308
SC10U6D3V5KX
-1GP
12R1305 4K7R2J-2-GPR1305 4K7R2J-2-GP
1
2
C1319SC1U6D3V2KX
-GP
C1319SC1U6D3V2KX
-GP
1
2
C1303SC1U6D3V2KX
-GP
C1303SC1U6D3V2KX
-GP
-
55
4
4
3
3
2
2
1
1
D D
C C
B B
A A
TP_MCP_VSS_NCTF1
TP_MCP_VSS_NCTF4TP_MCP_VSS_NCTF3TP_MCP_VSS_NCTF2
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,Taipei Hsien 221, Taiwan, R.O.C.
DJ1 Calpella UMA X01CPU (VSS)
14 90Friday, April 16, 2010
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,Taipei Hsien 221, Taiwan, R.O.C.
DJ1 Calpella UMA X01CPU (VSS)
14 90Friday, April 16, 2010
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,Taipei Hsien 221, Taiwan, R.O.C.
DJ1 Calpella UMA X01CPU (VSS)
14 90Friday, April 16, 2010
SSID = CPU
VSSAT20VSSAT17VSSAR31VSSAR28VSSAR26VSSAR24VSSAR23VSSAR20VSSAR17VSSAR15VSSAR12VSSAR9VSSAR6VSSAR3VSSAP20VSSAP17VSSAP13VSSAP10VSSAP7VSSAP4VSSAP2VSSAN34VSSAN31VSSAN23VSSAN20VSSAN17VSSAM29VSSAM27VSSAM25VSSAM20VSSAM17VSSAM14VSSAM11VSSAM8VSSAM5VSSAM2VSSAL34VSSAL31VSSAL23VSSAL20VSSAL17VSSAL12VSSAL9VSSAL6VSSAL3VSSAK29VSSAK27VSSAK25VSSAK20VSSAK17VSSAJ31VSSAJ23VSSAJ20VSSAJ17VSSAJ14VSSAJ11VSSAJ8VSSAJ5VSSAJ2VSSAH35VSSAH34VSSAH33VSSAH32VSSAH31VSSAH30VSSAH29VSSAH28VSSAH27VSSAH26VSSAH20VSSAH17VSSAH13VSSAH9VSSAH6VSSAH3VSSAG10VSSAF8VSSAF4VSSAF2VSSAE35
VSS AE34VSS AE33VSS AE32VSS AE31VSS AE30VSS AE29VSS AE28VSS AE27VSS AE26VSS AE6VSS AD10VSS AC8VSS AC4VSS AC2VSS AB35VSS AB34VSS AB33VSS AB32VSS AB31VSS AB30VSS AB29VSS AB28VSS AB27VSS AB26VSS AB6VSS AA10VSS Y8VSS Y4VSS Y2VSS W35VSS W34VSS W33VSS W32VSS W31VSS W30VSS W29VSS W28VSS W27VSS W26VSS W6VSS V10VSS U8VSS U4VSS U2VSS T35VSS T34VSS T33VSS T32VSS T31VSS T30VSS T29VSS T28VSS T27VSS T26VSS T6VSS R10VSS P8VSS P4VSS P2VSS N35VSS N34VSS N33VSS N32VSS N31VSS N30VSS N29VSS N28VSS N27VSS N26VSS N6VSS M10VSS L35VSS L32VSS L29VSS L8VSS L5VSS L2VSS K34VSS K33VSS K30
VSS
8 OF 9
A
U
B
U
R
N
D
A
L
E
CPU1H
VSS
8 OF 9
A
U
B
U
R
N
D
A
L
E
CPU1H
1 TP1403TP1403
VSSK27VSSK9VSSK6VSSK3VSSJ32VSSJ30VSSJ21VSSJ19VSSH35VSSH32VSSH28VSSH26VSSH24VSSH22VSSH18VSSH15VSSH13VSSH11VSSH8VSSH5VSSH2VSSG34VSSG31VSSG20VSSG9VSSG6VSSG3VSSF30VSSF27VSSF25VSSF22VSSF19VSSF16VSSE35VSSE32VSSE29VSSE24VSSE21VSSE18VSSE13VSSE11VSSE8VSSE5VSSE2VSSD33VSSD30VSSD26VSSD9VSSD6VSSD3VSSC34VSSC32VSSC29VSSC28VSSC24VSSC22VSSC20VSSC19VSSC16VSSB31VSSB25VSSB21VSSB18VSSB17VSSB13VSSB11VSSB8VSSB6VSSB4VSSA29
VSS_NCTF#AT35 AT35VSS_NCTF#AT1 AT1
VSS_NCTF#AR34 AR34VSS_NCTF#B34 B34VSS_NCTF#B2 B2
VSS_NCTF#B1 B1VSS_NCTF#A35 A35
VSSA27VSSA23VSSA9
RSVD_NCTF#AT33 AT33RSVD_NCTF#AT34 AT34RSVD_NCTF#AP35 AP35RSVD_NCTF#AR35 AR35
RSVD_NCTF#AT3 AT3RSVD_NCTF#AR1 AR1RSVD_NCTF#AP1 AP1RSVD_NCTF#AT2 AT2RSVD_NCTF#C1 C1RSVD_NCTF#A3 A3
RSVD_NCTF#C35 C35RSVD_NCTF#B35 B35RSVD_NCTF#A34 A34RSVD_NCTF#A33 A33
VSS
9 OF 9
A
U
B
U
R
N
D
A
L
E
N
C
T
F
T
E
S
T
P
I
N
:
A
3
5
,
A
T
1
,
A
T
3
5
,
B
1
,
A
3
,
A
3
3
,
A
3
4
,
A
P
1
,
A
P
3
5
,
A
R
1
,
A
R
3
5
,
A
T
2
,
A
T
3
,
A
T
3
3
,
A
T
3
4
,
B
3
5
,
C
1
,
C
3
5
CPU1I
VSS
9 OF 9
A
U
B
U
R
N
D
A
L
E
N
C
T
F
T
E
S
T
P
I
N
:
A
3
5
,
A
T
1
,
A
T
3
5
,
B
1
,
A
3
,
A
3
3
,
A
3
4
,
A
P
1
,
A
P
3
5
,
A
R
1
,
A
R
3
5
,
A
T
2
,
A
T
3
,
A
T
3
3
,
A
T
3
4
,
B
3
5
,
C
1
,
C
3
5
CPU1I
1 TP1405TP14051 TP1406TP14061 TP1404TP1404
-
55
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,Taipei Hsien 221, Taiwan, R.O.C.
DJ1 Calpella UMA X01Reserved
A3
15 90Friday, April 16, 2010
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,Taipei Hsien 221, Taiwan, R.O.C.
DJ1 Calpella UMA X01Reserved
A3
15 90Friday, April 16, 2010
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,Taipei Hsien 221, Taiwan, R.O.C.
DJ1 Calpella UMA X01Reserved
A3
15 90Friday, April 16, 2010
(Blanking)
-
55
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,Taipei Hsien 221, Taiwan, R.O.C.
DJ1 Calpella UMA X01Reserved
A3
16 90Friday, April 16, 2010
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,Taipei Hsien 221, Taiwan, R.O.C.
DJ1 Calpella UMA X01Reserved
A3
16 90Friday, April 16, 2010
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,Taipei Hsien 221, Taiwan, R.O.C.
DJ1 Calpella UMA X01Reserved
A3
16 90Friday, April 16, 2010
(Blanking)
-
55
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,Taipei Hsien 221, Taiwan, R.O.C.
DJ1 Calpella UMA X01Reserved
A3
17 90Friday, April 16, 2010
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,Taipei Hsien 221, Taiwan, R.O.C.
DJ1 Calpella UMA X01Reserved
A3
17 90Friday, April 16, 2010
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,Taipei Hsien 221, Taiwan, R.O.C.
DJ1 Calpella UMA X01Reserved
A3
17 90Friday, April 16, 2010
(Blanking)
-
55
4
4
3
3
2
2
1
1
D D
C C
B B
A A
M_A_A1
M_A_DQS#0
M_A_DQ40M_A_DQ41M_A_DQ42M_A_DQ43
M_A_DQ12M_A_DQ13M_A_DQ14M_A_DQ15
M_A_DM4
M_A_DQS3
M_A_DQ0
M_A_DQS#5
M_A_A2SA0_DIM0
SA0_DIM0
M_A_DQ44M_A_DQ45M_A_DQ46M_A_DQ47
M_A_DQ16M_A_DQ17M_A_DQ18M_A_DQ19
M_A_DM5
M_A_DQS4
SODIMM0_1_SMB_CLK_R
M_A_A3
M_A_DQS#6
M_A_DQ48M_A_DQ49M_A_DQ50M_A_DQ51
M_A_DQ20M_A_DQ21M_A_DQ22M_A_DQ23
SA1_DIM0
M_A_DQ1
M_A_A4
M_A_DM0
M_A_DM6
M_A_DQS5
M_A_DQS#7
M_A_DQ52M_A_DQ53M_A_DQ54M_A_DQ55
M_A_DQ24M_A_DQ25M_A_DQ26M_A_DQ27
M_A_DQS#1
M_A_A5
M_A_DQ2
SA1_DIM0
M_A_DM1
M_A_DQS6
M_A_DM7
M_A_DQ56M_A_DQ57M_A_DQ58M_A_DQ59
M_A_DQS0
M_A_DQ28M_A_DQ29M_A_DQ30M_A_DQ31
M_A_A7M_A_A8M_A_A9M_A_A10M_A_A11
M_A_A6
M_A_DQ3
M_A_DQS#2
M_A_DQS7
M_A_DM2
M_A_DQ60M_A_DQ61M_A_DQ62M_A_DQ63
M_A_DQ32M_A_DQ33M_A_DQ34M_A_DQ35
M_A_DQS1
M_A_A13M_A_A14M_A_A15
M_A_A12
M_A_DQ4M_A_DQ5M_A_DQ6M_A_DQ7
M_A_DQS#3
M_A_A0
M_A_DQ36M_A_DQ37M_A_DQ38M_A_DQ39
M_A_DM3
SODIMM0_1_SMB_DATA_RM_A_DQ8M_A_DQ9M_A_DQ10M_A_DQ11
M_A_DQS2
M_A_DQS#4
+1.5V_SUS
+1.5V_SUS
+3.3V_RUN
+0.75V_DDR_VTT
+0.75V_DDR_VTT
+V_DDR_REF
+V_DDR_REF
M_A_WE# 10
M_CS#0 10
M_A_CAS# 10
DDR3_DRAMRST#9,19
M_ODT010M_ODT110
M_CKE0 10M_CKE1 10
M_CS#1 10
M_CLK_DDR0 10M_CLK_DDR#0 10
M_CLK_DDR1 10M_CLK_DDR#1 10
M_A_BS210
M_A_BS010M_A_BS110
M_A_RAS# 10
M_A_DQ[63..0]10
M_A_DQS#[7..0] 10
M_A_DQS[7..0] 10M_A_A[15..0] 10
M_A_DM[7..0] 10
PM_EXTTS#0 9
PCH_SMBCLK 7,19,23,76PCH_SMBDATA 7,19,23,76
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,Taipei Hsien 221, Taiwan, R.O.C.
DJ1 Calpella UMA X01DDR3-SODIMM1
18 90Thursday, April 22, 2010
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,Taipei Hsien 221, Taiwan, R.O.C.
DJ1 Calpella UMA X01DDR3-SODIMM1
18 90Thursday, April 22, 2010
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,Taipei Hsien 221, Taiwan, R.O.C.
DJ1 Calpella UMA X01DDR3-SODIMM1
18 90Thursday, April 22, 2010
Place these capsclose to VTT1 andVTT2.
Note:If SA0 DIM0 = 0, SA1_DIM0 = 0SO-DIMMA SPD Address is 0xA0SO-DIMMA TS Address is 0x30
If SA0 DIM0 = 1, SA1_DIM0 = 0SO-DIMMA SPD Address is 0xA2SO-DIMMA TS Address is 0x32
SODIMM A DECOUPLING
Layout Note:Place these Caps nearSO-DIMMA.
H =5.2mm
62.10017.P11
SSID = MEMORY
1
2
C1805SC10U6D3V5KX
-1GP
C1805SC10U6D3V5KX
-1GP
A098A197A296A395A492A591A690A786A889A985A10/AP107A1184A1283A13119A1480A1578A16/BA279
BA0109BA1108
DQ05DQ17DQ215DQ317DQ44DQ56DQ616DQ718DQ821DQ923DQ1033DQ1135DQ1222DQ1324DQ1434DQ1536DQ1639DQ1741DQ1851DQ1953DQ2040DQ2142DQ2250DQ2352DQ2457DQ2559DQ2667DQ2769DQ2856DQ2958DQ3068DQ3170DQ32129DQ33131DQ34141DQ35143DQ36130DQ37132DQ38140DQ39142DQ40147DQ41149DQ42157DQ43159DQ44146DQ45148DQ46158DQ47160DQ48163DQ49165DQ50175DQ51177DQ52164DQ53166DQ54174DQ55176DQ56181DQ57183DQ58191DQ59193DQ60180DQ61182DQ62192DQ63194
DQS0#10DQS1#27DQS2#45DQS3#62DQS4#135DQS5#152DQS6#169DQS7#186
DQS012DQS129DQS247DQS364DQS4137DQS5154DQS6171DQS7188
ODT0116ODT1120
VREF_DQ1
VSS 2
NP1 NP1NP2 NP2
RAS# 110WE# 113
CAS# 115
CS0# 114CS1# 121
CKE0 73CKE1 74
CK0 101CK0# 103
CK1 102CK1# 104
DM0 11DM1 28DM2 46DM3 63DM4 136DM5 153DM6 170DM7 187
SDA 200SCL 202
VDDSPD 199
SA0 197SA1 201
VREF_CA126
VDD18 124
NC#1 77NC#2 122
NC#/TEST 125
VDD3 81VDD4 82VDD5 87VDD6 88VDD7 93VDD8 94VDD9 99
VDD10 100
VDD13 111VDD14 112VDD15 117VDD16 118
VSS 3VSS 8VSS 9VSS 13VSS 14VSS 19VSS 20VSS 25VSS 26VSS 31VSS 32VSS 37VSS 38VSS 43VSS 44VSS 48VSS 49VSS 54VSS 55VSS 60VSS 61
VDD1 75
VSS 65VSS 66VSS 71VSS 72
VDD2 76
VDD11 105VDD12 106
VDD17 123
VSS 127VSS 128
VSS 134VSS 133
VSS 138VSS 139VSS 144VSS 145
VSS 151VSS 150
VSS 155VSS 156VSS 161VSS 162VSS 167VSS 168
VSS 173VSS 172
VSS 179VSS 178
VSS 185VSS 184
VSS 189VSS 190VSS 195VSS 196
RESET#30
EVENT# 198
VSS 205VSS 206
VTT1203VTT2204
DM1
DDR3-204P-46-GP
DM1
DDR3-204P-46-GP
1
2
C1804SC10U
10V5ZY-1G
P
DYC1804SC
10U10V5ZY
-1GP
DY
1
2
C
1
8
2
0
S
C
1
U
6
D
3
V
2
K
X
-
G
P
C
1
8
2
0
S
C
1
U
6
D
3
V
2
K
X
-
G
P
1
2
C1810SC10U6D3V5KX
-1GP
DY
C1810SC10U6D3V5KX
-1GP
DY
1
2
TC1801SE330U2D
5VDM
-2GP
DY
TC1801SE330U2D
5VDM
-2GP
DY
1
2
C
1
8
2
1
S
C
1
U
6
D
3
V
2
K
X
-
G
P
DY C1
8
2
1
S
C
1
U
6
D
3
V
2
K
X
-
G
P
DY
1
2
C
1
8
1
6
S
C
D
1
U
1
0
V
2
K
X
-
5
G
P
C
1
8
1
6
S
C
D
1
U
1
0
V
2
K
X
-
5
G
P
1
2
C1808SC10U6D3V5KX
-1GP
C1808SC10U6D3V5KX
-1GP
1
2
C
1
8
2
3
S
C
1
U
6
D
3
V
2
K
X
-
G
P
DY C1
8
2
3
S
C
1
U
6
D
3
V
2
K
X
-
G
P
DY
1
2
C
1
8
1
3
S
C
D
1
U
1
0
V
2
K
X
-
5
G
P
C
1
8
1
3
S
C
D
1
U
1
0
V
2
K
X
-
5
G
P
12
3 4
RN1801SRN10KJ-5-GPRN1801SRN10KJ-5-GP
1
2
C1807SC10U6D3V5KX
-1GP
C1807SC10U6D3V5KX
-1GP
1
2
C1826SCD1U10V2KX-5GPC1826SCD1U10V2KX-5GP
1
2
C
1
8
1
5
S
C
D
1
U
1
0
V
2
K
X
-
5
G
P
C
1
8
1
5
S
C
D
1
U
1
0
V
2
K
X
-
5
G
P
1
2
C
1
8
2
2
S
C
1
U
6
D
3
V
2
K
X
-
G
P
C
1
8
2
2
S
C
1
U
6
D
3
V
2
K
X
-
G
P
1
2
C1803SC10U
10V5ZY-1G
P
DYC1803SC
10U10V5ZY
-1GP
DY
1
2
C1806SC10U
10V5ZY-1G
P
DYC1806SC
10U10V5ZY
-1GP
DY
1 2R1804 0R0402-PADR1804 0R0402-PAD
1
2
C1809SC10U6D3V5KX
-1GP
DY
C1809SC10U6D3V5KX
-1GP
DY
1
2
C1817SCD1U10V2KX-5GP
C1817SCD1U10V2KX-5GP
1
2
C1801SCD1U10V2KX-5GP
C1801SCD1U10V2KX-5GP
1
2
C
1
8
1
4
S
C
D
1
U
1
0
V
2
K
X
-
5
G
P
C
1
8
1
4
S
C
D
1
U
1
0
V
2
K
X
-
5
G
P
1
2
C1802SC2D2U10V3KX-1GPDY C1802SC2D2U10V3KX-1GPDY
1
2
C1818SC2D2U10V3KX-1GPDYC1818SC2D2U10V3KX-1GPDY
1 2R1805 0R0402-PADR1805 0R0402-PAD
-
55
4
4
3
3
2
2
1
1
D D
C C
B B
A A
M_B_A1
M_B_DQ42M_B_DQ41M_B_DQ40
M_B_DQS#0
M_B_DQ43
M_B_DQ14M_B_DQ13M_B_DQ12
M_B_DQ15
M_B_DM4
M_B_DQS3
M_B_DQ0
M_B_A2
M_B_DQS#5
SA0_DIM1
SA1_DIM1
M_B_DQ46M_B_DQ45M_B_DQ44
M_B_DQ47
M_B_DQ19M_B_DQ18M_B_DQ17M_B_DQ16
M_B_DQS4
M_B_DM5
M_B_A3
M_B_DQS#6
M_B_DQ51M_B_DQ50M_B_DQ49M_B_DQ48
M_B_DQ23M_B_DQ22M_B_DQ21M_B_DQ20
SA1_DIM1
M_B_DQ1
M_B_DM0
M_B_A4
M_B_DQS5
M_B_DM6
M_B_DQS#7
M_B_DQ53M_B_DQ52
M_B_DQ24
M_B_DQ55M_B_DQ54
M_B_DQ27M_B_DQ26M_B_DQ25
M_B_DQS#1
M_B_DQ2
M_B_A5
M_B_DM1
M_B_DM7
M_B_DQS6
M_B_DQ57M_B_DQ56
M_B_DQS0
M_B_DQ59M_B_DQ58
M_B_DQ31M_B_DQ30M_B_DQ29M_B_DQ28
M_B_A7M_B_A6
M_B_A11M_B_A10M_B_A9M_B_A8
M_B_DQ3
M_B_DQS#2
M_B_DM2
M_B_DQS7
M_B_DQ63M_B_DQ62M_B_DQ61M_B_DQ60
M_B_DQ33M_B_DQ32
M_B_DQ35M_B_DQ34
M_B_DQS1
M_B_A12
M_B_A15M_B_A14M_B_A13
M_B_DQ5M_B_DQ4
M_B_DQ7M_B_DQ6
M_B_DQS#3
M_B_A0
M_B_DQ39M_B_DQ38M_B_DQ37M_B_DQ36
M_B_DM3
M_B_DQ8
M_B_DQ11M_B_DQ10M_B_DQ9
M_B_DQS2
M_B_DQS#4
SODIMM1_1_SMB_CLK_RSODIMM1_1_SMB_DATA_R
SA0_DIM1
+3.3V_RUN
+1.5V_SUS
+3.3V_RUN
+1.5V_SUS
+0.75V_DDR_VTT
+V_DDR_REF
+V_DDR_REF
M_B_WE# 10
M_CS#2 10
DDR3_DRAMRST#9,18
M_B_CAS# 10
M_ODT210M_ODT310
M_CKE2 10M_CKE3 10
M_CS#3 10
M_CLK_DDR2 10M_CLK_DDR#2 10
M_CLK_DDR3 10M_CLK_DDR#3 10
M_B_BS010
M_B_BS210
M_B_BS110
M_B_RAS# 10
M_B_DQ[63..0]10
M_B_DQS[7..0] 10M_B_A[15..0] 10
M_B_DQS#[7..0] 10M_B_DM[7..0] 10
PM_EXTTS#1 9
PCH_SMBCLK 7,18,23,76PCH_SMBDATA 7,18,23,76
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,Taipei Hsien 221, Taiwan, R.O.C.
DJ1 Calpella UMA X01DDR3-SODIMM2
19 90Thursday, April 22, 2010
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,Taipei Hsien 221, Taiwan, R.O.C.
DJ1 Calpella UMA X01DDR3-SODIMM2
19 90Thursday, April 22, 2010
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,Taipei Hsien 221, Taiwan, R.O.C.
DJ1 Calpella UMA X01DDR3-SODIMM2
19 90Thursday, April 22, 2010
Note:SO-DIMMB SPD Address is 0xA4SO-DIMMB TS Address is 0x34
SO-DIMMB is placed farther fromthe Processor than SO-DIMMA
Place these capsclose to VTT1 andVTT2.
SODIMM B DECOUPLING
Layout Note:Place these Caps nearSO-DIMMB.
H = 9.2mm
62.10017.N71
SSID = MEMORY
1
2
C1906SC10U6D3V5KX
-1GP
C1906SC10U6D3V5KX
-1GP
1
2
C1902SC2D2U10V3KX-1GPDY C1902SC2D2U10V3KX-1GPDY
1
2
C
1
9
2
0
S
C
1
U
6
D
3
V
2
K
X
-
G
P
C
1
9
2
0
S
C
1
U
6
D
3
V
2
K
X
-
G
P
12
3 4
RN1901SRN10KJ-5-GPRN1901SRN10KJ-5-GP
1
2
C
1
9
2
2
S
C
1
U
6
D
3
V
2
K
X
-
G
P
C
1
9
2
2
S
C
1
U
6
D
3
V
2
K
X
-
G
P
1 2R1904 0R0402-PADR1904 0R0402-PAD
1
2
C1923SCD1U10V2KX-5GP
C1923SCD1U10V2KX-5GP
1
2
C1924SC2D2U10V3KX-1GP
DYC1924SC2D2U10V3KX-1GP
DY
1 2R1905 0R0402-PADR1905 0R0402-PAD
1
2
C1909SC10U6D3V5KX
-1GP
C1909SC10U6D3V5KX
-1GP
1
2
C1907SC10U6D3V5KX
-1GP
C1907SC10U6D3V5KX
-1GP
1
2
C1925SCD1U10V2KX-5GPC1925SCD1U10V2KX-5GP
1
2
C
1
9
1
9
S
C
1
U
6
D
3
V
2
K
X
-
G
P
DY C1
9
1
9
S
C
1
U
6
D
3
V
2
K
X
-
G
P
DY
1
2
C
1
9
1
5
S
C
D
1
U
1
0
V
2
K
X
-
5
G
P
C
1
9
1
5
S
C
D
1
U
1
0
V
2
K
X
-
5
G
P
A098A197A296A395A492A591A690A786A889A985A10/AP107A1184A1283A13119A1480A1578A16/BA279
BA0109BA1108
DQ05DQ17DQ215DQ317DQ44DQ56DQ616DQ718DQ821DQ923DQ1033DQ1135DQ1222DQ1324DQ1434DQ1536DQ1639DQ1741DQ1851DQ1953DQ2040DQ2142DQ2250DQ2352DQ2457DQ2559DQ2667DQ2769DQ2856DQ2958DQ3068DQ3170DQ32129DQ33131DQ34141DQ35143DQ36130DQ37132DQ38140DQ39142DQ40147DQ41149DQ42157DQ43159DQ44146DQ45148DQ46158DQ47160DQ48163DQ49165DQ50175DQ51177DQ52164DQ53166DQ54174DQ55176DQ56181DQ57183DQ58191DQ59193DQ60180DQ61182DQ62192DQ63194
DQS0#10DQS1#27DQS2#45DQS3#62DQS4#135DQS5#152DQS6#169DQS7#186
DQS012DQS129DQS247DQS364DQS4137DQS5154DQS6171DQS7188
ODT0116ODT1120
VREF_DQ1
VSS 2
NP1 NP1NP2 NP2
RAS# 110WE# 113
CAS# 115
CS0# 114CS1# 121
CKE0 73CKE1 74
CK0 101CK0# 103
CK1 102CK1# 104
DM0 11DM1 28DM2 46DM3 63DM4 136DM5 153DM6 170DM7 187
SDA 200SCL 202
VDDSPD 199
SA0 197SA1 201
VREF_CA126
VDD18 124
NC#1 77NC#2 122
NC#/TEST 125
VDD3 81VDD4 82VDD5 87VDD6 88VDD7 93VDD8 94VDD9 99
VDD10 100
VDD13 111VDD14 112VDD15 117VDD16 118
VSS 3VSS 8VSS 9VSS 13VSS 14VSS 19VSS 20VSS 25VSS 26VSS 31VSS 32VSS 37VSS 38VSS 43VSS 44VSS 48VSS 49VSS 54VSS 55VSS 60VSS 61
VDD1 75
VSS 65VSS 66VSS 71VSS 72
VDD2 76
VDD11 105VDD12 106
VDD17 123
VSS 127VSS 128
VSS 134VSS 133
VSS 138VSS 139VSS 144VSS 145
VSS 151VSS 150
VSS 155VSS 156VSS 161VSS 162VSS 167VSS 168
VSS 173VSS 172
VSS 179VSS 178
VSS 185VSS 184
VSS 189VSS 190VSS 195VSS 196
RESET#30
EVENT# 198
VSS 205VSS 206
VTT1203VTT2204
DM2
DDR3-204P-43-GP
DM2
DDR3-204P-43-GP12
C
1
9
2
1
S
C
1
U
6
D
3
V
2
K
X
-
G
P
DY C1
9
2
1
S
C
1
U
6
D
3
V
2
K
X
-
G
P
DY
1
2
C
1
9
1
6
S
C
D
1
U
1
0
V
2
K
X
-
5
G
P
C
1
9
1
6
S
C
D
1
U
1
0
V
2
K
X
-
5
G
P
1
2
C1901SCD1U10V2KX-5GP
C1901SCD1U10V2KX-5GP
1
2
C
1
9
1
7
S
C
D
1
U
1
0
V
2
K
X
-
5
G
P
C
1
9
1
7
S
C
D
1
U
1
0
V
2
K
X
-
5
G
P
1
2
C
1
9
1
8
S
C
D
1
U
1
0
V
2
K
X
-
5
G
P
C
1
9
1
8
S
C
D
1
U
1
0
V
2
K
X
-
5
G
P
1
2
C1912SC10U6D3V5KX
-1GP
DY
C1912SC10U6D3V5KX
-1GP
DY
1
2
C1910SC10U6D3V5KX
-1GP
C1910SC10U6D3V5KX
-1GP
1
2
C1905SC10U
10V5ZY-1G
P
DYC1905SC
10U10V5ZY
-1GP
DY
1
2
C1911SC10U6D3V5KX
-1GP
DY
C1911SC10U6D3V5KX
-1GP
DY
1
2
C1908SC10U6D3V5KX
-1GP
C1908SC10U6D3V5KX
-1GP
-
55
4
4
3
3
2
2
1
1
D D
C C
B B
A A
LVDS_VBGLIBG
PCH_LCDVDD_EN
LCTRL_DATA
LCTRL_DATALCTRL_CLK
LDDC_CLK_PCHLDDC_DATA_PCH
LDDC_DATA_PCH
LDDC_CLK_PCHLCTRL_CLK
CRT_IREF
PCH_CRT_DDCCLKPCH_CRT_DDCDATA
+3.3V_RUN
+3.3V_RUN
PCH_CRT_HSYNC55
LDDC_CLK_PCH54LDDC_DATA_PCH54
PCH_LVDSA_TX054
PCH_CRT_VSYNC55
PCH_LVDSA_TX154PCH_LVDSA_TX254
PCH_LVDSA_TX0#54PCH_LVDSA_TX1#54PCH_LVDSA_TX2#54
PCH_LVDSA_TXC#54PCH_LVDSA_TXC54
PCH_LBKLT_CTL54
PCH_LCDVDD_EN54PCH_VGA_BLEN37
PCH_CRT_BLUE55PCH_CRT_GREEN55
PCH_CRT_DDCCLK55PCH_CRT_DDCDATA55
PCH_CRT_RED55
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,Taipei Hsien 221, Taiwan, R.O.C.
DJ1 Calpella UMA X01PCH (LVDS/CRT/DDI)
20 90Thursday, April 22, 2010
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,Taipei Hsien 221, Taiwan, R.O.C.
DJ1 Calpella UMA X01PCH (LVDS/CRT/DDI)
20 90Thursday, April 22, 2010
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,Taipei Hsien 221, Taiwan, R.O.C.
DJ1 Calpella UMA X01PCH (LVDS/CRT/DDI)
20 90Thursday, April 22, 2010
SSID = PCH
Place near PCH
Impedance:85 ohm
2.5V Tolerance
Need Level Shift
Close to ball
-
55
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CLK_PCI_FB_R
PCI_DEVSEL#PCI_FRAME#
PCI_IRDY#
PCI_SERR#PCI_PERR#
PCI_TRDY#PCI_STOP#
PCI_GNT0#
PCI_PLOCK#
PCI_PLTRST#
PCI_REQ0#PCI_REQ1#
PCI_GNT3#
PCI_REQ3#
INT_PIRQB#INT_PIRQC#INT_PIRQD#
INT_PIRQA#
PCH_PME#
USB_OC#2_3
SMC_WAKE_SCI#_R
USB_OC#0_1
USB_OC#8_9USB_OC#10_11USB_OC#12_13
USB_OC#6_7
USB_RBIAS_PN
PCI_GNT1#
PCI_GNT3#
NV_ALENV_CLE
PCI_IRDY#PCI_SERR#
PCI_PERR#PCI_REQ0#
PCI_GNT2#
NV_RCOMP
USB_OC#4_5
PCIRST#
PCI_REQ3#
PCI_REQ2#
INT_PIRQF#INT_PIRQG#INT_PIRQH#
INT_PIRQE#
INT_PIRQG#
PCI_PLTRST#
PCLK_KBC_R
INT_PIRQE#
INT_PIRQH#INT_PIRQF#
PCI_REQ1#
PCI_STOP#INT_PIRQC#
PCI_DEVSEL#PCI_REQ2#
INT_PIRQB#
INT_PIRQD#
PCI_PLOCK#
INT_PIRQA#
PCI_TRDY#PCI_FRAME#
PCLK_FWH_R
SMC_WAKE_SCI#_R
USB_OC#10_11
USB_OC#6_7USB_OC#8_9USB_OC#2_3
USB_OC#12_13 USB_OC#4_5
USB_OC#0_1+3.3V_ALW
+3.3V_ALW
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN+3.3V_RUN
CLK_PCI_FB23
USB_OC#2_3 63USB_OC#0_1 63
PLT_RST#9,37,70,76
USB_PN2 63USB_PP2 63
USB_PN10 32USB_PP10 32USB_PN11 54USB_PP11 54
PCLK_KBC37
USB_PN5 76USB_PP5 76
USB_PN9 73USB_PP9 73
USB_PP3 63USB_PN3 63
PCLK_FWH70
USB_PN0 76USB_PP0 76
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,Taipei Hsien 221, Taiwan, R.O.C.
DJ1 Calpella UMA X01PCH (PCI/USB/NVRAM)
21 90Thursday, April 22, 2010
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,Taipei Hsien 221, Taiwan, R.O.C.
DJ1 Calpella UMA X01PCH (PCI/USB/NVRAM)
21 90Thursday, April 22, 2010
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,Taipei Hsien 221, Taiwan, R.O.C.
DJ1 Calpella UMA X01PCH (PCI/USB/NVRAM)
21 90Thursday, April 22, 2010
0111
BOOT BIOS Strap
PCI_GNT#1 BOOT BIOS LocationPCI_GNT#0
0 1 Reserved
SPI(Default)PCI
0 0 LPC
A16 swap override Strap/Top-BlockSwap Override jumper
PCI_GNT#3 Low = A16 swapoverride/Top-BlockSwap Override enabledHigh = Default
Danbury Technology:Disabled when Low.Enable when High.
10
0
11
USB3
Pair
4
USB
5
2
3
1
Device
X67
89
X
BLUETOOTH
USB2
CARD READER
X
CAMERA
X
X
12 X
13 X
WLAN (I/O Board)
USB0 (I/O Board)
SSID = PCH
12R2110 22R2J-2-GPDYR2110 22R2J-2-GPDY
1
TP2100TP2100
12345 6
78910
RN2104
SRN10KJ-L3-GP
RN2104
SRN10KJ-L3-GP
12345 6
78910
RN2102
SRN8K2J-2-GP-U
RN2102
SRN8K2J-2-GP-U
1 2R2109
4K7R2J-2-GPDYR2109
4K7R2J-2-GPDY
12R2108 22R2J-2-GPR2108 22R2J-2-GP
1TP2108TPAD14-GP TP2108TPAD14-GP
12345 6
78910
RN2101
SRN8K2J-2-GP-U
RN2101
SRN8K2J-2-GP-U
1TP2117TPAD14-GP TP2117TPAD14-GP
AD0H40AD1N34AD2C44
AD20C42AD21K46AD22M51AD23J52AD24K51AD25L34AD26F42AD27J40AD28G46AD29F44
AD3A38
AD30M47AD31H36
AD4C36AD5J34AD6A40AD7D45AD8E36AD9H48
C/BE0#J50C/BE1#G42C/BE2#H47C/BE3#G34
PCIRST#K6
PERR#E50
PIRQA#G38PIRQB#H51PIRQC#B37PIRQD#A44
PLOCK#D49
PLTRST#D5PME#M7
REQ0#F51REQ1#/GPIO50A46REQ2#/GPIO52B45REQ3#/GPIO54M53
SERR#E44
STOP#D41TRDY#C48
NV_ALE BD3
NV_CE#0 AY9NV_CE#1 BD1NV_CE#2 AP15NV_CE#3 BD8
NV_CLE AY6
NV_DQS0 AV9NV_DQS1 BG8
NV_DQ0/NV_IO0 AP7NV_DQ1/NV_IO1 AP6
NV_DQ10/NV_IO10 BD6NV_DQ11/NV_IO11 BB7NV_DQ12/NV_IO12 BC8NV_DQ13/NV_IO13 BJ8NV_DQ14/NV_IO14 BJ6NV_DQ15/NV_IO15 BG6
NV_DQ2/NV_IO2 AT6NV_DQ3/NV_IO3 AT9NV_DQ4/NV_IO4 BB1NV_DQ5/NV_IO5 AV6NV_DQ6/NV_IO6 BB3NV_DQ7/NV_IO7 BA4NV_DQ8/NV_IO8 BE4NV_DQ9/NV_IO9 BB6
NV_RB# AV7NV_RCOMP AU2
NV_WR#0_RE# AY8NV_WR#1_RE# AY5
NV_WE#_CK0 AV11NV_WE#_CK1 BF5
USBP0N H18USBP0P J18
USBP10N A22USBP10P C22USBP11N G24USBP11P H24USBP12N L24USBP12P M24USBP13N A24USBP13P C24
USBP1N A18USBP1P C18USBP2N N20USBP2P P20USBP3N J20USBP3P L20USBP4N F20USBP4P G20USBP5N A20USBP5P C20USBP6N M22
USBP7N B21USBP7P D21USBP8N H2