National Taiwan UniversityDepartment of Computer Science and Information Engineering
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Optimal Real-Time Scheduling for Uniform Multiprocessors
薛智文助理教授台灣大學資訊工程學系資訊網路暨多媒體研究所[email protected]
Shih-Ying Chen and Chih-Wen Hsueh, "Optimal Dynamic-priority Real-Time Scheduling Algorithms for Uniform Multiprocessors," Proc. 29th IEEE Real-Time Systems Symposium, 147-156, Barcelona, Spain, Dec. 2008.
2011/3/2
National Taiwan UniversityDepartment of Computer Science and Information Engineering /46
Task1
Task2
Taskn
…
(periodically)
Looking for simple condition to be feasible or schedulable.
Scheduling
2
Processor2
…
Processorm
Processor1
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Kwang S. Hong and Joseph Y-T. Leung, ON-LINE SCHEDULING OF REAL-TIME TASKS, Real-Time Systems Symposium,1988
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OutlineIntroduction
Multiprocessor EnvironmentsMotivationContributionDefinitions and Assumptions
Model and T-Ler PlanesScheduling AlgorithmsConclusion and Future WorkQ&A
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Multiprocessor EnvironmentsIdentical
All the processors are identical.Uniform
Execution time is dependent on the running processor.Scheduling algorithms for it might be adapted on
asymmetric multi-core platform (AMP).Unrelated
Execution time is independent on the running processor.
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P1
T1T2Tn …
(periodically)
RM and EDF are optimal.
Uniprocessor Scheduling
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C. L. Liu and J. Layland. Scheduling algorithms for multiprogramming in a hard real-time environment. Journal of the ACM, 10(1):46–61, 1973.
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P1
T1 P2T2Tn …
…
(periodically)
LLREF is optimal, with preemption and migration.
Identical Multiprocessor Scheduling
Pm
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Hyeonjoong Cho, Binoy Ravindran, and E. Douglas Jensen. An optimal real-time scheduling algorithm for multiprocessors. RTSS, pages 101–110, Oct. 2006. (LLREF)
R.R. Muntz and E.G. Coffman. Optimal preemptive scheduling on two-processor systems. IEEE Transactions on Computers, (11):1014–1020, Nov. 1969. (level algorithm)
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P1
T1T2Tn ……
(periodically)
Uniform Multiprocessor Scheduling
Pm
8
P2
Jane W.S. Liu and Ai-Tsung Yang, Optimal scheduling of independent tasks on heterogeneous computing systems, ACM '74 Proceedings of the 1974 annual conference, 1974
Well…
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P1
T1
P2
T2Tn ……
(periodically)
PG or PCG is optimal, with preemption and migration.
Uniform Multiprocessor Scheduling (cont.)
Pm
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Edward C. Horvath, Shui Lam, and Ravi Sethi. A level algorithm for preemptive scheduling. Journal of the ACM, 24(1):32–43, January 1977.Shih-Ying Chen and Chih-Wen Hsueh, "Optimal Dynamic-priority Real-Time Scheduling Algorithms for Uniform Multiprocessors," Proc. 29th IEEE Real-Time Systems Symposium, 147-156, Barcelona, Spain, Dec. 2008. (PC, PCG)
National Taiwan UniversityDepartment of Computer Science and Information Engineering /46
Why “Uniform”?
processor 1 with computing capacity = 2
processor 2 with computing capacity = 1
time0 1 2 3 4 5task
0 1 2 3 4 5task
task with execution requirement = 4
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T1 (8, 10)T2 (7, 10)
One task can only run on one processor at a time.
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Task migration might be easier on multicore platform
P1
P2
…
Pm
Sharedmemory
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MotivationA simpler way to describe the execution behavior
of tasks and processors.No existing optimal scheduling algorithm in terms
of feasibility condition.
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Guest OS
VCPU VCPU
Guest OS
VCPU
…
…
PCPU PCPU PCPU …
App App
Hypervisor
Scheduling
OS Scheduling on Hypervisor
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Contribution
A novel description plane: T-Ler planeTwo optimal dynamic-priority on-line scheduling
algorithms.
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Definitions and Assumptions
Assumptions :Uniform multiprocessorsTask is periodicDeadline is equal to the end of period.Full migration
Basic definitionsOn-line schedulingDynamic-priority schedulingPreemptive scheduling
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Definitions and Assumptions (cont.)Processors :
Processor Pi with computing capacity siAssume si in decreasing order :
Tasks : Task Ti with utilization ui where
Assume ui in decreasing order :01 21 nuuu
01 21 nsss
periodtrequiremen execution
iu
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Feasibility Conditions (Funk)
S. Funk, J. Goossens, and S. Baruah. “On-line scheduling on uniform multiprocessors,” RTSS, Dec. 2001.
Set Processors Tasks
1
2
n
1s 1u
21 ss 21 uu
nsss 21 nuuu 21
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OutlineIntroductionModel and T-Ler Plane
P-fair and T-L PlaneT-L PlanesT-Ler Planes
Scheduling AlgorithmsConclusion and Future WorkQ&A
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P-fair and T-L PlaneProportionate Fairness ( P - fair 1)
Each task is scheduled resources in proportion to its utilization.
Time and Local Remaining Execution Time Plane ( T-L plane 2)Show that scheduling for multiprocessors can be
viewed as repeatedly occurring T-L planes.
1 S. Baruah, N. Cohen, C. Plaxton, and D. Varvel, “Proportionate progress: A notion of fairness in resource allocation,” Algorithmica, June 1996.2 H. Cho, B. Ravindran, and E. D. Jensen. “An optimal real-time scheduling algorithm for multiprocessors,” RTSS, Oct. 2006.
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P-fair:Each task is scheduled resources in proportion to its utilization.
time
remaining execution tim
e 0
Task= (4, 8), (execution_time, period)
84
4
fluid schedule
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local remaining execution time: utilization * ( t2 – t1 )
period period
time
period period period
t1 t2
T1
T2
remaining execution tim
e
P-fair and T-L Plane (cont.)
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T-L Plane:Time and Local Remaining Execution Time Plane
local remaining execution tim
e
timet2t1
T1
T2
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local remaining execution time: utilization * ( t2 – t1 )
period period
time
period period period
t1 t2
T1
T2
remaining execution tim
e
T-L Planes …
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T-Ler Planes
time
remaining execution requirem
ent 0
Task= (4, 8), (execution_requirement, period)
84
4
fluid schedule
Time and Local Remaining Execution Requirement Plane ( T-Ler Plane)
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local remaining execution requirement: utilization * ( t2 – t1 )
period
time
period
t1 t2
T1
T2
remaining execution requirem
ent
T-Ler Planes (cont.)
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Processor Boundary
local remaining execution requirem
ent
time0
Processor 1
Processor 2
Processor 3
… Processor n
Speed 1 0.6 0.4 … 0.11P
2P
3P
nP
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Rescheduling Events
local remaining execution requirem
ent
time0 Event B (Bottom hitting event)
Event C (Ceiling hitting event)
Event F (Floor hitting event)
1P
2P
3P
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OutlineIntroductionModel and T-Ler PlanesScheduling Algorithms
Precaution Greedy Scheduling AlgorithmPrecaution Cut Greedy Scheduling AlgorithmProof of Optimality
Conclusion and Future WorkQ&A
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Framework
2P 1P1T time0 84
time
remaining execution requirem
ent
0 84
4
local local
timeT1
T2
remaining execution requirem
entlocal rem
aining execution requirem
ent
time
1T
T-Ler plane
local
local
2T
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Why P and G? GreedyPrecaution
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local remaining execution requirem
enttime0
1P
2P
3P
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local remaining execution requirem
ent time
Precaution Greedy Scheduling Algorithm
The times of rescheduling is unpredictable.1T
2T
3T
1P
2P
0
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time
local remaining execution requirem
ent
Precaution Cut Greedy Scheduling Algorithm
Give an upper bound of “n” rescheduling in a T-Ler plane.
1T
2T
3T
1P
2P
0
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PG vs. PCGWhen any event occurs, PG and PCG will reschedule.PCG reduce the times of rescheduling dramatically.
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local remaining execution requirem
ent time0
Task Order
?
1T
2T
nT
t35
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Task Order (cont.)
local remaining execution requirem
ent time
1T
2T
0
1T
2T
event occurs
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National Taiwan UniversityDepartment of Computer Science and Information Engineering /46
OutlineIntroductionModel and T-Ler PlanesScheduling Algorithms
Precaution Greedy Scheduling AlgorithmPrecaution Cut Greedy Scheduling AlgorithmProof of Optimality
Conclusion and Future WorkQ&A
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IFF Feasibility Conditions (Funk)
S. Funk, J. Goossens, and S. Baruah. “On-line scheduling on uniform multiprocessors,” RTSS, Dec. 2001.
Set Processors Tasks
1
2
n
1s 1u
21 ss 21 uu
nsss 21 nuuu 21
Feasibility Condition violated
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0
local remaining execution
requirement
time
Proving PG is Feasible
feasibility condition is violated
s1 ≥ u’1
s1 + s2 = u’1 + u’2
s1 + s2 + s3 ≥ u’1 + u’2 + u’3
feasibility condition is violated
1T
3T
2T
s1 ≥ u1
s1 + s2 ≥ u1 + u2
s1 + s2 + s3 ≥ u1 + u2 + u3
initial condition
1T 2T
3T
( T’1 , T’2 ) could be ( T1 ,T3 ) or ( T2 ,T3 )
1P
3P
2P
When any event occurs, PG will reschedule.Here we want to show any event occurs earlier
than feasibility condition is violated.If u2 > s2
T1 or T2 will invoke event before feasibility condition is violated
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0
local remaining execution
requirement
time
Proving PG is Feasible (cont.)
feasibility condition violate
s1 ≥ u’1
s1 + s2 = u’1 + u’2
s1 + s2 + s3 ≥ u’1 + u’2 + u’3
feasibility condition violate1T
3T2T
s1 ≥ u1
s1 + s2 ≥ u1 + u2
s1 + s2 + s3 ≥ u1 + u2 + u3
initial condition
1T 2T
3T
( T’1 , T’2 ) could be ( T1 ,T3 ) or ( T2 ,T3 )
1P
3P
2P
If u2 < s2
T3 will invoke event before feasibility condition is violated
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Proving PG is Optimal
In the beginning, set of tasks and processors is feasible.
PG reschedules at any evens and is still feasible.
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Proving PCG is Feasible
When any event occurs, set of tasks and processors is feasible by PCG.
Remove the task and the processor that invoke event.When event B occurs :
u’n = 0When event C occurs :
s1 = u’1 When event F occurs :
si = u’j i = jsi = u’j i > jsi = u’j i < j
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Proving PCG is Feasible (cont.)
We want to derive :Processors Tasks
s1 ≥ u’1
s1 + s2 ≥ u’1 + u’3 (s2 ≥ s4 = u’2 ≥ u’3)s1 + s2 + s3 ≥ u’1 + u’3 + u’4 (s3 ≥ s4 =
u’2 ≥ u’4)s1 + s2 + s3 + s5 ≥ u’1 + u’3 + u’4 + u’5
When event F occurs, s4 = u’2
Processors Tasks
s1 ≥ u’1
s1 + s2 ≥ u’1 + u’2
s1 + s2 + s3 ≥ u’1 + u’2 + u’3
s1 + s2 + s3 + s4 ≥ u’1 + u’2 + u’3 + u’4
s1 + s2 + s3 + s4 + s5
≥ u’1 + u’2 + u’3 + u’4 + u’5
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Proving PCG is OptimalIn the beginning, the set of tasks and processors
is feasible.PCG reschedules at any event and is still
feasible.
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ConclusionWe presented T-Ler plane which is easier for reasoning
about the execution behavior of tasks and processors.Two optimal on-line scheduling algorithms
Precaution Greedy scheduling algorithmPrecaution Cut Greedy scheduling algorithmPCG reduces the times of rescheduling dramatically.
Our result might be applicable to current asymmetric multicore platform.
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Future WorkVerifying the performance of PG and PCG.Implementing PG and PCG scheduling algorithms on
asymmetric multicore platform.Reduce the migration times of PCG.Extend PCG to globally periodical.
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Q&A
Thanks for your attention!!
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