ESSDERC 2015
Substrate Noise Isolation Improvement by
Helium-3 Ion Irradiation Technique in a
Triple-well CMOS Process
Ning Li1, Takeshi Inoue2, Takuichi Hirano1, Jian
Pang1, Rui Wu1, Kenichi Okada1, Hitoshi
Sakane2, and Akira Matsuzawa1
1Tokyo Institute of Technology2S.H.I. Examination & Inspection, Ltd
Outline
• Background
• Methods to improve isolation
• Helium-3 ion irradiation
• Simulation results
• Experimental results
• Conclusion
Slide 1
Background
• Analog and digital circuits are integrated on the
same chip.
• Increase of digital circuit speed causes more
substrate noise coupling problems.
• Analog circuit supply voltage decreases.
Slide 2
Methods to Improve Isolation
• Decreasing noise
injection and noise
reception
– Guard rings
• Cutting the
propagation path
– Silicon on insulator
(SOI)
• High cost
– Proton bombardment
• High cost
– Helium-3 ion irradiation
Slide 3
Top view
Cross view
Noise
injectionNoise
reception
Noise propagation
High resistive region
Digital
circuitAnalog
circuit
Low Resistive
Si Substrate
Digital
circuit
Analog
circuit
Rsub,high»Rsub,low
Csub
Noise
injectionNoise
receptionHigh resistive region
Helium-3 Ion Irradiation
Slide 4
• Cutting the propagation path by increasing the substrate
resistivity
• Can be integrated into the standard process
• The design margin is about 15-mm for active device [1].
Helium-3
• high irradiation
efficiency
• small dose
• low process cost
Ref: [1] Ning Li, et al., TED, vol. 62, no. 4, April 2015.
High
resistive
region Low Resistive
Si Substrate
Al mask
Helium-3 Ion Beam from a cyclotron
Helium-3 bombardment from front
side to create a high resistive region
Aggressor
circuitVictim
circuit
Helium-3 Ion Irradiation Machine
Slide 5
Ion irradiation machine
Ref: https://www.shiei.co.jp/english/cyclotron_iis.html
(a)(b)
(c) (d)
(e)
(f) (g) (h)(i)
(j)
(a), (b): Vertical/horizontal scanning magnets
(c), (d), (e): Turbomolecular pumps
(f): Beam shutter
(g), (h): wafer gate valves
(i): Wafer
(j): Automatic wafer handling device
Configuration of Irradiation System
0
5
10
15
20
25
0 5 10 15 20 25 30 35 40
Qu
alit
y F
acto
r
Frequency [GHz]
Non-irradiation
w/ irradiation
Helium-3 Ion Irradiation Applications
Slide 6Ref.: Ning Li, et al., TED, vol. 62, no. 4, April 2015.
Irradiated area
270mm
Voltage controlled
oscillator
1-nH Inductor
• For inductor
– Improving inductor quality factor
• For voltage controlled oscillator
– 8.5dB improvement in phase noise
0 20 40 60 80 100 120 140
Re
sis
tivity (
Ω∙c
m)
Depth (μm)
Non-irradiation
w/ irradiation
100
101
103
104
105
102
Substrate Resistivity
Slide 7
Si surface
Dose : 2x1013cm-2
40mm 140mm
• Resistivity after helium-3 ion irradiation
0 20 40 60 80 100 120 140
Re
sis
tivity (
Ω∙c
m)
Depth (μm)
Non-Annealing
200℃×1h
400℃×1h Non-irradiation
100
101
103
104
105
102
Substrate Resistivity Cont’d
Slide 8
• Resistivity after annealing at 200ºC and 400ºC for 1h.
Dose : 2x1013cm-2
40mm 140mm
Si surface
Isolation Test
(c) diffusion tap with deep n-well (DNW) guard ring (GR) at one side
Slide 9
Low Resistive Si Substrate
Port1 Port2
High
resistive
region
N+/P+ N+/P+
Low Resistive Si Substrate
Port1Port2GND
P+/N+
GR
N+/P+ N+/P+High
resistive
region
Port1Port2GND
Deep N-well
N+/P+N+/P+
Low Resistive Si Substrate
High
resistive
region
(a) diffusion taps
(b) diffusion tap with
guard ring at one side
EM Simulation
• EM simulator
– HFSS
• Two-port
• P-diff. taps
– Area: 35x70μm2
– Distance: 100μm
• High resistive region
– Width: 50μm
– Thickness
• 65μm
• 130μm
Slide 10
50mm65mm, 130mm
130mm
100mm
High resistive region
P-diffusion35x70mm2
100mm
Top view
Cross view
Simulation Results
• A 10-dB improvement at 2GHz
• As frequency increases, the improvement
decreases due to the capacitive coupling
Slide 11
-50
-45
-40
-35
-30
-25
-20
0 1 2 3 4 5 6 7 8 9 10
S2
1(d
B)
Frequency (GHz)
Before helium-3 ion irradiation
65-mm thickness
130-mm thickness
10 dB improvement
Test Patterns
• W: diffusion width
• L: diffusion length
• D: diffusion taps
distance
Slide 12
Size (W*L)
(mm2)
Diff. Guard Ring
(GR)
Dist.
(mm)
① 35*140 N+ None 100
② 35*140 N+ None 150
③ 35*140 N+ None 200
④ 35*70 N+ None 100
⑤ 35*35 N+ None 100
⑥ 35*140 N+ P+ GR 100
⑦ 35*140 N+ P+ GR
and DNW
100
⑧ 35*140 P+ None 100
⑨ 35*140 P+ N+ GR 100
⑩ 35*140 P+ N+ GR
and DNW
100
DNW: deep n-well
Top view of test
structures
G
G
G
G
S
Top Metal
M1
WLS
3He2+
irrad.
region
D
Chip Photo
• A 180-nm standard CMOS process
• Substrate resistivity about 3~4 Ω∙cm
Slide 13
Chip photo1
2
3
45
6 7
8 109
Chip photo
Mask
Measurement Results (1)
• Measured noise isolation with respect to tap distance
• Increasing D from 100μm to 150μm improves noise
isolation 5dB, from 150μm to 200μm of 3dB at 10GHz
• Increasing D will increase chip area.
Slide 14
G
G
G
G
S
Top Metal
M1
WLS
3He2+
irrad.
region
D
-40
-35
-30
-25
-20
0 5 10 15 20 25 30 35 40
S2
1(d
B)
Frequency (GHz)
D=100
D=150
D=200
①
②
③
Measurement Results (2)
• Measured noise isolation with respect to tap size
• Large diffusion area causes more coupling.
Slide 15
G
G
G
G
S
Top Metal
M1
WLS
3He2+
irrad.
region
D
-40
-35
-30
-25
-20
0 5 10 15 20 25 30 35 40
S2
1(d
B)
Frequency (GHz)
W=35, L=140
W=35, L=70
W=35, L=35
①
④
⑤
-70
-65
-60
-55
-50
-45
-40
0 5 10 15 20 25 30 35 40
S2
1(d
B)
Frequency (GHz)
Non-irradiation
w/ irradiation
w/ annealing
⑦
Measurement Results (3)
• Isolation is maintained after annealing at 200ºC for 1 hour.
Slide 16
TEG Guard Ring
(GR)
⑦ P+ GR
and DNW
G
G
G
G
S
Top Metal
M1
WLS
3He2+
irrad.
region
D
Measurement Results (4)
• Isolation is improved for all test patterns after helium-3 ion irradiation.
• A 10-dB improvement (90% noise reduction) is achieved for patters with GR.
Slide 17
Guard Ring
(GR)
① None
⑥ P+ GR
⑦ P+ GR and
DNW
⑧ None
⑨ N+ GR
⑩ N+ GR and
DNW
G
G
G
G
S
Top Metal
M1
WLS
3He2+
irrad.
region
D
Dist. (mm)
① 100
② 150
③ 200
Size (W*L)
(mm2)
① 35*140
④ 35*70
⑤ 35*35
-60
-55
-50
-45
-40
-35
-30
-25
-20
S2
1(d
B)@
2G
Hz
Test structrue number
Non-irradiation
w/ irradiation
① ② ③ ④ ⑤ ⑥ ⑦ ⑧ ⑨ ⑩
Conclusions
• Helium-3 bombardment is proposed to create a local semi-insulated substrate of high resistibility.
• Noise isolation is improved about 10dB at 2GHz after helium-3 ion irradiation.
• A 90% noise reduction has been achieved for test structures with guard rings.
• The noise isolation can be kept even after annealing at 200ºC for 1 hour.
Slide 18
Acknowledgements
• This work was partially supported by MIC,
SCOPE, and VDEC in collaboration with Cadence
Design Systems, Inc., and Mentor Graphics, Inc.
Slide 19
Thank you for your attention
Slide 20