ehm6307-bİlgİsayar desteklİ devre analİzİ
TRANSCRIPT
EHM6307-BİLGİSAYAR DESTEKLİ DEVRE ANALİZİ
2020-2021 GÜZ DÖNEMİ
ELEKTRONİK DOKTORA PROGRAMI
UZAKTAN EĞİTİM DERS NOTLARI
20 Ekim 2020
Doç. Dr. Umut Engin AYTEN
DEVRE DENKLEMLERİ
İdeal Elemanlar:
+
_
v i
Two-terminal
+
_
v1
i1
Two-port
i1
+
_
v2
i2
i2
DEVRE DENKLEMLERİÇok Kapılı Elemanlar:
DEVRE DENKLEMLERİÇok Kapılı Elemanlar:
DEVRE DENKLEMLERİÇok Kapılı Elemanlar:
DEVRE DENKLEMLERİ
DEVRE DENKLEMLERİ
İdeal Elemanlar:
Ideal elements
Element Branch Eqn
Resistor v = R·i
Capacitor i = C·dv/dt
Inductor v = L·di/dt
Voltage Source v = vs, i = ?
Current Source i = is, v = ?
VCVS vs = AV · vc, i = ?
VCCS is = GT · vc, v = ?
CCVS vs = RT · ic, i = ?
CCCS is = AI · ic, v = ?
DEVRE DENKLEMLERİ
0
1 2
R1G2v3
R3
R4Is5
0
0
11100
00111
5
4
3
2
1
i
i
i
i
i
A i = 0
Kirchhoff’s Current Law (KCL)
N equations
DEVRE DENKLEMLERİ
0
1 2
R1G2v3
R3
R4Is5
0
0
0
0
0
10
10
11
01
01
2
1
5
4
3
2
1
e
e
v
v
v
v
v
v - AT e = 0 B equations
DEVRE DENKLEMLERİ
0
1 2
R1G2v3
R3
R4Is5
55
4
3
2
1
5
4
3
2
1
4
3
2
1
0
0
0
0
00000
01
000
001
00
0000
00001
sii
i
i
i
i
v
v
v
v
v
R
R
G
R
Kvv + i = is B equations
DEVRE DENKLEMLERİ
1 2 3 j B
12
i
N
branches
nodes (+1, -1, 0)
{
Aij = +1 if node i is terminal + of branch j-1 if node i is terminal - of branch j0 if node i is not connected to branch j
DEVRE DENKLEMLERİ
Sparse Table Analysis (STA)Brayton, Gustavson, Hachtel
Modified Nodal Analysis (MNA)McCalla, Nagel, Roher, Ruehli, Ho
DEVRE DENKLEMLERİ
1. Write KCL: Ai=0 (N eqns)
2. Write KVL: v -ATe=0 (B eqns)
3. Write BCE: Kii + Kvv=S (B eqns)
BCE (Branch Constitutive Equations)
Se
v
i
KK
AI
A
vi
T 0
0
0
0
00N+2B eqnsN+2B unknowns
N = # nodesB = # branchesSparse Tableau
Sparse Table Analysis (STA)
DEVRE DENKLEMLERİ
Avantajları:
• Herhangi bir devreye uygulanabilir.
• Giriş verisinden (Spice .cir dosyası) denklemler doğrudan elde edilebilir.
• Matris seyrek yapıda.
ProblemZaman ve bellek verimliliği için gelişmiş programlama
teknikleri ve veri yapıları gereklidir.
Sparse Table Analysis (STA)
DEVRE DENKLEMLERİR3
0
1 2
R1
G2v3
R4Is5
1. KCL: Ai=0
2. BCE: Kvv + i = is i = is - Kvv A Kvv = A is
3. KVL: v = ATe A KvATe = A is
Yne = ins
52
1
433
3
2
3
2
10
111
111
sie
e
RRR
RG
RG
R
Nodal Analysis (NA)
Nodal Matrix
Spice input format: Rk N+ N- Rkvalue
kk
kk
RR
RR
11
11
N+ N-
N+
N-
N+
N-
iRk
sNN
k
others
sNN
k
others
ieeR
i
ieeR
i
1
1KCL at node N+
KCL at node N-
Direnç referans düğümüne bağlı ise ne olur?
….Sadece köşegenekatkıda bulunur.
DEVRE DENKLEMLERİResistor “Stamp”
DEVRE DENKLEMLERİ
Spice input format: Gk N+ N- NC+ NC- Gkvalue
kk
kk
GG
GG
NC+ NC-
N+
N-
N+
N-
Gkvc
NC+
NC-
+
vc
-
sNCNCkothers
sNCNCkothers
ieeGi
ieeGi KCL at node N+
KCL at node N-
VCCS “Stamp”
DEVRE DENKLEMLERİ
Spice input format: Ik N+ N- Ikvalue
k
k
I
I
N+ N-
N+
N-
N+
N-
Ik
Current source “Stamp”
DEVRE DENKLEMLERİ
How do we deal with independent voltage sources?
ikl
k l+ -
Ekl
klkl
l
k
Ei
e
e
011
1
1k
l
Modified Nodal Analysis (MNA)
• ikl cannot be explicitly expressed in terms of node voltages it has to be added as unknown (new column)
• ek and el are not independent variables anymore a constraint has to be added (new row)
DEVRE DENKLEMLERİ
ik
N+ N-+ -
Ek
Spice input format: ESk N+ N- Ekvalue
kE
0
00 0 1
0 0 -1
1 -1 0
N+
N-
Branch k
N+ N- ik RHS
Voltage Source “Stamp”
DEVRE DENKLEMLERİ
How do we deal with independent voltage sources?
Augmented nodal matrix
MSi
e
C
BYn
0
Some branch currents
MSi
e
DC
BYn
In general:
Modified Nodal Analysis (MNA)
DEVRE DENKLEMLERİ
CCCS and CCVS “Stamp”
DEVRE DENKLEMLERİ
Step 1: Write KCLi1 + i2 + i3 = 0 (1)-i3 + i4 - i5 - i6 = 0 (2)i6 + i8 = 0 (3)i7 – i8 = 0 (4)
0
1 2
G2v3
R4Is5R1
ES6
- +
R8
3
E7v3
- +4
Modified Nodal Analysis (MNA)
DEVRE DENKLEMLERİ
Step 2: Use branch equations to eliminate as many branch currents as possible1/R1·v1 + G2 ·v3 + 1/R3·v3 = 0 (1)- 1/R3·v3 + 1/R4·v4 - i6 = is5 (2)i6 + 1/R8·v8 = 0 (3)i7 – 1/R8·v8 = 0 (4)
Step 3: Write down unused branch equationsv6 = ES6 (b6)v7 – E7·v3 = 0 (b7)
0
1 2
G2v3R4
Is5R1
ES6
- +
R8
3
E7v3
- +4
Modified Nodal Analysis (MNA)
DEVRE DENKLEMLERİ
Step 4: Use KVL to eliminate branch voltages from previous equations1/R1·e1 + G2·(e1-e2) + 1/R3·(e1-e2) = 0 (1)- 1/R3·(e1-e2) + 1/R4·e2 - i6 = is5 (2)i6 + 1/R8·(e3-e4) = 0 (3)i7 – 1/R8·(e3-e4) = 0 (4)(e3-e2) = ES6 (b6)e4 – E7·(e1-e2) = 0 (b7)
0
1 2
G2v3
R4Is5R1
ES6
- +
R8
3
E7v3
- +4
Modified Nodal Analysis (MNA)
DEVRE DENKLEMLERİ
0
6
0
0
0
001077
000110
1011
00
0111
00
0100111
0000111
5
7
6
4
3
2
1
88
88
433
3
2
3
2
1
ES
i
i
i
e
e
e
e
EE
RR
RR
RRR
RG
RG
R
s
MSi
e
C
BYn
0
0
1 2
G2v3
R4Is5R1
ES6
- +
R8
3
E7v3
- +4
Modified Nodal Analysis (MNA)
DEVRE DENKLEMLERİ
Avantajları
• MNA yöntemi herhangi bir devreye uygulanabilir.
• Giriş verisinden (Spice .cir dosyası) denklemler doğrudan elde edilebilir.
• MNA yöntemi ile elde edilen matris Yn matrisine yakındır.
Sınırlamalar
• Bazen anaköşegende sıfırlar olur ve temel minörler tekil olabilir.
Modified Nodal Analysis (MNA)
DEVRE DENKLEMLERİ
I51Adc
R2
1k
R3
1k
0
V4
10Vdc R1
1k R1 1 0 1kR2 1 2 1kR3 2 0 1kV4 1 0 DC 10VI5 2 0 DC 1A
𝐺1 + 𝐺2 −𝐺2 1−𝐺2 𝐺2 + 𝐺3 01 0 0
𝑣𝑑1𝑣𝑑2𝑣𝑑3
=0110
kk
kk
RR
RR
11
11
N+ N-
N+
N-
N+
N-
iRk
k
k
I
I
N+ N-
N+
N-
N+
N-
Ik
ik
N+ N-+ -
Ek
kE
0
00 0 1
0 0 -1
1 -1 0
N+
N-
Branch k
N+ N- ik RHS
DEVRE DENKLEMLERİ
SPICE historyProf. Pederson with “a cast of thousands”• 1969-70: Prof. Roher and a class project
• CANCER: Computer Analysis of Nonlinear Circuits, Excluding Radiation
• 1970-72: Prof. Roher and Nagel• Develop CANCER into a truly public-domain, general-purpose circuit simulator
• 1972: SPICE I released as public domain• SPICE: Simulation Program with Integrated Circuit Emphasis
• 1975: Cohen following Nagel research• SPICE 2A released as public domain
• 1976 SPICE 2D New MOS Models
• 1979 SPICE 2E Device Levels (R. Newton appears)
• 1980 SPICE 2G Pivoting (ASV appears)
Circuit Simulation
Simulator:Solve dx/dt=f(x) numerically
Input and setup Circuit
Output
Types of analysis:
– DC Analysis
– DC Transfer curves
– Transient Analysis
– AC Analysis, Noise, Distorsion, Sensitivity
Program Structure (a closer look)
Numerical Techniques:
– Formulation of circuit equations
– Solution of linear equations
– Solution of nonlinear equations
– Solution of ordinary differential equations
Input and setup Models
Output
Formulation of Circuit Equations
Circuit withB branches
N nodes
Simulator
Set ofequations
Set ofunknowns
Referanslar
1. Vedat Tavşanoğlu, ‘Devre Teorisi Ders Notları’, 2005.
2. Prof. Alberto Sangiovanni-Vincentelli, Instructor: Alessandra Nardi ‘Computer-Aided Verification of Electronic Circuits and Systems’, 2002.