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ELE504 Laboratory #1A Electrical & Computer Engineering

Prepared by Dr. M. S. Kassam. Ryerson University, 2014

Select Operational Amplifier Circuits (Review)

1.0 PREAMBLE: The most important single linear Integrated Circuit (IC) is the Operational Amplifier

(Op-Amp). Op-Amps are among the most widely used building blocks for design of

wide variety of linear and non-linear signal processing functions. One of the key reasons

for this is that Op-Amps are nearly ideal voltage amplifiers, which makes the analysis

and design of many Op-Amp based circuits to be simple and straightforward. The

purpose of this laboratory exercise is to do a review of some select ideal Op-Amp based

circuit configurations (beyond ELE302 course) that should be helpful in understanding

building-block concepts for some advanced linear/non-linear circuits to be covered later

in this course

2.0 OBJECTIVE:

To analyze, simulate and investigate the characteristics of Op-Amp circuit configurations such as a basic comparator, a buffer, and a switched polarity inversion converter.

3.0 Pre-Lab ASSIGNMENT (assume Op-Amp to be ideal)

i. For the Op-Amp circuit of Figure 1, assume VI(t) = 5cos(2100t) volts, and the Op-Amp output saturation voltage limit is at +/- 14 volts. If the d.c. threshold

voltage, VTH = 4.0 volts, what will be the value of the output voltage, Vo when VI

is below VTH?, and when it is above VTH? Why? Use the MULTISIM simulation

tool to simulate the circuit operation, and show the scope-screen plots of VI and

Vo signals using the above parameters.

ii. For each of the circuit shown in Figure 2a and Figure 2b, derive the voltage gain, VO/VI when Ri = 10k, Ro = 1k and Rf = 100k. (a) Should the voltage gains be the same? (b) What advantage is there, if any, of using a Buffer in Figure 2b?, and (c) Does the value of Rf matter to the voltage gain of Figure 2b circuit?

Why? Use the MULTISIM simulation tool to simulate both circuit operations,

and show the scope-screen plots of VI and Vo signals, when VI(t) = 5cos(2100t) volts.

iii. For the Op-Amp circuit of Figure 3, assume VI = 4 volts. Determine the value of VO, when Switch (S1) is CLOSED; and when Switch (S1) is OPEN? What

function does this circuit perform? Use the MULTISIM simulation tool to verify

your analysis.

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1 2 3 4

5678

- IN + IN

OUT

VCC-

VCC+

741

deviceCOM

+ 15V

- 15V

NC

NC

NC

Pin Layout

+15V

-15V

(7)

(4)(2)

(3)

(6)VI VO

741

Op-AMP

Figure 1

VTH

+15V

-15VVI

VO

741

Op-AMP

VI

Figure 2a

Figure 2b

Buffer

VO

Ri

RO

Ri

RO

Rf

+15V

-15V

VIVO

741

Op-AMP

Figure 3

R

R

RS1

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4.0 EXPERIMENT & RESULTS:

The Op-Amp to be used from your Kit is:- MC1741CN (BJT) .

Cautionary Notes:

Turn off the power supplies before making any change of circuit, particularly when handling a FET OP-AMP.

Due to high OP-AMP voltage gains involved in the test circuits that can cause instability and unwanted noise injection from long lead power-supply cables, it is always a good design

practice to by-pass all power supply rails on your board with at minimum 10uF polarized

capacitors and 0.1uF non-polarized capacitors between the rails and circuit ground. Do this

as closely as possible to IC devices power supply terminals.

(a) Connect the circuit of Figure 1, and use a sinusoidal signal source of 10 volts peak-to-peak @ 100 Hz for VI. For the Threshold Voltage, VTH use 4 volts d.c.

Display both VO and VI on the Oscilloscope to show at least two cycles on the

screen. Record the specified values as shown below in the Table; and capture the

screen-shot, and then either take a picture of it using a camera or save it on a USB

key, for off-line printing (and pasting below).

Useful Steps & Tips:

Set the Function Generator to provide a sinusoidal input signal, VI = 10 voltp-p at frequency of 100 Hz (with zero-volt d.c., i.e. no d.c. offset voltage). Set the horizontal time-base for 5 msec/div.

Connect VI to channel A and VO to channel B of the Oscilloscope. Set both channels for d.c.-coupling, with vertical sensitivities of 2v/div for channel A and 5v/div for channel B. Use

channel A as your trigger-source for the Oscilloscope.

VO (Pre-Lab) VO (Simulation) VO (Measured)

Vi < VTH

Vi > VTH

Paste the scope screen-shot print below:-

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(b) Implement the circuit of Figure 2a first, and use a sinusoidal signal source of 10 volts peak-to-peak @ 100 Hz for VI. Display both VO and VI on the Oscilloscope

to show at least two cycles on the screen. Record the voltage gain in the Table

below; and capture the screen-shot, and then either take a picture of it using a

camera or save it on a USB key, for off-line printing.

Repeat the above for the circuit of Figure 2b.

Vip-p

measured

VOp-p

measured

Gain (Vo/Vi)

derived from

measurement

Gain

(Vo/Vi)

Pre-Lab

Gain

(Vo/Vi)

Simulation

Fig. 2a no Buffer

Fig. 2b with Buffer

Paste the scope screen-shot print below:-

(c) Implement the circuit of Figure 3. Select an appropriate value for R. For the Switch, S1 either use a physical switch, or simulate the switch by

shorting/removing a wire to/from ground. For VI, use a fixed d.c. voltage of 4

volts. Measure the output voltage, VO when the switch S1 is CLOSED, and when

S1 is OPEN; and record your results in the Table below.

VI

VO

Pre-Lab

VO

Simulations

VO

Measured

Switch

Closed

Switch

Open

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5.0 DELIVERABLES:

Pre-Lab Assignment (both hand written analysis, and simulations results) is to be completed by each student, and shown to your Lab Instructor (TA) at

the beginning of this scheduled Lab period. No mark will be given for

simulations results in the absence of required hand written analysis.

A Short-Form lab report per group is to be submitted to your Lab Instructor (TA) at the beginning of your next scheduled lab period.

The Short-Form report, at the very minimum, must include the following:-

- Pre-Lab Assignment (hand written analysis & simulation results) of each lab partner.

- RESULTS: Clear and concise record of your theoretical and experimental results & observations (e.g. tables, plots,

prints/images of actual waveforms signed off by your TA, etc.)

- CONCLUSIONS: A comparative analysis of the theoretical and actual results/outcomes (together with the values from OP-AMP

specifications) should be provided, with appropriate commentary.

6.0 GRADING SCHEME:

Pre-Lab Assignment (for each student): 40% - Completeness check for all handwritten

analysis and simulation results.

Lab performance (by each Lab group): 30% - Completeness check and Timeliness - Correctness of the Results

Short-form Lab Report (by each Lab group): 30% - Completeness - Design analysis - Correctness & presentation of Results - Merits of Conclusions - Technical writing

Note:

(a) No mark will be awarded for the pre-lab assignment portion to a student if it is not done and shown on time prior to the start of a lab. Such student may not be permitted to work on

the respective lab.

(b) If a student misses the Lab without a valid medical reason, a zero mark will be assigned for the entire Lab to this particular student.

(c) Only test results/plots that are signed by your TA will be considered for grading.