High tolerance to total ionizing dose of Ω -shaped gate field-effect transistorsMarc Gaillardin, Philippe Paillet, Véronique Ferlet-Cavrois, Sorin Cristoloveanu, Olivier Faynot, and Carine Jahan Citation: Applied Physics Letters 88, 223511 (2006); doi: 10.1063/1.2206097 View online: http://dx.doi.org/10.1063/1.2206097 View Table of Contents: http://scitation.aip.org/content/aip/journal/apl/88/22?ver=pdfcov Published by the AIP Publishing Articles you may be interested in Impact of total ionizing dose irradiation on electrical property of ferroelectric-gate field-effect transistor J. Appl. Phys. 115, 204504 (2014); 10.1063/1.4878416 Improved modeling of gate leakage currents for fin–shaped field–effect transistors J. Appl. Phys. 113, 124507 (2013); 10.1063/1.4795403 Flicker noise in n-channel nanoscale tri-gate fin-shaped field-effect transistors Appl. Phys. Lett. 101, 243512 (2012); 10.1063/1.4772590 The empirical dependence of radiation-induced charge neutralization on negative bias in dosimeters based onthe metal-oxide-semiconductor field-effect transistor J. Appl. Phys. 100, 044505 (2006); 10.1063/1.2259814 A comparison of ionizing radiation and high field stress effects in n -channel power vertical double-diffused metal-oxide-semiconductor field-effect transistors J. Appl. Phys. 97, 014503 (2005); 10.1063/1.1826213

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High tolerance to total ionizing dose of �-shaped gate field-effecttransistors

Marc Gaillardina�

IMEP, ENSERG, BP 257, 38016 Grenoble Cedex 1, France

Philippe Paillet and Véronique Ferlet-CavroisCEA-DIF, BP 12, 91680 Bruyères-Le-Châtel, France

Sorin CristoloveanuIMEP, ENSERG, BP 257, 38016 Grenoble Cedex 1, France

Olivier Faynot and Carine JahanCEA-LETI, 17 rue des Martyrs, 38054 Grenoble Cedex 9, France

�Received 3 February 2006; accepted 5 April 2006; published online 2 June 2006�

Ionizing radiation effects are investigated in N-channel metal-oxide-semiconductor triple-gatefield-effect transistors with �-shaped gate fin field-effect transistor �FinFET� architecture. The totaldose response is shown to be dependent on device geometry. A wide FinFET structure behaves likea single-gate fully depleted silicon-on-insulator transistor, showing a noticeable degradation inducedby ionizing radiation. By contrast, an optimized narrow FinFET shows a drastically reducedinfluence of ionizing radiation thanks to the efficient electrostatic control of the potential in thedevice provided by the � gate. A narrow FinFET is shown to be naturally tolerant to a significanttotal dose exposure. © 2006 American Institute of Physics. �DOI: 10.1063/1.2206097�

In order to meet the International Technology Roadmapfor Semiconductor1 �ITRS� specifications for futuretechnologies,1,2 silicon-on-insulator �SOI�-based devices areexpected as excellent candidates. More specifically, deviceswith multiple gates, using double gate,3,4 fin field-effecttransistors,5,6 �FinFETs�, or gate all around7 architectures, ex-hibit promising performances and are opening the realm ofthree-dimensional devices. Among these advanced SOI de-vices, �-field-effect transistors ��FETs� are more advancedtriple-gate FinFETs, where the �-shaped gate wraps most ofthe silicon fin.8,9 This particular architecture �Fig. 1� providesan enhanced electrostatic control on the thin silicon finger�referred to as fin in the following� which replaces the moreusual planar silicon film of traditional SOI metal-oxide-semiconductor field-effect transistors �MOSFETs�. The issueelucidated in this letter is whether this control is goodenough to screen the radiation induced charges trapped in theburied oxide �BOX� that usually degrade electrical character-istics of transistors. A total dose exposure can induce inter-face states and a positive charge trapped in thick oxides.10–12

In planar SOI technology, positive charge trapping at theBOX-silicon interface is known to be predominant,13–16 in-ducing a negative back-channel threshold voltage shift, thustriggering a parasitic back-channel conduction.17,18 Due tothe strong vertical electrostatic coupling between the frontand the back interfaces,19 the effects of irradiation result inthe lowering of the front-channel threshold voltage.20,21

In multiple-gate devices, the lateral coupling becomesdominant, leading to more complex three-dimensional ef-fects. These effects are geometry dependent, varying with thesilicon fin width �Wfin� and thickness �Tfin�. The total ioniz-ing dose response of �FETs is thus investigated for variousWfin.

Advanced �FETs were fabricated at CEA-LETI on stan-dard P-type Unibond® substrates with a BOX thickness of100 nm. Fin corners were rounded by oxidation and the sili-con body was overetched resulting in �-shaped gates, asschematically described in Fig. 1. The front-gate oxide wasprocessed in two steps: a thin silicon dioxide layer wasgrown before the HfO2 deposition. The resulting equivalentoxide thickness is equal to 1.92 nm. The final thickness ofthe silicon film �Tfin� is 25 nm. The channel is left undoped��1015 cm−3� and a midgap TiN metal gate completes thegate stack, resulting in a front-channel threshold voltageVT,F�0.56 V. The fin widths vary from 40 nm to 10 �mand only long gate devices �10 �m� are used to avoid thepresence of any short-channel effect to separate the impact ofionizing radiation from other potential parasitic influences.The devices were irradiated with 10 keV x-rays using anARACOR model 4100 at a constant dose rate of 100 rad�SiO2� / s. The bias condition during irradiation was the off-state: the drain was biased at the nominal drain voltage VDD

a�Electronic mail: marc.gaillardin@cea.frFIG. 1. Schematic configuration of the �FET. The metal gate wraps thesilicon body �fin� and the BOX is overetched.

APPLIED PHYSICS LETTERS 88, 223511 �2006�

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and the other terminals were grounded. VDD was set to 0.7 V,as stated on the ITRS specification for the low powercomplementary metal-oxide-semiconductor �CMOS� 45 nmtechnology node.

Previous studies22,23 showed that electrostatic couplingeffects occur in nonplanar devices, and are strongly geom-etry dependent. For a wide fin transistor �Wfin�Tfin�, theelectrostatic behavior is dominated by the front and the backgates. The control of the lateral gates on the potential in thesilicon body and in the BOX is relatively weak. The couplingis essentially vertical, as in a single-gate fully depleted �FD�SOI transistor. In this case, the front-gate surface potentialdepends on the back-gate surface potential, i.e., the back-gateapplied voltage. Since ionizing radiation induces a positivecharge trapping in the BOX, the back-surface potential isincreased. In other words, a total ionizing dose exposure actsas a positive back-gate bias, and impacts the electrical char-acteristics of the wide fin device.

For a narrow FinFET �Wfin�Tfin�, the fringing field in-duced by the shape of the lateral gates, takes control of thepotential in the BOX and at the silicon-fin �Si-fin�/BOX in-terface. The standard coupling between the front and backinterfaces is greatly attenuated.22,23 The higher the aspect ra-tio �Tfin /Wfin�, the weaker the back gate influence. Chargeseparation and trapping during irradiation in oxide layers aregoverned by the local electric field. Because of the �-shapedgate, the electric field lines from the drain are shielded by thegate contact, and do not efficiently reach the Si-fin/BOX in-terface. It can thus be expected that less charge trapping willoccur near the back interface of the active silicon for verynarrow FinFET architectures. The spatial distribution of thetrapped charge is different in this case: it is located closer tothe lateral gate contacts and at the bottom of the BOX, re-ducing its impact on the device response.

Figure 2 shows the ID-VG,F characteristics for a narrowand a wide FinFET, both before irradiation and after a500 krad �SiO2� exposure. The device with a large fin widthexhibits a negative front-gate threshold voltage shift �VT,F ofabout 200 mV, revealing the buildup of a positive trappedcharge in the BOX, near the Si-fin/BOX interface. On theother hand, in the case of a narrow fin device, the decrease ofthe front-gate threshold voltage cannot be directly observedon these characteristics, even after a total dose of 500 krad�SiO2�. This confirms the geometry dependence of ionizing

radiation effects on the electrical behavior of �FETs anddemonstrates the high tolerance of narrow fin devices to totalionizing dose.

Figure 3 illustrates the decrease of the front-channelthreshold voltage as a function of fin width, after severaltotal dose steps. �VT,F strongly decreases as Wfin is reducedfrom 2 �m down to 40 nm. Similarly to a single-gate FDSOI transistor, the electrical behavior of devices with a finwidth higher than 1 �m is dominated by the front and theback gates, and the contribution of the lateral gates is negli-gible. The fringing electric field lines originating from thedrain penetrate into the BOX and reach the Si-fin/BOX in-terface. Radiation-induced electron-hole pairs are separatedby the electric field, and the density of charges trapped nearthe fin increases with increasing total dose. This results in thenoticeable threshold voltage shift observed in Fig. 3. Fordevices with a gate width below 1 �m, the lateral gates tendto take control of the back interface potential, both reducingthe amount of positive charge trapped in the BOX andshielding its influence on the electrical characteristics of thedevice thanks to the more efficient lateral coupling. Not onlyis the standard vertical coupling effect reduced, but also thelongitudinal penetration of the fringing electric field from thedrain to the channel �drain-induced virtual substrate biasingeffect�24 is prevented. As the spatial distribution of thetrapped charge in the BOX depends directly on the shape ofthe electric field lines, it is intrinsically reduced near theactive silicon region by the narrow �FET geometry. Theimpact of the device geometry is most effective in the finwidth range below 150 nm down to 40 nm, where the thresh-old voltage shift is almost negligible.

To illustrate the influence of device geometry on the dis-tribution of the potential and the electric field, numericalsimulations were performed using a standard drift-diffusionmodel.25 The devices �with Wfin=40 nm and Wfin=1 �m�were biased in the off-state condition, with 0.7 V applied onthe drain. Figure 4 displays the simulation of the electrostaticpotential in the middle of the silicon finger, in a cut along thesource-drain direction. The electric field lines in the deviceare perpendicular to the isopotential surfaces, and are illus-trated as white arrows in Fig. 4.

In the wide fin device, the lateral gates are unable toprovide a good electrostatic control of the potential in thesilicon finger. Their influence is negligible compared to theone from the other electrodes, thus the distribution of the

FIG. 2. Drain current vs front-gate voltage characteristics of �FETs with finwidths Wfin=2 �m and Wfin=40 nm, before �solid lines� and after irradia-tion �dashed lines�.

FIG. 3. Front threshold voltage shift vs silicon fin width for several totaldose steps. VD=VDD and VG,B=0 V.

223511-2 Gaillardin et al. Appl. Phys. Lett. 88, 223511 �2006�

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electrostatic potential in the middle of the film is similar tothe one in a planar device with the same dimensions. As in asingle gate FD SOI transistor, the electric field lines originat-ing from the source and drain penetrate the BOX and canreach the Si-fin/BOX interface under the channel region�white arrows in Fig. 4�b��. The radiation-induced chargecarriers then follow these field lines and are efficientlytrapped at the Si-fin/BOX interface, resulting in a front chan-nel threshold voltage shift by vertical electrical coupling.

In the narrow fin device, the lateral gates provide a goodelectrostatic control of the potential both in the BOX and inthe silicon film. The shape of the electrostatic potential for-bids any electric field line from the source and drain contactsto reach the silicon film under the channel area. Most electricfield lines between source and drain, illustrated as white ar-rows in Fig. 4�a�, are shown to leave the drain region of thesilicon film and reach the bottom of the BOX. The fringingelectric field lines, in the direction perpendicular to thesource-drain axis �not shown here�, point at the lateral gatecontacts. In any case, the electric field lines do not point atthe silicon finger, contrary to the simulation results for de-vices with a wide finger. The radiation-induced charge carri-ers will then follow the electric field lines and be trappeddeeply into the BOX, either near the lateral gates or at thebottom interface, where positive charges do not have a sig-nificant influence on the transistor’s electrical behavior.

In summary, we experimentally show the total ionizingdose tolerance of �FETs with scaled device geometry. Widefin devices tend to behave like their single gate planar FDSOI counterparts, exhibiting a negative front-gate thresholdvoltage shift induced by charge trapping in the BOX underthe channel region. On the other hand, optimized narrow findevices are tolerant to a significant total ionizing dose expo-sure, thanks to the efficient electrostatic control provided bytheir lateral gates. Further work is under way to investigatesingle event effects on this generation of SOI devices. Ulti-mate technology scaling will probably require the develop-ment of such three-dimensional devices with narrow dimen-sions. The promising tolerance of these devices to total

ionizing dose should promote the interest of the nuclear andspace community toward the development of �FETs-basedintegrated circuits.

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FIG. 4. Cut in the middle of the silicon film along the source-drain direc-tion: simulated electrostatic potential in the off-state bias condition in�FETS with Wfin=40 nm �a� and Wfin=1 �m �b�.

223511-3 Gaillardin et al. Appl. Phys. Lett. 88, 223511 �2006�

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