hr 045 職場經驗分享2

ASIC • IP • AND BEYOND

職場經驗分享Sharing the Working

Experience


March 2005March 2005

Frank ChengFrank Cheng 鄭順發International Business Operations /International Business Operations /

Field Marketing DevelopmentField Marketing Development

frankcheng@[email protected]

Contents Self Introduction

Sharing in Working Experience

Job Opportunities

Open Discussion

2



Job Opportunities

Open Discussion

3

Self Introduction - I

Graduated from 電子資訊研究所 - 甲組 in 1996

Live in HsinChu

Married with 2 sons

Career history

4

1st job in SRRC 同步輻射研究中心 (1996/7-1997/7) - 1yr

2nd job in ITRI’s 量測中心 (1997/7-1999/6) - 2yrs

3rd job in AMIC 聯笙電子 (1999/6-2000/2) -.75yr

4th job in Faraday 智原科技 (2000/2 ~ ) - 5yr

Self Introduction - II SRRC 同步輻射研究中心 (1996/7~1997/7)

Division: 注射器組

Maintained the Booster(加速環) 設備

Power system

Electronic controlling system

Maintain Work Station and Setup Website

5

Why did I work for SRRC??? Higher salary $$$$$

A stabile job

To be a civil servant

Why did I quit this job??? Radiation

A bit too stable

????

$$$$$

lost ~1/3

Self Introduction - III ITRI 量測中心 (1997/7 ~1999/6)

Division: 超音波部

Digital system designer for Ultrasonic Diagnostic System Developed the controller of whole system and system platform

Built up the FPGA design flow (Actel) and Interfaced the ASIC house.

Developed the Nebulizer（霧化器) product

6

Why did I work for ITRI??? Trend in biological medicinal engineering

A good opportunity because the whole division would be spun offfrom ITRI.

A good training environment, Graduate student alike

Why did I quit this job??? Manager did not want to spin off

Get back to IC design field

Self Introduction - IV

AMIC (1999/6 ~2000/2)

Division: Consumer Product

Developed the 8 bit uP based audio decompression chip

Why did I work for AMIC???

7

Why did I work for AMIC???

IC design trend for acoustic recognition

Recall the IC design capability

Economic Issues

Why did I quit this job???

主管操守有問題……..

Self Introduction - V

Core Technology Division

Responsible for MIPS-clone CPU implementation and migration

in different process.

Companion IP designer

About Faraday

8

Companion IP designer

SIS – ARM Service Center

Transferring ARM’s framework of SoC technology to Faraday

Built up the ARM developing flow in Faraday

Customer service and promotion for ARM core based ASIC


IP Service Development

Post-Sales for 8bit uP (80xx), 32bit processor core such as ARM

core, MIPS-clone core and Companion IP

Pre-Sales for SoC based IP and Related Platform

9

OBD (Overseas Business Department)

Responsible for Overseas ASIC/IP project

Responsible for the development of SoCreative! Platform


IBO國際營運中心 – Field Marketing Development

Research in Strategy Marketing

Come out the new product plan and then

Research in specific topic for subsidiary company

10

Technical supporting for Faraday’s customer in Europe, Japan

and USA

SoC based ASIC project cooking

Product Promotion

Resource backup



Job Opportunities

Open Discussion

11

My Personal Opinions – I Job Position

現在未來＝

12

＝

工作資歷的累積 - 影響未來滾石不生苔 –頻換工作專業設計能力

RDProjectLeader

CTOProjectManager

? Years ? Years ? Years

立志：我要做RD ..我真的是RD ..我還是RD

My Personal Opinions – II

Job Position

現在未來＝

13

＝立志：我要做RD 我還是RD????

RD

DigitalDesign

FAE(Post-Sales)

Promotion(Pre-Sales)

Marketing

$$$$

My Personal Opinions – III

Job Outlook

- Your Target -

VS.$$$$$ 工作

14

能力好＋公司營運好＝＄＄＄＄＄＄＄（機會＋運氣）能力不好＋公司營運好＝＄＄＄＄＄＄（運氣）能力好＋公司營運不好＝＄＄（找機會）能力不好＋公司營運不好＝＄ (????, 向上努力吧!)

不要幻想在科學園區就能賺大錢不是每一個人都在聯發科技

工作靠實力,賺錢靠運氣

My Personal Opinions – IV

你即使離職了，公司………還是活得好好的……… ^_^

拋開本位主義

RD/Project Leader Marketing/Sales

15

1. 為何Sales老是接一些奇怪的案子?

2. Sales 只出一張嘴？

3. 產品Delay一下有啥關係?

1. 公司業績不好, 老板催訂單

2. 接案子 - 沒問題Design 有 Bug - 沒關係Bug 無解,Re-design- 沒辦法

3. Schedule Delay錢收了, Time-to-Market (?)

My Personal Opinions – V

坐這山望那山

他都沒做什麼事?

Sales – 尊嚴, 客戶財務結構, 業績……

Designer – 研發, Schedule 壓力

Ｍarketing – 市場分析, 產品決策

16

Ｍarketing – 市場分析, 產品決策

Service 人員沒啥技術能力?

罰站, 被罵, 向客戶賠不是……

總機小姐甜美的聲音……….客戶也會時常問候 ……… ^.^

公司會賺錢 : 研發,銷售, 客服大家努力而成，絕非個人

Suggestions

肯定自我/他人工作價值 – 工作愉快，相處融洽

積極主動 – 多做未必是錯，機會在將來

廣結善緣 – 圈子很小，到處是熟人

溝通能力 – 各式各樣職務

– Global Company

17

語文能力 – Global Company

(D-Link, BenQ, Acer, Foxconn, TSMC, UMC, ..) => CEO is Italian.

國際觀

Customer from Great China, Europe, Korea, Japan, USA

Competitor in WW

Business in WW

No Time Lag for Internal Business EUP <- TWN -> USA

17:0001:00 09:00


Sharing Working Experience

Job Opportunities

Open Discussion

18

Job Opportunities

Head Count : 2 for Field Marketing

Strategize, Conceive, Research RISC CPU and SOC RelatedProduct Plan

Technical promotion, support on platform-based SoC design

19

Needed Background

Major in EE or Computer Engineering

Experience in IC/SOC Integration, IP Technology or Chip-SetDesign (at least 4 years)

Frank ChengFrank Cheng 鄭順發, 03-5787888 ext. 8606

[email protected]

Q & A

20

Q & A

Thank You!

Faraday: at a Glance Spun off from UMC in 1993

UMC owns 20%+ of Faraday

UMC & Faraday still share same chairman

Strategic IP partnership

Fabless ASIC and IP provider

Solid business model of 45% GM, 25% net, 30%+ CAGR

21

Diversified customers & markets

Listed in Taiwan exchange in 1999

Today’s operation

500+ employees worldwide, 330+ in R&D

Contact Faraday www.faraday-tech.com

22

Faraday USA

Sunnyvale, CA

TEL: +1. 408.522.8888

[email protected]

Faraday Netherlands

Amsterdam

TEL: + 31.23.56.20496

[email protected]

Faraday China

Shanghai

TEL: + 86.21.6406.7523

[email protected]

Faraday Japan

Tokyo

TEL: + 81.3.5214.0070

[email protected]

Faraday Taiwan (HQ)

Hsinchu & Taipei

TEL: + 886.3.5787888

[email protected]

3,000

3,500

4,000

CAGR = 37.68%

Financial Achievements

110.8 Million USD2004 revenue:$155M35%+ CAGR since‘97

23

0

500

1,000

1,500

2,000

2,500

1997 1998 1999 2000 2001 2002 2003

Mill

ion

NTD

Faraday Offers

ASIC Front-End

Architecture Specifications

Behavior Modeling

ASIC Back-End

Mask Tooling

Wafer Manufacturing Services

IP

Libraries / Memories

ASIC Design Services, SoC Design Services, Proven IPSolutions

24

RTL Code Generation

Synthesis

Gate Level Verification

Test Pattern Generation

Post Layout Verification

Wafer Manufacturing Services

IC Packaging Services

Circuit Probing & Final Testing

Product Engineering

System-on-a-Chip

Microprocessors

Digital / Analog

Platform

Reliability Test ServicesPhysical Implementation

ASIC Infrastructure & Expertise

More than 100 people in ASIC Technology

ASIC implementation, testing, yield, and FA (70)

Design methodology & integration (35)

Production planning, logistic, and quality (25)

10 years of experience on average

25

10 years of experience on average

More than $50M invested in infrastructure

eRD, ERP, Testers, ESD machine, die/wafer bank

Complete integration of R&D, FIN, customer project, and production

shipment

More than 200 project tape-outs in ’04 alone

40% test chips

10% in 0.13um, including four customer ASICs

2003 Sales Breakdown (2-1)

Peripheral

31.2%

Video/Display

10.0%

Others

2.1%

Image

5.1%

By application

26PS: Ex-IP sales revenue

Storage

26.8%

Communication

11.0%

Consumer

13.8%

2003 Sales Breakdown (2-2)

China

2.6%Japan

4.1%

Europe

0.9% Korea

0.8%

Others

1.4%Foundry

6.8%

IDM

2.3%

Design House

55.6%

By customer type By geography

27

USA

26.3%

4.1% Taiwan

65.3%

``̀

6.8% 55.6%

System House

33.9%


TechnologyRoadmaps


Cell Library Roadmap

90nm 90nm SP-Rvt / Low-K

65nm 65nm SP

90nm LL-Rvt / Low-K＊

＊

＊＊

＊

29

2004-07 10 2005-01 4 7 10 2006-01 4 7 10 2007-01

130nm

0.15µm SP0.15µm

90nm LL-Hvt / Low-K

130nm L130E SP / FSG

Legend Description：Rvt： Regular Threshold VoltageHvt： High Threshold VoltageSP ： Standard PerformanceLL ： Low Leakage

＊

＊

＊

＊

＊

Note: The right edge of each block denotesthe IP’s formal release date. For more details,please visit our website at:www. faraday-tech. com

Memory Compiler Roadmap

90nm

65nm

90nm SP-Svt / Low-K

65nm SP

90nm SP-Hvt / Low-K

90nm SP-Svt / FSG

90nm LL-Rvt / Low-K＊

＊

＊

＊

＊

＊

＊

30

2004-07 10 2005-01 4 7 10 2006-01 4 7 10 2007-01

0.15µm

130nm L130E Fusion / FSG

130m L130E HS / FSG

0.15µm SP

130nm

130nm L130E SP / FSG

130nm L130E LL / FSG

Legend Description：Rvt：Regular Threshold VoltageHS： High SpeedHvt：High Threshold VoltageSP ：Standard PerformanceLL：Low Leakage

＊

＊

＊

＊

Note: The right edge of each blockdenotes the IP’s formal release date. Formore details, please visit our website at:www. faraday-tech. com

＊

Analog Essential IP Roadmap

130nm

0.18µm

0.25µm

90nm

0.15µm

PLL

130nm HS / FSG 400MHz PLL

90nmSP / FSG 1GHz PLL

90nm SP / FSG 2GHz PLL

130nm HS / FSG 1GHz PLL

130nm HS / FSG 1.6GHz PLL

130nm HS / FSG MiniPLL

0.18µm GII MiniPLL

0.15µm 1.5V 300MHz PLL＊

＊

＊

＊

＊

＊

31

0.25µm

0.35µm

RC-OSC 130nm RC-OSC

2004-07 10 2005-01 4 7 10 2006-01 4 2006-07 10 2007-01

DLL

130nm HS / FSG 533Mb/s DLL

130nm HS / FSG 400Mb/s DLL

90nm SP / FSG 800Mb/s DLL

90nm SP / FSG RC-OSC

0.15µm 1.5V 400Mb/s DLL

130nm HS / FSG Wide Range DLL

0.18µm GII MiniPLL

VDT 90nm VDT130nm HS VDT0.18µm GII VDT

PWM 0.18µm GII > 50mA PWM130nm HS > 50mA PWM 90nm SP PWM

POR / BG 0.18µm GII POR 130nm BG 0.15µm POR90nm BG

REG 0.18µm REG0.15µm REG

130nm REG 90nm REG

0.18µm GII RC-OSC

Legend Description：HS： High SpeedSP ： Standard Performance

＊

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3-channelDAC

130nm

0.18µm

0.25µm

0.35µm

90nm

0.15µm

ADC

DAC

0.18µm 10-bit 80MHz ADC

130nm 8-bit 125MHz ADC

0.25µm 10-bit 150MSPS3-channel DAC

0.18µm 8-bit 44MSPS DAC

130nm 12-bit 100MSPS DAC

0.18µm 10-bit 150MSPS 3-channel DAC

0.25µm 6-bit 44MHz

130nm 10-bit 80MHz ADC

Analog Data Conversion &Serial Link IP Roadmaps

32

2007-01

Sigma-DeltaCodec

RSDS TX

DAC

Note: The right edge of each block denotes the IP’s formal release date. For more details, please

visit our website at: www.faraday-tech.com

LVDSTX / RX

130nm 16-bit Audio Codec

102004-07 10 2005-01 4 7 10 2006-01 4 7 10 7

0.25µm 16-bitAudio Codec

130nm 10-bit 150MSPS 3-chanel DAC

0.25µm 18-bitAudio Codec

0.18µm 16-bit Audio Codec

0.35µm RSDS

0.35µm LVDS

0.25µm RSDS

0.25µm LVDS

0.18µm LVDS

0.25µm miniLVDS

0.18µm 1.8VLVDS

130nm LVDS

USB IP Roadmap

130nm

0.18µm

0.25µm

0.35µm

90nm

FPGA

0.15µm

FPGA USB2.0 2-portHost PIE FUSBH210

USB 2.0 OTG PIE

USB 2.0 Host PIEFPGA USB2.0 Host PIEFUSBH200

FPGA USB2.0 OTG PIEFOTG200

33

2004-7 10 2005-01 4 7 10 2006-01 4 7 10

USB 2.0 OTG PHY 90nm USB 2.0 OTG PHY

USB2.02-port PHY

130nm USB 2.0 2-port PHY

0.25µm USB2.0OTG PHY

130nm USB2.0 OTGPHY HS

130nm USB2.0 OTG PHY SP

0.18µm USB 2.0 Device PHY v36USB 2.0

Device PHY

Legend Description： HS：High SpeedSP：Standard Performance

＊

＊

＊


Serial-ATA IP Roadmap

Serial-ATAPHY

130nm

0.18µm

0.25µm

0.35µm

90nm

FPGA

0.15µm

130nm 3Gbps SATA PHY

130nm Multi-Port SATA PHY

34

Serial-ATAController

Note: The right edge of each block denotes the IP’s formal release date. For more details, pleasevisit our website at: www.faraday-tech.com

2004-7 10 2005-01 4 7 10 2006-01 4 7 10

FPGA Serial-ATA ControllerWith AHB I/F

PCI Express IP Roadmap

130nm

0.18µm

0.25µm

0.35µm

90nm

FPGA

0.15µm

PCI ExpressPHY

130nm Single-lane PHY x 1 lane

0.18µm Single lane PHY x 1 lane

35



PCI ExpressController

2004-7 10 2005-01 4 7 10 2006-01 4 7 10

FPGA PCI-Express ControllerEnd-point (PIPE)

130nm Multi-lane PHY x 4 lane

Ethernet Roadmap

130nm

0.18µm

0.25µm

0.35µm

90nm

0.15µm10/100EthernetPHY

130nm HS 10/100 Ethernet PHY

0.18µm 10/100 4- portEthernet PHY

0.25µm10/100Ethernet PHY

＊

36

0.35µm

2004-7 10 2005-01 4 7 10 2006-01 4 7 10

Legend Description：HS：High Speed＊ Note: The right edge of each block

denotes the IP’s formal release date. Formore details, please visit our website at:www. faraday-tech. com

Digital IP Roadmap

Communication

10 / 100 MAC Gigabit MAC

MPEG4 Encoder / Decoder

DES / 3DES Security Engine

Wireless LAN 802.11a / b / gMAC / BBP

Multimedia

37

Peripheral

2003-01 4 7 10 2004-01 4 7 10 2005-01

MS Pro Card Controller

LCD Controller

TV Encoder

DDRI Controller



DDRII Controller

Faraday CPU RoadmapClock (MHz)

500

800

130nm HS FA626

90nm HS FA626

130nm

0.18µm

0.25µm

0.35µm

90nm

FPGA

0.15µm

＊

＊

38

2004-7 10 2005-01 4 7 10 2006-01 4 7 10

200

300

400

0.18µm FA510

0.18µm FA526

130nm HS FA526 HS

130nm FA501

130nm LL FA526L

Note: Left and right edges indicate Tapeout and Silicon proven schedulerespectively. For more details please visitour website at: www. faraday-tech. com

Legend Description：HS：High SpeedLL：Low Leakage

＊＊

＊

Faraday StarCell™ IP

DMA Controller

Static Memory Controller

SDRAM Controller

UART

CF Host Controller

Memory Stick Host Controller

GPIO

10 / 100M Ethernet MAC / PHY

Faraday provides a comprehensive portfolio of Peripheral IPs , as the

following list ,which are available right now：

39

UART

Timer

Watchdog Timer

Real Time Clock

Interrupt Controller

SD Host Controller

KBD / Mouse Controller

Synchronous Serial Port

Fast IrDA Controller

10 / 100M Ethernet MAC / PHY

PCI 33 / 66

USB 1.1 Device Controller / PHY

USB 2.0 Device Controller / PHY

Smart Media Host Controller

USB 1.1 FS / LS OTG

DDR Memory Controller

LCD Controller

TV Encoder

DSP Roadmap

0.18µm

130nm130nm FusionFD216

130nm FusionFD230-24

130nm

0.18µm

0.25µm

0.35µm

90nm

FPGA

0.15µm

40



2004-7 10 2005-01 4 7 10 2006-01 4 7 10 2007-01

FD216_H90AHardcore

0.18µm FD216_HA0AHardcore(w/ mailbox)

0.25µm

0.18µmCo-Processor

Networking Platform Roadmap

NetComposer-I:

• 500MHz 32-bit CPU

(FA626, 130nm, 1.08V, 125°C)

• GMAC (*2)

• Switch Fabric

NetComposer-II:

• 600MHz 32-bit CPU

(FA626, 130nm, 1.08V, 125°C)

• 8 Programmable Serdes

• GMAC (*2)

• Switch Fabric

• Coherence Engine

• MPCA (Customer Engine)

41

2004 20062005Q4 Q1 Q2 Q4

• Switch Fabric

• Coherence Engine

• MPCA (Customer Engine)

• PCI-X 133MHz

• DDR-333 Controller

Net-Composer-I

(NC-I)

Q3

• PCI-X 133MHz

• DDR-400 Controller with ECC

Net-Composer-II

(NC-II)



Multimedia Platform Roadmap

FIE8150:

• FA526 Cache 16K/16K

• MPEG4 Codec CIF~D1 @ 30fps

• JPEG standard Codec

• TFT LCD, PCI, USB 2.0 OTG, IDE FIE8200

FIE8200:




• ISP, 2D/3D Graphic Engine

• 300K MPCA (Metal ProgrammableCell Array)

42

Q3 Q4 Q1 Q3

FIE8100:




• USB 2.0 Device

• TFT LCD controller

• TV encoder

FIE8100

Q22005



FIE8150

• TFT LCD, PCI, USB 2.0 OTG, IDE

• 10/100 Ethernet

• WLAN802.11a/b/g

• 300K MPCA (Metal ProgrammableCell Array)

Q4

IA Platform Roadmap

WLAN +VoIP

FIE7100

• 0.18µm process

FIE7110

• 0.13µm process• FA501, USB OTG

Wi-Fi Phone Ultra Low PowerWi-Fi Phone

UWBFIE7200

• 0.13µm process• UWB MAC+BBP+RF

WirelessUSB

43

• 0.13µm process• FA501, USB OTG• 20-bit Audio DAC,• LCD controller,• TV encoder, IDE/CFII

2006Q1 Q2 Q4Q32005



Q1

USB OTGFIE7000

• 0.18µm process• FA526, USB OTG• Audio Codec,• LCD controller,• IDE/CFII

• 0.18µm process• FA526, FD230-16• WLAN 802.11g,• LCD controller

FIE7010PAP

• FA501, USB OTG• WLAN 802.11g,• Audio/Video Codec,• LCD controller, TV encoder

Ultra Low PowerPAP

Structured ASIC Family Roadmap

130nm

90nm

130nmHS MPIO

90nm SP-Hvt MPCA Library

90nm SP-Hvt MPIO

130nm TEMPLATE FIT9500

130nmLL MPIO

130nmSP MPIO

130nm TEMPLATE FIT9600 130nm TEMPLATE FIT9700 130nm TEMPLATE FIT9800

130nm TEMPLATE MP-Ware

130nm TEMPLATE Producer II

90nm LL-Hvt MPCA Library

90nm LL-Hvt MPIO

130nmHS MPCA

130nmLL MPCA

130nmSP MPCA

＊

＊＊

＊

0.18µm

130nm

0.35µm

90nm

FPGA

0.15µm

＊

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＊

＊＊

＊

＊

＊

＊＊

＊＊

＊＊

＊

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＊

44

Note: The right edge of each blockdenotes the IP’s formal release date. Formore details, please visit our website at:www.faraday-tech.com

0.18µm

0.15µm

0.25/0.22µm

2004-07 10 2005-01 4 7 10 2006-01 4 7 10 2007-01

0.18µmLL MPCA

MPIO

0.18µmGII MPCA

0.15µmSP MPCA

0.15µmSP MPIO

130nm TEMPLATE FIT9500

0.18µmGII MPIO

130nm TEMPLATE FIT9600 130nm TEMPLATE FIT9700 130nm TEMPLATE FIT9800

＊＊

Legend Description: Hvt： High Threshold VoltageSP ： Standard PerformanceLL ：Low LeakageMPCA：Metal Programmable Cell ArrayMPIO：Metal Programmable IOHS：High Speed

＊

＊＊

＊

＊

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45

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