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Electric Circuits Fall 2015 Homework #4

1

HW Solution#4

4.1 [8%]

The op amp in Fig. 1 has 𝑅𝑖 = 100kΩ, 𝑅𝑜 = 100Ω, 𝐴 = 100,000. Find the differential

voltage 𝑣𝑑 and the output voltage 𝑣𝑜.

Fig. 1

Solution

[2]

At node 1, Vs−V1

10k=

V1

100k+

V1−V0

100k (1) [2]

At node 2, V1−V0

100k=

V0−(−AVd)

100 (2) [2]

Since Vd = V1, A = 100,000,Vs = 1mV, From (1) and (2),

Vd ≈ 100nV [1]

V0 ≈ −10mV [1]


2

4.2 [6%]

Determine the output voltage 𝑣𝑜 in the circuit of Fig. 2.

Fig. 2

Solution

Transform the current source as shown below. At node 1,

10−V1

5k=

V1−V2

20k+

V1−V0

10k (1) [2]

At node 2,

V1−V2

20k=

V2−V0

10k (2) [2]

Since V2 = 0, From (1) and (2), V0 = −2.5V [2]


3

4.3 [9%]

In the circuit shown in Fig. 3, find 𝑘 in the voltage transfer function 𝑣𝑜 = 𝑘𝑣𝑠.

Fig. 3

Solution

We notice that v1 = v2. Applying KCL at node 1 gives

v1

R1+

v1−vs

R2+

v1−v0

Rf= 0 (1) [2]

Applying KCL at node 2 gives

v1

R3+

v1−vs

R4= 0 (2) [2]

From (1) and (2),

v0 = Rf [(1

R1+

1

R2+

1

Rf) (

R3

R3+R4) −

1

R2] vs [4]

i.e.

k = Rf [(1

R1+

1

R2+

1

Rf) (

R3

R3+R4) −

1

R2] [1]


4

4.4 [11%]

It is common in electronics to convert a current signal into a voltage signal. One case where

this is necessary, is when converting the photocurrent generated by a photodiode into a

voltage signal for downstream processing electronics. A photodiode acts similar to a normal

diode except it converts input optical power into a photocurrent. A photodiode must also be

reverse biased for optimal operation.

As shown below, we can model a photodiode as an ideal current source with photocurrent

given by 𝐼𝑝ℎ = 𝑅𝑖𝑃𝑜𝑝𝑡 where 𝑃𝑜𝑝𝑡 is the aborbed optical power [W] and 𝑅𝑖 is the current

responsivity assumed to be 0.9 [Amps/Watt]. Note that 𝐼𝑝ℎ flows from the cathode to the

anode since the diode is reverse biased. For this problem, we can ignore the diode leakage

current.

Fig. 4(a)

(a) One way to both reverse bias the photodiode and convert the current into a voltage is with

the circuit below in which the photocurrent is sent into a resistor. For this configuration

calculate:

i) The voltage responsivity, 𝑅𝑣 =𝑉𝑜𝑢𝑡

𝑃𝑜𝑝𝑡

ii) A drawback of this configuration is that the diode bias is not constant. Find the input

optical power at which the diode is no longer reverse biased.

Fig. 4(b)

(b) A good way to convert the diode photocurrent into a voltage is with the following

transimpedance amplifier (TIA). For this problem calculate:

i) The voltage across the diode. Does it depend on 𝑃𝑜𝑝𝑡?


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ii) The transimpedance gain, 𝐺 =𝑉𝑜𝑢𝑡

𝐼𝑝ℎ and,

iii) The voltage responsivity, 𝑅𝑣 =𝑉𝑜𝑢𝑡

𝑃𝑜𝑝𝑡

Fig. 4(c)

Solution

a) Employing the model for the photodiode as a current source gives the figure below:

i) From ohms law:

𝑉𝑜𝑢𝑡 = 𝐼𝑝ℎ𝑅𝐿 = 𝑅𝑖𝑃𝑜𝑝𝑡𝑅𝐿 [1]

𝑅𝑣 =𝑉𝑜𝑢𝑡

𝑃𝑜𝑝𝑡= 𝑅𝑖𝑅𝐿 = 0.9 × 500 = 450[𝑉/𝑊] [1]

ii) From KVL:

𝑉𝑑 = 𝑉𝑜𝑢𝑡 − 11V [1]

The diode will become forward biased when 𝑉𝑑 > 0. Which occurs when 𝑉𝑜𝑢𝑡 > 11𝑉. Setting

𝑉𝑜𝑢𝑡 = 11𝑉 gives the point at which the diode is no longer reverse biased. [1]

So,

𝑉𝑜𝑢𝑡 = 𝑅𝑖𝑃𝑜𝑝𝑡𝑅𝐿 = 11V [1]

𝑃𝑜𝑝𝑡 =11

0.9×500≈ 24𝑚𝑊 [1]

(b)We have the following for the TIA circuit with the current source model for the photodiode

employed:


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i) We have 𝑉𝑝 = 0 = 𝑉𝑛. Now the anode is at a virtual ground. The diode voltage is still

defined as the voltage from the anode to the cathode. KVL gives:

𝑉𝑑 = −11 [1]

ii) Note that 𝐼2 = 0 because the voltage on both sides of the 100Ω is the same. KCL at Vn with

𝑉𝑛 = 0 gives:

𝐼𝑝ℎ = −𝑉𝑜𝑢𝑡/500 [1]

𝐺 =𝑉𝑜𝑢𝑡

𝐼𝑝ℎ= −500Ω [1]

iii)

−500 =𝑉𝑜𝑢𝑡

𝐼𝑝ℎ=

𝑉𝑜𝑢𝑡

𝑅𝑖𝑃𝑜𝑝𝑡 [1]

𝑅𝑣 =𝑉𝑜𝑢𝑡

𝑃𝑜𝑝𝑡= −𝑅𝑖 ∙ 500 = −450[V/W] [1]

4.5 [10%]

For the circuit shown in Fig. 5, find the Thevenin equivalent at terminals a-b. (Hint: To find

𝑅𝑇ℎ, apply a current source 𝑖𝑜 and calculate 𝑣𝑜.)

Fig. 5

Solution

𝑉𝑇ℎ = 𝑉𝑎𝑏 (1) [1]

Apply KCL we find


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𝑉𝑠 =𝑅1

𝑅1+𝑅2𝑉𝑎𝑏 (2) [2]

From (1) and (2),

𝑉𝑇ℎ = (1 +𝑅2

𝑅1)𝑉𝑠 [2]

To get RTh, apply a current source Io at terminals a-b as shown below.

Since the noninverting terminal is connected to ground, v1 = v2 = 0, i.e. no current passes

through R1 and consequently R2 . Thus, vo = 0 and

𝑅𝑇ℎ =𝑣0

𝑖0= 0 [5]

4.6 [10%]

Design an op amp circuit such that

𝑣𝑜 = 4𝑣1 + 6𝑣2 − 3𝑣3 − 5𝑣4

Let all the resistors be in the range of 100Ω to 1kΩ.

Solution

A summing amplifier shown below will achieve the objective. An inverter is inserted to invert

v2. Since the smallest resistance must be at least 100 Ω, then let R/6 = 100Ω therefore let R =

600 Ω. (Other reasonable answers will be ok.)


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4.7 [11%]

Determine 𝑣𝑜 in the op amp circuit of Fig. 7.

Fig. 7

Solution

The output of amplifier A is

vA = −30k

10k× 1 −

30k

10k× 2 = −9V [3]

The output of amplifier B is

vA = −20k

10k× 3 −

20k

10k× 4 = −14V [3]

va = vb =10k

60k+10k× (−14) = −2V [2]

At node a, vA−va

20k=

va−v0

40k [2]

Therefore, v0 = 12V [1]


9

4.8 [12%]

(a) For the following schematic, determine a constraint on 𝑅1, 𝑅2, 𝑅3 and 𝑅4 such

that the circuit behaves as a difference amplifier, i.e. 𝑣𝑜 = K(𝑣2 − 𝑣1).

(b) Suppose that the resistors values chosen for part (a) are real resistors with 1% precision.

What is the common-mode gain? In other words, if the inputs contain a common-mode signal

𝑣1 = 𝑉𝑐 +𝑣𝑑

2

𝑣2 = 𝑉𝑐 −𝑣𝑑

2

how much of 𝑉𝑐 appears at the output?

Fig. 8

Solution

(a)

Now we write two nodal equations at v1 and v2.

V1

R1=

Vx−V1

R2 [1]

V2−Vx

R3=

V0−V2

R4 [1]

Solving for these equations gives us the following relationship:


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v0 =R3+R4

R3v2 −

R4

R1R3(R1 + R2)v1[1]

In order for this expression to be in the form vo = K(v2 − v1), we must have the following

constraint:

R3+R4

R3=

R4

R1R3(R1 + R2) [1]

This simplifies to

R1R3 = R2R4 [1]

(b) If the resistors have 1% precision, then any resistor Ri can have a resistance as high as

1.01Ri or as low as 0.99Ri. Let’s assume that each resistor takes on a value R = Rnom(1 + ∆)

where Rnom is the nominal value, and |∆| < 0.01 is the tolerance (positive or negative). Now

re-write the expression for the gain as

v0 = 𝑎2v2 − 𝑎1v1[1]

The a2 coefficient is expanded and then simplified assuming ∆ are small

𝑎2 = 1 +R′4

R′3= 1 +

R4(1+∆4)

R3(1+∆3)≈ 1 +

R4

R3(1 + ∆4)(1 − ∆3) ≈ 1 +

R4

R3(1 + ∆4 − ∆3) [1]

Notice that a2 can be written in terms of the ideal gain G = 1 +R4

R3

𝑎2 = G + (G − 1)(∆4 − ∆3) = G [1 +G−1

G(∆4 − ∆3)][2]

Likewise, since

R1

R3=

R4

R3

we can expand the coefficient a1

𝑎1 ≈ G + (G − 1)(∆4 − ∆3) = G(1 + ∆4 − ∆3 +∆2−∆1

G) [2]

For a common-mode input Vc we have

v0 = 𝑎2Vc − 𝑎1Vc = VcG (G−1

G(∆4 − ∆3) + ∆3 − ∆4 −

∆2−∆1

G) = Vc(∆1 − ∆2 + ∆3 − ∆4)[1]

|∆| < 0.01

or

Ac = ∆1 − ∆2 + ∆3 − ∆4

|∆| < 0.01


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4.9 [11%]

In the schematic below, the voltage source 𝑣𝑠 is separated from the load resistor 𝑅𝐿

by three amplifier stages. We have three different amplifier configurations as shown

below.

Fig. 9

(a) Suppose we go with the sequence BAC. If 𝑅1 = 2kΩ, 𝑅2 = 6kΩ, 𝑅3 = 4kΩ, and 𝑅4 =

8kΩ, calculate the overall voltage gain for the above circuit. What is the load resistance as

seen by the voltage source?

(b) Repeat the above calculations for the sequence ABC. Which of the two is better?

(c) What is the voltage gain in both cases if we omit the third stage (C)? What is its

purpose of having it in the circuit?

Solution

(a) For the sequence BAC, we first have a noninverting amplifier, followed by an inverting

amplifier, and finally a voltage follower. The gain is thus

G = (1 +R4

R3) (−

R2

R1) = (1 +

8k

4k) (−

6k

2k) = −9 [3]

The load resistance seen by the voltage input is infinite, since no current flows into the

noninverting input of op amp B.

(b) The gain here is the same, since it is order-independent (multiplication is commutative).

[2]

However, the input resistance is 2 kΩ higher in this case, since the source sees the inverting

amplifier first. So in terms of overall gain, both orderings are equally good.

[1]

However, the ABC former is better for voltage amplification, as its input resistance is much

higher. [1]

(c) The voltage gain remains the same in both cases, since the third stage does not affect it.[2]

C is a voltage follower which has high input resistance. It is usually useful to prevent loading

effects at either the input or output of an op amp, like A and B, especially if it is non-ideal

(although it doesn’t play any role here since all the op amps are ideal).[2]


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4.10 [12%]

a) For the circuit shown in Fig. 10, show that if ΔR ≪ R, the output voltage of the op amp is

approximately

𝑣𝑜 ≈𝑅𝑓

𝑅2

(𝑅 + 𝑅𝑓)

(𝑅 + 2𝑅𝑓)(−∆𝑅)𝑣𝑖𝑛

b) Find 𝑣𝑜 if 𝑅𝑓 = 470kΩ, 𝑅 = 10kΩ, Δ𝑅 = 95Ω, and 𝑣𝑖𝑛= 15 V.

c) Find the actual value of 𝑣𝑜 in (b).

Fig. 10

d)If percent error is defined as

% error = [approximate value

true value− 1] × 100

show that the percent error in the approximation of 𝑣𝑜 above is

% error = [∆𝑅

𝑅

(𝑅 + 𝑅𝑓)

(𝑅 + 2𝑅𝑓)] × 100

e) Calculate the percent error in 𝑣𝑜.

Solution

Let R1 = R + ∆R

Apply KCL,

Vp

Rf+

Vp

R+

Vp−Vin

R1= 0 (1) [2]

Vn

R+

Vn−Vin

R+

Vn−V0

Rf= 0 (2) [2]


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From (1) and (2),

𝑣𝑜 =(𝑅+𝑅𝑓)𝑅𝑓

𝑅[(R+∆R)(𝑅+𝑅𝑓)+𝑅𝑅𝑓](−∆𝑅)𝑣𝑖𝑛 [1]

if R ≫ ∆R

𝑣𝑜 ≈𝑅𝑓

𝑅2

(𝑅+𝑅𝑓)

(𝑅+2𝑅𝑓)(−∆𝑅)𝑣𝑖𝑛 [2]

(b) 𝑣𝑜 ≈ −3.384𝑉 [1]

(c) 𝑣𝑜 ≈ −3.368𝑉 [1]

(d) % error = 𝑅𝑓

𝑅2

(𝑅+𝑅𝑓)

(𝑅+2𝑅𝑓)

𝑅[(R+∆R)(𝑅+𝑅𝑓)+𝑅𝑅𝑓]

(𝑅+𝑅𝑓)𝑅𝑓 − 1 × 100 [2]

=∆R(𝑅+𝑅𝑓)

𝑅(𝑅+2𝑅𝑓)× 100 [1]

(e) % error = 0.48 [2]

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