1

Introduction to Wireless Sensor Networks and its H/W Design Experiences

Paper from: P. Zhang, C. Sadler, S. Lyon, and M. Martonosi, “Hardware Design Experiences in ZebraNet,” Proceedings of SenSys 2004, November 2004

Yueh-yi Wang 2005.11.17

2

Outline

Introduction to WSN Hardware and system architecture of WS

N Case study: ZebraNet Summary & conclusions

3

Introduction to WSN – Why WSN?

Personal & institutional security National defense Radiology, medicine Chemical plants Toxic urban locations Agriculture Natural hazards Many others …

4

Application of Sensors in - Environment Monitoring Measuring pollutant

concentration Pass on information

to monitoring station Predict current

location of pollutant contour based on various parameters

Take corrective action

Pollutants monitored by sensors in the river bed

Sensors report to the base monitoring station

BS

5

Sensors in Unknown Terrain

6

Composition of a sensor(-actuator) node

Portable and self-sustained (power, communication, intelligence) Capable of embedded complex data processing Note: Power consumed in transmitting 1Kb data over 100m is

equivalent to 30M Instructions on 10MIPS processor Technology trends predict small memory footprint may not be a

limitation in future sensor nodes Equipped with multiple sensing, programmable computing and

communication capability

Transceiver

Embedded Processor

Sensor

Battery

Memory

Transceiver

Embedded Processor

Sensor

Battery

Memory

1Kbps- 1Mbps3m-300m

Lossy Transmission

8 bit, 10 MHzSlow Computation

Limited Lifetime

Requires Supervision

Multiple sensors

128Kb-1MbLimited Storage

Sensing + CPU + Radio = Thousands of potential applications

7

EmbedSense™ Wireless SensorA Wireless sensor and data acquisition system

Can be placed within implants on spining machinery and within composite materials

No batteries - big advantage Uses an inductive link to receive

power from external coil Can be used in monitoring

temperatures in Jet turbine engines www.microstrain.com

8

Different from traditional networks

Sensor networks are “data-centric” networks

Unique ID not effective in sensor networks large number of nodes imply large id, thus, data

sent may be less than the address Adjacent nodes may have similar data

9

Hardware architecture of WSN- Parameters

Cost Lifetime Performance

Speed (in ops/sec, in ops/joule) Comms range (in m, in joules/bit/m) Memory (size, latency)

Capable of concurrent operation Reliability, security, size, packaging

10

Hardware issue on WSN - A Generic Sensor Network Architecture

PROCESSINGSUB-SYSTEM

COMMUNICATIONSUB-SYSTEM

SENSINGSUB-SYSTEM

POWER MGMT.SUB-SYSTEM

ACTUATIONSUB-SYSTEM

SECURITYSUB-SYSTEM

11

Processing subsystem - Illustration

12

Processing subsystem- Microcontroller von Neumann architecture (same address and data bus for I/D)

typical 4 bit, 8 bit, 16 bit or 32 bit architectures speed 4 MHz-400MHz with 10-300 or more MIPS

operate at various power levels: fully active: 1 to 50 mW sleep (memory standby, interrupts active, clocks active, cpu off) sleep (memory retained, interrupts active, clocks active, cpu off) sleep (memory retained, interrupts active, clocks off, cpu off) 5uW latency of wakeup is an issue

fixed point / floating point operations multiple processors may be used (potentially on same core)

could be DSP, FPGA

13

Processing subsystem- Memory Considerations

Speed, capacity, price, power consumption, memory protection Types:

SRAM: typical 0.5KB-64MB Typical power consumption

retained: ~100ua; read/write: ~10ma if separate chip retained: 2ua-100ua, read/write:~5ma if in core

DRAM: high power consumption in retained mode

Flash: 256KB-1GB or beyond Typical power consumption

retained: negligible; read/write: ~7/20ma erase operation is expensive

Large flashes are outside of core EEPROM:4KB-512KB, often used as program store

14

Processing subsystem- Peripherals

Clock generators / Dividers Hardware Timers Peripheral interfaces

(for sensors, actuators, I/O, power)(analog and digital)(multiple buses with bridges between them) SPI: Serial Peripheral Interface I2C UART: Serial communication General Purpose Input Output pins (GPIO)

15

Processing subsystem- Peripherals (contd.) Interrupts:

Asynchronous breaks in program execution Press of a button; expiration of a timer; completion of sensing data c

ollection, of DMA transfer, of transmission event, … When interrupt occurs, processor transitions to t

he corresponding interrupt handler to service interrupt and then resumes execution

Can have multiple priority levels Interrupts are enabled and disabled through reg

isters for each peripheral

16

Processing subsystem- Timers

Controls the mode (interval or one-shot)Starts and stops the timerEnables/disables the interrupts for this timer

Holds value to compare against

Holds the value that initializes the timer at startup

17

Sensor Subsystem Multiple types of sensors may be used:

Environmental: pressure, gas composition, humidity, light… Motion or force: accelerometers, rotation, microphone,

piezoresistive strain, position… Electromagnetic: magnetometers, antenna, cameras… Chemical/biochemical

Digital or analog output

MEMS enabling

18

Power Management Subsystem Voltage regulator

typical ranges: 1.8V, 3.3V, 5V multiple voltages for various subsystem/power levels

Gauges for voltage or current battery monitor (allows software to adapt

computation)

Control of subsystems wakeup/sleep

Control of platform clock rate, processor voltage

19

Communication Subsystem

IEEE 802.11

Bluetooth

Mote

Energy per bit

Startup time

Idle current

TechnologyData Rate

Tx Current

Energy per bit

Idle Current

Startup time

Mote76.8 Kbps

10 mA 430 nJ/bit 7 mA Low

Bluetooth 1 Mbps 45 mA 149 nJ/bit 22 mA Medium

802.11 11 Mbps 300 mA 90 nJ/bit 160 mA High

20

Design Principles Key to Low Duty Cycle Operation:

Sleep – majority of the time Wakeup – quickly start processing Active – minimize work & return to sleep

Wtotal=Rsleep*Wsleep + Rwake*Wwake + Ractive*Wactive

W: Power Dissipation R: Ratio of the time period

Dynamic Power Consumption Pdynamic = Cswitched * VDD

2 * fclk

21

Case Study: Hardware Design Experiences in ZebraNet Biologists Wishlist

Lightweight

Detailed 24/7 archival position logs

Mobile

No fixed base station (no cellular service)

Restricted human access to systems

ZebraNet: Wireless ad hoc network on zebras Intelligent tracking collars placed on sampled set of zebras Sensor network: data collected includes

GPS position info, temperature, …

➨ Energy-efficient

➨ GPS-enabled

➨ Wireless

➨ Peer-to-peer routing and data storage

➨ Plan 1 year of autonomous operation

22

ZebraNet vs. Many Other Sensor Networks… All nodes mobile: Even “base station” is

mobile; intermittent drive-bys upload data

Large spatial extent 100s-1000s of sq. kilometers

“Coarse-Grained” nodes: Storage and processing capability >> many other sensor systems

Long-running and autonomous Reliability and energy-efficiency are key

23

24

Hardware Evolution

25

Other Evolution Change of -controller

Main reason is the variable clock frequency. Lower power usage (switching clocks) TI MSP430F149 allows multiple clocks

32 KHz in sleep mode 8 MHz in normal mode 32 KHz clock consumes 0.05 mA more than sleep

26

Important Features Nodes obtain GPS reading

every 8 minutes GPS can sync to global clock

Nodes attempt to send information over radio every 2 hours

All data logged to onboard flash (local as well as received)

~256 bytes per hour

27

ZebraNet Protocols Two peer-to-peer protocols evaluated here

Flooding: Send to everyone found in peer discovery. History-Based: After peer discovery, choose at most o

ne peer to send to per discovery period: the one with best past history of delivering data to base.

28

Zebra show time

Solar Power with loosely rotated

=> efficiency dropped

29

GPS Data for 1 Zebra Over 24 Hours

30

Power Consumption Radio Tx consumes th

e most critical power.

The 2nd one is GPS.

Radio Rx takes the longest time while working.

Not much difference on u-C under 8MHz and 32KHz (odd?)

Dynamic Power ConsumptionPdynamic = Cswitched * VDD

2 * fclk

31

Summary and Conclusions New design approach derived from the experience

with resource constrained wireless sensor networks Active mode needs to run quickly to completion Wakeup time is crucial for low power operation

Wakeup time and sleep current set the minimal energy consumption for an application

Sleep most of the time

Tradeoffs between complexity/robustness and low power radios

Careful integration of hardware and peripherals

32

Summary and Conclusions Hardware choice worked very well for sparse node-to-no

de communication Simplicity of software environment dictated -controller

choice Details matter in WSN power management Future work of ZebraNet

33

Thank you