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ELEKTRONSKI FAKULTET Katedra za mikroelektroniku

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KOMPONENTE ZA TELEKOMUNIKACIJE

Laboratorijske vežbe

Univerzitet u Nišu

Elektronski fakultet

KOMPONENTE ZA

TELEKOMUNIKACIJE

(Semestar IV, 2013. godina)

PRAKTIKUM

Danijel Danković


1



I. Standard Diode

1. Start the LTspice IV program.

2. Create a new schematic (File->New Schematic...).

3. (File->Save as), name the schematic (for example “Diode circuit”), and choose a safe place

for it to be saved.

4. Now build the circuit shown in Fig. 7. First add the DC power supply “Voltage”, the resistor

“res”, and the ground “ground” to the schematic. The exact location of the circuit elements do

not matter as long as they are connected the same way. DC power supply “Voltage” and resistors

are in the "Component" library. Right-click the resistor you just placed on your schematic. In the

new dialog box click the button called “Select Resistor”, as shown in Fig. 1. Choose “1.00K”

resistor, as shown in Fig. 2. Click “OK”.

Fig.1 Fig.2

5. The last part to add to the circuit is the diode. Go to the " Component " library and select the

“diode”. Connect it to your circuit. (Remember that the direction of a part can be rotated with the

“Ctrl+R” key. Also, the exact location of the circuit elements do not matter as long as they are

connected the same way.)

6. To specify the characteristics of the diode you are using, you must configure the model

statement. Right-click the diode you just placed on your schematic. In the new dialog box click

the button called “Pick New Diode”, as shown in Fig. 3. Choose “1N4148” diode, as shown in

Fig. 4. Click “OK”.


2

Fig.3 Fig.4

7. Edit a Simulation Cmd (Simulate->Edit Simulation Cmd). Choose "DC Sweep". Choose

"Name of 1st Source to Sweep", in this case “V1”. On the lower right enter a start value of “-

10V”, an end value of “10V”, and an incremental voltage of “0.5V”, as shown in Fig. 5. Click

“OK”. Place this part somewhere to the side of your circuit on the schematic, as shown in Fig. 7.

Fig.5

8. To select where you want to measure voltage, use the voltage marker “Label Net”. Set up

“Label Net” as shown in Fig. 6 and place in the wire between the diode and the resistor.


3

Fig.6

Fig.7

9. Run the LTspice IV simulation (Simulate->Run). You will see that this diode only conducts

current in one direction (see Fig. 8).

10. If you want to see I-V characteristic you can plot I(D1) versus V1-V(VD), as shown in

Fig. 9.


4

Fig.8

Fig.9


5



II. Zener Diode

1. This is how to use a Zener diode. Go to the " Component " library and select the “diode”.

Connect it to your circuit along with another resistor as shown in Fig. 10. To specify the

characteristics of the diode you are using, you must configure the model statement. Right-click

the diode you just placed on your schematic. In the new dialog box click the button called “Pick

New Diode”. Choose “BZX84C6V2L” Zener diode and click “OK”. As can be seen the

difference before you change the model parameters is the Zener diode icon.

2. To select where you want to measure voltage, use the voltage marker “Label Net”. Set up

second “Label Net” as shown in Fig. 6 and place in the wire between the Zener diode and the

resistor R2. Name it “VDZ”.

3. Run the LTspice IV simulation (Simulate->Run).

Fig.10


6



III. Schottky Diode

1. Add the Schottky Diode “BAT53” and the resistor to the schematic as shown in Fig. 11.

2. Add new voltage marker “Label Net” and name it “VDS”.


Fig.11


7



IV. LED Diode

1. Add the LED Diode “NSPW500BS” and the resistor to the schematic as shown in Fig. 12.

2. Add new voltage marker “Label Net” and name it “VDLED”.


Fig.12


8



V. Inverting Amplifier



3. (File->Save as), name the schematic (for example “Inverting Amplifier”), and choose a safe

place for it to be saved. Now build the circuit shown in Fig 13.


Fig.13


9



VI. Non-Inverting Amplifier



3. (File->Save as), name the schematic (for example “Non-Inverting Amplifier”), and choose a

safe place for it to be saved. Now build the circuit shown in Fig 14.


Fig.14


10



VII. Summing Amplifier



3. (File->Save as), name the schematic (for example “Summing Amplifier”), and choose a safe

place for it to be saved. Now build the circuit shown in Fig 15.


Fig.15


11



VIII. Summing Amplifier_2

1. Connect electrical elements on protoboard as shown in Figure 16.

2. Set channels 1 and 2.

CH1: Sine CH2: Sine

50 Hz 50 Hz

1 Vpp Amp 500 mVpp Amp

0 V offset 0 V offset

3. Measure voltage Vout.


CH1: Pulse waveform CH2: Pulse waveform

1 kHz 1 kHz

1 V Amp 1.5 V Amp

0 V offset 0 V offset


Fig.16


12



IX. NE555 – Astable Operation

1. Start the Start the LTspice IV program (Start->All Programs-> Start the LTspice IV).


3. (File->Save as), name the schematic (for example “Astable Operation”), and choose a safe

place for it to be saved.

4. Now build the circuit shown in Fig. 17.

Fig.17

5. Edit Simulation Command (Edit->SPICE Analysis…).

6. Run the simulation.


13



X. NE555 – Astable Operation_Oscilloscope


2. Measure voltage Vout and VC1.

Fig.18


14



XI. NE555 – Astable Operation_Fast Fourier Transform



3. (File->Save as), name the schematic (for example “Astable Operation_FFT”), and choose a

safe place for it to be saved.


Fig.19



7. Show Fast Fourier Transform for signal OUT (View->FFT…). Use Bode Representation,

Linear scale.


15



XII. NE555 – Astable Operation_Buzzer



Fig.20

3. Show Fast Fourier Transform for signal VOUT.


16



XIII. NE555 – Astable Operation_LED



Fig.21

3. Show Fast Fourier Transform for signal VOUT.


17



XIV. Frequency multiplier_2kHz



3. (File->Save as), name the schematic (for example “Frequency multiplier”), and choose a



Fig.22




Linear scale.


18



XIV. Frequency multiplier_100kHz



3. (File->Save as), name the schematic (for example “Frequency multiplier_100 kHz”), and

choose a safe place for it to be saved.

4. Now build the circuit shown in Fig. 22_1.

Fig.22_1




Linear scale.


19



XV. Frequency multiplier_2



3. (File->Save as), name the schematic (for example “Frequency multiplier_2”), and choose a



Fig.23




20



XVI. Frequency multiplier_100kHz


2. Set channel 1.

CH1: Sine

50 kHz

5 Vpp Amp

0 V offset

3. Measure voltages CH1 and Vout.

Fig.24


21



XVII. Two-Pole Low-Pass Butterworth filter



3. (File->Save as), name the schematic (for example “Low-Pass Butterworth_filter”), and


4. Now build the circuit shown in Fig. 25. Set up the values of Independent Voltage Source V3,

as shown in Fig. 26.

Fig.25


22

Fig.26

5. Edit Simulation Command (Edit->SPICE Analysis…) as shown in Fig 27.

Fig.27



23



XVIII. Two-Pole High-Pass Butterworth filter



3. (File->Save as), name the schematic (for example “High-Pass Butterworth_filter”), and


4. Now build the circuit shown in Fig. 28. Set up the values of Independent Voltage Source V3,

as shown in Fig. 29.

Fig.28


24

Fig.29


Fig.30



25



XIX. Two-Pole Low-Pass Butterworth filter_2



3. (File->Save as), name the schematic (for example “Low-Pass Butterworth_filter_2”), and



Fig.31



26

Fig.32



27



XX. Two-Pole High-Pass Butterworth filter_2



3. (File->Save as), name the schematic (for example “High-Pass Butterworth_filter_2”), and



Fig.33



28

Fig.34



29



XXI. Two-Pole Low-Pass Butterworth filter_3



CH1: 10 kHz

3 Vpp Amp

0 V offset

CH2: 100 kHz

500 mVpp Amp

0 V offset

3. Measure voltages V3 and Vout.

Fig.35


30



XXII. Two-Pole High-Pass Butterworth filter_3



CH1: 10 kHz

3 Vpp Amp

0 V offset

CH2: 100 kHz

500 mVpp Amp

0 V offset

3. Measure voltages V3 and Vout.

Fig.36


31



XXII. AD633 Multiplier Connections

1. Start the LTspice IV program (Start->All Programs-> Start the LTspice IV).


3. (File->Save as), name the schematic (for example “AD633 Miltiplier Connections”), and


4. Now build the circuit shown in Fig. 37. DIP8 (U1) is generic symbol for use with subcircut.

Symbol of DIP8 is placed in “MISC” library.

5. Edit SPICE Netlist so that it is the same as the one listed below (View->SPICE Netlist...),

name it (“AD633.lib”) and choose a safe place for it to be saved.

Fig.37


32

*//////////////////////////////////////////////////////////////////////

* AD633 Analog Multiplier Macro Model 12/93, Rev. A

* AAG/PMI

*

* Copyright 1993 by Analog Devices, Inc.

*

* Refer to "README.DOC" file for License Statement. Use of this model

* indicates your acceptance with the terms and provisions in the License Statement.

*

* Node assignments

* X1

* | X2

* | | Y1

* | | | Y2

* | | | | VNEG

* | | | | | Z

* | | | | | | W

* | | | | | | | VPOS

* | | | | | | | |

.SUBCKT AD633 1 2 3 4 5 6 7 8

*

EREF 100 0 POLY(2) 8 0 5 0 (0,0.5,0.5)

*

* X-INPUT STAGE & POLE AT 15 MHz

*

IBX1 1 0 DC 8E-7

IBX2 2 0 DC 8E-7

EOSX 10 1 POLY(1) (16,100) (5E-3,1)

RX1A 10 11 5E6

RX1B 11 2 5E6

*

GX 100 12 10 2 1E-6

RX 12 100 1E6

CX 12 100 1.061E-14

VX1 8 13 DC 3.05

DX1 12 13 DX

VX2 14 5 DC 3.05

DX2 14 12 DX

*

* COMMON-MODE GAIN NETWORK WITH ZERO AT 560 Hz

*

ECMX 15 100 11 100 10

RCMX1 15 16 1E6

CCMX 15 16 2.8421E-10

RCMX2 16 100 1

*

* Y-INPUT STAGE & POLE AT 15 MHz

*

IBY1 3 0 DC 8E-7

IBY2 4 0 DC 8E-7

EOSY 20 3 POLY(1) (26,100) (5E-3,1)

RY1A 20 21 5E6

RY1B 21 4 5E6

*

GY 100 22 20 4 1E-6

RY 22 100 1E6

CY 22 100 1.061E-14

VY1 8 23 DC 3.05

DY1 22 23 DX

VY2 24 5 DC 3.05

DY2 24 22 DX

*


33

* COMMON-MODE GAIN NETWORK WITH ZERO AT 560 Hz

*

ECMY 25 100 21 100 10

RCMY1 25 26 1E6

CCMY 25 26 2.8421E-10

RCMY2 26 100 1

*

* Z-INPUT STAGE & POLE AT 15 MHz

*

IBZ1 7 0 DC 8E-7

IBZ2 6 0 DC 8E-7

RZ1 7 6 10E6

*

GZ 100 32 7 6 1E-6

RZ2 32 100 1E6

CZ 32 100 1.061E-14

VZ1 8 33 DC 3.05

DZ1 32 33 DX

VZ2 34 5 DC 3.05

DZ2 34 33 DX

*

* 50-MHz MULTIPLIER CORE & SUMMER

*

GXY 100 40 POLY(2) (12,100) (22,100) (0,0,0,0,0.1E-6)

RXY 40 100 1E6

CXY 40 100 3.1831E-15

*

* OP AMP INPUT STAGE

*

VOOS 59 40 DC 5E-3

Q1 55 32 60 QX

Q2 56 59 61 QX

R1 8 55 3.1831E4

R2 60 54 3.1313E4

R3 8 56 3.1831E4

R4 61 54 3.1313E4

I1 54 5 1E-4

*

* GAIN STAGE & DOMINANT POLE AT 316.23 Hz

*

G1 100 62 55 56 3.141637E-5

R5 62 100 1.0066E8

C3 62 100 5E-12

V1 8 63 DC 4.3399

D1 62 63 DX

V2 64 5 DC 4.3399

D2 64 62 DX

*

* NEGATIVE ZERO AT 20 MHz

*

ENZ 65 100 62 100 1E6

RNZ1 65 66 1

FNZ 65 66 VNC -1

RNZ2 66 100 1E-6

ENC 67 0 65 66 1

CNZ 67 68 7.9577E-9

VNC 68 0 DC 0

*

* POLE AT 4 MHz

*

G2 100 69 66 100 1E-6

R6 69 100 1E6


34

C2 69 100 3.9789E-14

*

* OP AMP OUTPUT STAGE

*

FSY 8 5 POLY(2) VZC1 VZC2 (2.8286E-3,1,1)

RDC 8 5 28E3

GZC 100 73 72 69 11.623E-3

VZC1 74 100 DC 0

DZC1 73 74 DX

VZC2 100 75 DC 0

DZC2 75 73 DX

VSC1 70 72 0.695

DSC1 69 70 DX

VSC2 72 71 0.695

DSC2 71 69 DX

GO1 72 8 8 69 11.623E-3

RO1 8 72 86

GO2 5 72 69 5 11.623E-3

RO2 72 5 86

LO 72 7 1E-7

*

* MODELS USED

*

.MODEL QX NPN

* (BF=1E4)

.MODEL DX D(IS=1E-15)

.ENDS AD633

*//////////////////////////////////////////////////////////////////////

6. Move the cursor over the body of the U1. Press <Ctrl>RightMouseButton. A dialog box will

appear as shown in Fig. 38.

Fig.38




35



XXIII. AD633 Square Rooting



3. (File->Save as), name the schematic (for example “AD633 Square Rooting”), and choose a



Fig.39




36



XXIV. AD633 Division



3. (File->Save as), name the schematic (for example “AD633 Division”), and choose a safe

place for it to be saved.


Fig.40




37



XXV. AD633_Squaring


2. Set channel 1.

CH1: 10 kHz

3 Vpp Amp

0 V offset

3. Measure voltage W.

Fig.41


38



XXVI. AD633_Frequency Doubling


2. Set channel 1.

CH1: 1060 Hz

10 Vpp Amp

0 V offset


Fig.42


39



XXVII. AD633_Linear Amplitude Modulator



CH1 + : 1 kHz

6 Vpp Amp

3 V offset

- : GND

CH2: 10 kHz

1 Vpp Amp

0 V offset


Fig.43


40



XXVIII. Amplitude Modulation



3. (File->Save as), name the schematic (for example “Amplitude Modulation”), and choose a



Fig.44



41



XXIX. Amplitude Modulator and Diode Demodulator_1



CH1 + : 1 kHz

6 Vpp Amp

3 V offset

- : GND

CH2: 10 kHz

2 Vpp Amp

0 V offset

3. Select components : Ddem = 1N4148

Rdem = 150 , 820 , 2.2 k, 3.3 k, 5.6 k

Cdem = 50 nF, 150 nF, 200 nF, 220 nF, 470 nF

4. Measure voltages CH1+, W and Wdem.

Fig.45


42



XXX. Amplitude Modulator and Diode Demodulator_2



CH1 + : 1 kHz

6 Vpp Amp

3 V offset

- : GND

CH2: 10 kHz

2 Vpp Amp

0 V offset

3. Select components : Ddem = 1N4148

Rdem = 150 , 820 , 2.2 k, 3.3 k, 5.6 k

Cdem = 50 nF, 150 nF, 200 nF, 220 nF, 470 nF

4. Measure voltages CH1+, W and Wdem.

Fig.46


43



XXXI. Telephone ringing circuits with LED indicator



3. (File->Save as), name the schematic (for example “Telephone ringing circuits with LED

indicator”), and choose a safe place for it to be saved.


Fig.47



44



XXXII. Optocoupler_Switching characteristics


2. Set channel 1.

CH1: Pulse signal

f = 10 kHz

DTC = 50%

5 Vpp Amp (0V - Low level, 5V - High level)

3. Select resistor RX = 100 , 220 , 470 , 680 , 820 , 1 k

4. Measure voltages CH1 and OUT.

Fig.48

5. Determine ton and toff for different values of resistor RX


45



XXXIII. IR communication_phototransistor


2. Set channel 1.

CH1 : Pulse signal, f = 10 kHz, DTC = 50%, 6.5 Vpp Amp (0V-Low level, 6.5V-High level)

3. Press switch button (SW-PB).


Fig.49

5. Change:

a) 1 (between 0 and 30o)

b) 2 (between 0 and 10o)

c) l (between 1 cm and 15 cm)

and measure voltage Vout. 1, 2 and l are shown in Figure 50.

Fig.50


46



XXXIV. IR communication_PIN photodiode


2. Set channel 1.

CH1 : Pulse signal, f = 10 kHz, DTC = 50%, 6.5 Vpp Amp (0V-Low level, 6.5V-High level)

3. Press switch button (SW-PB).


Fig.51

5. Change:

a) 1 (between 0 and 30o)

b) 2 (between 0 and 20o)

c) l (between 1 cm and 15 cm)

and measure voltage Vout. 1, 2 and l are shown in Figure 52.

Fig.52


47



XXXV. NMOS TRANZISTOR

I) Snimiti realne izlazne karakteristike n-kanalnog MOS tranzistora.

N-kanalni MOS tranzistor uzeti iz kola CD4007 Dual Complementary Pair Plus Inverter.

n-kanalni MOS:

pin 6. GEJT

pin 7. SORS

pin 8. DREJN

Podesiti:

HORIZONTAL = 1 V/div

VERTICAL = 100 A/div

POLARITY = dovođenje pozitivnih poluperioda

a) STEP GENERATOR postaviti na naponski opseg 500 mV/step

NUMBER OF STEPS preklopnik postaviti na 6 stepova

b) STEP GENERATOR postaviti na naponski opseg 200 mV/step


II) Snimiti realnu prenosnu karakteristiku i odrediti napon praga n-kanalnog MOS

tranzistora.

N-kanalni MOS tranzistor uzeti iz kola CD4007 Dual Complementary Pair Plus Inverter.

n-kanalni MOS:

pin 6. GEJT

pin 7. SORS

pin 8. DREJN

Kratkospojiti pin 6. i pin 8. (GEJT = DREJN)

Podesiti:



POLARITY = dovođenje pozitivnih poluperioda

VT je ona vrednost napona gde je I = 100 A.


48



XXXVI. PMOS TRANZISTOR

I) Snimiti realne izlazne karakteristike p-kanalnog MOS tranzistora.

P-kanalni MOS tranzistor uzeti iz kola CD4007 Dual Complementary Pair Plus Inverter.

p-kanalni MOS:

pin 6. GEJT

pin 14. SORS

pin 13. DREJN

Podesiti:



POLARITY = dovođenje negativnih poluperioda

a) STEP GENERATOR postaviti na naponski opseg 500 mV/step


b) STEP GENERATOR postaviti na naponski opseg 200 mV/step


II) Snimiti realnu prenosnu karakteristiku i odrediti napon praga p-kanalnog MOS

tranzistora.

P-kanalni MOS tranzistor uzeti iz kola CD4007 Dual Complementary Pair Plus Inverter.

p-kanalni MOS:

pin 6. GEJT

pin 14. SORS

pin 13. DREJN

Kratkospojiti pin 6. i pin 13. (GEJT = DREJN)

Podesiti:



POLARITY = dovođenje negativnih poluperioda

VT je ona vrednost napona gde je I = 100 A.


49



XXXVII. CMOS INVERTOR_PRENOSNA KARAKTERISTIKA_CD4007

Realizovati CMOS invertor korišćenjem CD4007 Dual Complementary Pair Plus Inverter.


50

Napon Vin dovesti iz AFG3102 Dual Channel Arbitrary/Function Generator

1. Pritisni ARB button

2. Pritisni Edit button (menu)

3. Izaberi (na ekranu) Operation

4. Izaberi (na ekranu) Line

5. Podesi From X1 = 1 Y1 = 1

To X2 = 1000 Y2 = 16382

6. Izaberi (na ekranu) Execute

7. Pritisni ARB button

Podesi -Period 5s

-Amplitude 5V (Low level 0 V, High level 5 V)

Ulazni napon Vin izgleda kao na slici

Usnimiti napon Vout (prenosna karakteristika CMOS invertora).


51



XXXVIII.CMOS INVERTOR_PRENOSNA KARAKTERISTIKA_LTSpiceIV

Realizovati CMOS invertor korišćenjem LTSpice IV

Prikazati Vin i Vout.


52



XXXIX. DINAMIČKE KARAKTERISTIKE CMOS INVERTORA

Prelaz iz jednog u drugo logičko stanje ne može se kod realnog logičkog kola obaviti

beskonačno brzo. Razlozi za to su višestruki. Pre svega, u svakom kolu postoje kapacitivnosti na

kojima se napon, kao što je poznato, ne može trenutno promeniti, već se takve promene vrše po

eksponencijalnom zakonu. Osim toga, struje kroz elemente su konačne, a jačina struje je

ograničena zahtevima za što manjom potrošnjom kola. Iz ovih razloga promena nivoa na izlazu

logičkog kola se obavlja za konačno vreme i kasni za promenama nivoa na ulazu. Ukoliko se

CMOS invertor pobudi impuslnom pobudom izlazni signal invertora imaće tipični oblik koji je

prikazan na slici.

Na vremenskom dijagramu izlaznog signala se mogu uočiti karakteristični intervali koji definišu

kašnjenje odziva za pobudom.

Vreme kašnjenja opadajuće ivice tpHL predstavlja vreme za koje opadajuća ivica izlaznog signala

kasni za pobudom koja ju je izazvala. Definiše se kao vreme između trenutka promene ulaznog

signala i trenutka kada se izlazni signal promeni za 50% logičke amplitude.

Vreme kašnjenja rastuće ivice tpLH predstavlja vreme između trenutka promene ulaznog signala i

trenutka kada izlazni signal poraste za 50% logičke amplitude.

Vremena kašnjenja rastuće i opadajuće ivice ne moraju biti, i najčešće nisu ista, što zavisi od

konstrukcije logičkog kola.

Radi jednostavnosti izračunavanja uticaja kašnjenja na rad kola definiše se tzv. vreme kašnjenja

(tp) koje predstavlja aritmetičku sredinu vremena kašnjenja rastuće i opadajuće ivice na izlazu.


53



XL. DINAMIČKE KARAKTERISTIKE CMOS INVERTORA – LTSpice

Realizovati CMOS invertor korišćenjem LTSpice IV

Prikazati Vin i Vout.

Odrediti tpLH, tpHL i tp.


54



XLI. DINAMIČKE KARAKTERISTIKE CMOS INVERTORA – CD4007

Realizovati CMOS invertor korišćenjem CD4007 Dual Complementary Pair Plus Inverter.

Podesiti ulazni napon Vin:

a) Pulse (Low level 0 V, High level 5 V, Duty cycle 50%, Frequency 1 kHz, Trise 5ns, Tfall 5ns)

b) Pulse (Low level 0 V, High level 5 V, Duty cycle 50%, Frequency 10 kHz, Trise 5ns, Tfall

5ns)

c) Pulse (Low level 0 V, High level 5 V, Duty cycle 50%, Frequency 100 kHz, Trise 5ns, Tfall

5ns)

Usnimiti napon Vout.

Odrediti tpLH, tpHL i tp.


55



XLII. SPREGNUTE MIKROSTRIP LINIJE

Planarne transmisione linije su osnovne komponente mikrotalasnih integrisanih kola. Pored

toga što se elementi mikrotalasnih integrisanih kola povezuju planarnim transmisionim linijama,

one se koriste i za realizaciju brojnih mikrotalasnih komponenti, na primer filtara, sprežnika,

delitelja, antena i sl. Naziv potiče iz osobine da se ključne karakteristike prostiranja menjaju

promenom dimenzija u samo jednoj ravni. Planarne transmisione linije izrađuju se od metalnih

traka i folija u kombinaciji sa dielektričnim supstratom.

Najčešće korišćeni tip planarnih transmisionih linija je mikrostrip linija (mikrostrip).

Trodimenzionalni prikaz mikrostrip linije dat je na slici.

Mikrostrip linija se sastoji od provodne trake (1) širine w i male debljine t, postavljene na

supstratu (2) relativne dielektrične konstante r , debljine h. Sa donje strane supstrata je

uzemljena metalna folija (3).

Vrlo često se koriste i spregnute mikrostrip linije koju čine dve provodne mikrostrip trake

postavljene na istom supstratu na malom međusobnom rastojanju, s, kao što je prikazano na

sledećoj slici. Između ove dve trake uspostavlja se kontinualna elektromagnetna sprega duž ose

prostiranja.

Spregnute mikrostrip linije imaju veliku primenu u mikrotalasnim integrisanim kolima za

realizaciju usmerenih sprežnika, filtara, linija za kašnjenje, kola za prilagođenje, itd. Pod

karakterističnom impedansom spregnutih mikrostrip linija podrazumeva se karakteristična

impedansa jedne linije u prisustvu elektromagnetne sprege sa drugom linijom. Pored

karakteristične impedanse za jednu liniju vrlo bitna je i diferencijalna impedansa.

U praktičnim aplikacijama vrlo često je poznata karakteristična impedansa ili

diferencijalna impedansa, a potrebno je izračunati širinu linija. Do širine linija dolazimo na

osnovu proračuna koje nam omogućavaju lako dostupni online kalkulatori. Kao primer

ilustrovaćemo korišćenje Microstrip & Stripline calculator-a

Postavimo:

Trace thickness t= 0.035mm = 1.4mils

Trace spacing S= 0.2032mm = 8mils

Dielectric layer thickness (FR4) h= 1.6mm = 63 mils

Relative dielectric constant εr =4.5


56

Cilj nam je da dobijemo diferencijalnu impedansu od 90Ω. Podešavamo Trace width (W) da

dobijemo Differential impedance: Zo=90Ω (Microstrip).

Možemo videti da se dobija W=1.27mm=50mils.

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