layout considerations
TRANSCRIPT
LAYOUT CONSIDERATIONS
POWER ELECTRONICS LABORATORY
American Wire Gauge
Diameter (in mils) = 2 50 – AWG 6
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Resistance
R = ρLA
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Non-Idealities of Electronic Components
at HF
Resistor
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Non-Idealities of Electronic Components
at HF
Capacitor
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Non-Idealities of Electronic Components
at HFInductor
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Components Placement It is oftentimes practical to layout the
power section first, being the bulkiest part of the circuit board.
Place all components necessary for IC biasing and compensation closest to the IC as much as possible.
Keep control ICs and feedback lines away from magnetic components.
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Components Placement
Segregate the power section from the control section via local islands as much as possible.
Employ daughterboards especially for control if there is a space constraint in the main board.
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Grounding
Keep ground return paths short and wide. [copper pour]
Observe STAR GROUNDING configuration as opposed to DAISY CHAIN GROUNDING.
Segregate Power, Digital and Analog Small Signal grounds.
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Routing
Observe proper track clearance especially at high voltages.
Size the tracks accordingly so that they can accommodate the desired current intended to pass through them.
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Routing
Keep feedback traces away from tracks that carry switching signals.
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Routing – Track Sizing
WhereT – trace width in milsI – current in AmperesCuWt – copper weight in ounces
National Semiconductor, Best Layout Practices for Switching Power Supplies
Routing Reduce loop areas as much as possible
ENOCEAN App Note 101, Layout Considerations for Line-Power Supplies
Routing
Reinforcement of copper tracks with lead is highly advisable especially for tracks that will carry high current
Place the filter capacitors so that their terminals are directly connected to the PCB traces that carry main current to be filtered (no extra trace length)
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MAXIM App Note 735, Layout Considerations for Non-Isolated DC-DC Converters
MAXIM App Note 735, Layout Considerations for Non-Isolated DC-DC Converters
Routing
When laying out the PCB, always make provisions for as many noise suppresion capacitors as possible. If the capacitors are not needed, you can just leave them out when the board is assembled.
Pick the smallest package for a given capacitance. Smaller outlines tend to have less parasitic inductance.
Leo Allen Tayo PEL 2011
Leo Allen Tayo PEL 2011