lcdf3 chap 03

Chapter 3 Gate-Level Minimization

Digital Design with an Introduction to the Verilog HDL

Pearson Education, Inc. Modified by Y. L. Li, CS/NCTU Digital Design with Verilog Practice

Chap 3

Overview

The Map Method Four-Variable K-Map Product-of-Sums Simplification Dont-Care Conditions NAND and NOR Implementation Exclusive-OR Function

2

2004 Pearson Education, Inc. Modified by Y. L. Li, CIS/NCTU Logic & Computer Design Fundamentals

Chap 3

3

Circuit Optimization

Goal: To obtain the simplest implementation for a given function Optimization is a more formal approach to

simplification that is performed using a specific procedure or algorithm Optimization requires a cost criterion to

measure the simplicity of a circuit Two distinct cost criteria we will use:

Literal cost (L) Gate input cost (G) Gate input cost with NOTs (GN)

bL1

3

bL1 boris Li, 2015/3/24


Chap 3

4

D

Literal a variable or its complement Literal cost the number of literal

appearances in a Boolean expression corresponding to the logic circuit diagram Examples:

F = BD + A C + A L = 8 F = BD + A C + A + AB L = 11 F = (A + B)(A + D)(B + C + )( + + D) L = 10 Which solution is best? (first verify the equality)

Literal Cost

DB CB B D C

B C


Chap 3

5

Gate Input Cost Gate input costs - the number of inputs to the gates in the

implementation corresponding exactly to the given equation or equations. (G - inverters not counted, GN - inverters counted)

For SOP and POS equations, it can be found from the equation(s) by finding the sum of: all literal appearances the number of terms excluding terms consisting only of a single literal,(G)

and optionally, the number of distinct complemented single literals (GN).

Example: which solution is best ? F = BD + A C + A G = 11, GN = 14 F = BD + A C + A + AB G = 15, GN = 19 F = (A + )(A + D)(B + C + )( + + D) G = 14, GN = 17

DB CB B D C

B D B C


Chap 3

6

Example 1:

F = A + B C +

Cost Criteria (continued)

A

BC

F

B C L = 5

L (literal count) counts the AND inputs and the singleliteral OR input.

G = L + 2 = 7

G (gate input count) adds the remaining OR gate inputs

GN = G + 2 = 9

GN(gate input count with NOTs) adds the inverter inputs


Chap 3

7

Example 2:

F = A B C + L = 6 G = 8 GN = 11 F = (A + )( + C)( + B) L = 6 G = 9 GN = 12 Same function and same

literal cost But first circuit has better

gate input count and bettergate input count with NOTs

Select it!

Cost Criteria (continued)

BC

A

ABC

F

C B

F

ABC

A


Chap 3

8

Boolean Function Optimization Minimizing the gate input (or literal) cost of a (a set

of) Boolean equation(s) reduces circuit cost. We choose gate input cost. Boolean Algebra and graphical techniques are tools to

minimize cost criteria values. Some important questions:

When do we stop trying to reduce the cost? Do we know when we have a minimum cost?

Treat optimum or near-optimum cost functionsfor two-level (SOP and POS) circuits first.

Introduce a graphical technique using Karnaugh maps (K-maps, for short)


Chap 3

9

Karnaugh Maps (K-map)

A K-map is a collection of squares Each square represents a minterm The collection of squares is a graphical representation of a

Boolean function Adjacent squares differ in the value of one variable Alternative algebraic expressions for the same function are

derived by recognizing patterns of squares The K-map can be viewed as

A reorganized version of the truth table A topologically-warped Venn diagram as used to visualize

sets in algebra of sets


Chap 3

10

Some Uses of K-Maps Provide a means for:

Finding optimum or near optimum SOP and POS standard forms, and two-level AND/OR and OR/AND circuit

implementationsfor functions with small numbers of variables

Visualizing concepts related to manipulating Boolean expressions, and

Demonstrating concepts used by computer-aided design programs to simplify large circuits


Chap 3

11

Two Variable Maps A 2-variable Karnaugh Map:

Note that minterm m0 andminterm m1 are adjacentand differ in the value of thevariable y

Similarly, minterm m0 andminterm m2 differ in the x variable.

Also, m1 and m3 differ in the x variable as well.

Finally, m2 and m3 differ in the value of the variable y

y = 0 y = 1

x = 0 m0 = m1 =

x = 1 m2 = m3 =yx yx

yx yx


Chap 3

12

K-Map and Truth Tables

The K-Map is just a different form of the truth table. Example Two variable function:

We choose a,b,c and d from the set {0,1} to implement a particular function, F(x,y).

Function Table K-MapInput Values(x,y)

Function ValueF(x,y)

0 0 a0 1 b1 0 c1 1 d

y = 0 y = 1x = 0 a bx = 1 c d


Chap 3

13

K-Map Function Representation

Example: F(x,y) = x

For function F(x,y), the two adjacent cells containing 1s can be combined using the Minimization Theorem:

F = x y = 0 y = 1

x = 0 0 0

x = 1 1 1

xyxyx)y,x(F


Chap 3

14

K-Map Function Representation

Example: G(x,y) = x + y

For G(x,y), two pairs of adjacent cells containing 1s can be combined using the Minimization Theorem:

G = x+y y = 0 y = 1

x = 0 0 1

x = 1 1 1

yxyxxyyxyx)y,x(G Duplicate xy

reduce y reduce x


Chap 3

15

Three Variable Maps

A three-variable K-map:

Where each minterm corresponds to the product terms:

Note that if the binary value for an index differs in one bit position, the minterms are adjacent on the K-Map

yz=00 yz=01 yz=11 yz=10

x=0 m0 m1 m3 m2x=1 m4 m5 m7 m6

yz=00 yz=01 yz=11 yz=10

x=0

x=1

zyx zyx zyx zyxzyx zyx zyx zyx


Chap 3

16

Alternative Map Labeling

Map use largely involves: Entering values into the map, and Reading off product terms from the map.

Alternate labelings are useful:y

zx

10 2

4

3

5 67

xy

zz

yy z

z

10 2

4

3

5 67

x0

1

00 01 11 10

x


Chap 3

17

Example Functions

By convention, we represent the minterms of F by a "1" in the map and leave the minterms of blank

Example:

Example:

Learn the locations of the 8 indices based on the variable order shown (x, most significantand z, least significant) on themap boundaries

y

x10 2

4

3

5 67

111

1

z

x

y10 2

4

3

5 671 111

z

(2,3,4,5)z)y,F(x, m

(3,4,6,7)c)b,G(a, m

F


Chap 3

18

Combining Squares By combining squares, we reduce number of literals in

a product term, reducing the literal cost, thereby reducing the other two cost criteria

On a 3-variable K-Map: One square represents a minterm with three variables Two adjacent squares represent a product term with two

variables (apply identities 7,14 one time) Four adjacent terms represent a product term with

one variable (apply identities 7,14 three times) Eight adjacent terms is the function of all ones (no

variables) = 1. (apply identities 7,14 seven times)


Chap 3

19

Example: Combining Squares

Example: Let

Applying the Minimization Theorem three times:

Thus the four terms that form a 2 2 square correspond to the term "y".

yzyyz

zyxzyxzyxzyx)z,y,x(F

x

y10 2

4

3

5 671 111

z

m(2,3,6,7)F 0

100 01 11 10


Chap 3

20

Three-Variable Maps

Reduced literal product terms for SOP standard forms correspond to rectangles on K-maps containing cell counts that are powers of 2.

Rectangles of 2 cells represent 2 adjacent minterms; of 4 cells represent 4 minterms that form a pairwise adjacent ring.

Rectangles can contain non-adjacent cells as illustrated by the pairwise adjacent ring above.


Chap 3

21

Three-Variable Maps

Topological warps of 3-variable K-maps that show all adjacencies: Venn Diagram Cylinder

Y Z

X

1376 5

4

2

0


Chap 3

22

Three-Variable Maps

Example Shapes of 2-cell Rectangles:

Read off the product terms for the rectangles shown

y0 1 3 2

5 64 7xz

0

1

00 01 11 10X YZ

XYYZ

XZ


Chap 3

23

Three-Variable Maps

Example Shapes of 4-cell Rectangles:

Read off the product terms for the rectangles shown

y0 1 3 2

5 64 7xz

0

1

00 01 11 10X YZ

Y ZZ


Chap 3

24

Three Variable Maps

z)y,F(x,

y

11

x

z

1 1

1

z

z

yx

yx

K-Maps can be used to simplify Boolean functions bysystematic methods. Terms are selected to cover the1sin the map.

Example: Simplify )(1,2,3,5,7z)y,F(x, m


Chap 3

25

Three-Variable Map Simplification Use a K-map to find an optimum SOP

equation for ,7)(0,1,2,4,6 Z)Y,F(X, m

0

1

00 01 11 10X YZ

1 1 1

111Z

XY

XY

F = XY + XY + Z


Chap 3

26

Four Variable Maps

Map and location of minterms:

8 9 1011

12 13 1415

0 1 3 2

5 64 7

X

Y

Z

WVariable Order

WXYZ

00

01

10

11

00 01 11 10


Chap 3

27

Four Variable Terms

Four variable maps can have rectangles corresponding to:

A single 1 = 4 variables, (i.e. Minterm) Two 1s = 3 variables, Four 1s = 2 variables Eight 1s = 1 variable, Sixteen 1s = zero variables (i.e.

Constant "1")


Chap 3

28

Four-Variable Maps

Example Shapes of Rectangles:

8 9 1011

12 13 1415

0 1 3 2

5 64 7

X

Y

Z

W

WXYZ

00

01

10

11

00 01 11 10

XZ

WY

XZ


Chap 3

29

Four-Variable Maps

Example Shapes of Rectangles:

X

Y

Z

8 9 1011

12 13 1415

0 1 3 2

5 64 7

W

WXYZ

00

01

10

11

00 01 11 10

W

XY Z

X

Z


Chap 3

30

Four-Variable Map Simplification )8,10,13,152,4,5,6,7,(0,Z)Y,X,F(W, m

X

Y

Z

8 9 1011

12 13 1415

0 1 3 2

5 64 7

W

WXYZ

00

01

10

11

00 01 11 10

WXXZ

1

1 1 1 1

1

1

11

1

XZ


Chap 3

31

3,14,15

Four-Variable Map Simplification )(3,4,5,7,9,1Z)Y,X,F(W, m

X

Y

Z

8 9 1011

12 13 1415

0 1 3 2

5 64 7

W

WXYZ

00

01

10

11

00 01 11 10

XZ

1

1 1 1

1

111

WYZWXY

WYZWXY


Chap 3

32

Systematic Simplification

Implicant a product term of which if the function has the value 1 for all minterms.

A Prime Implicant is a product term obtained by combining the maximum possible number of adjacent squares in the map into a rectangle with the number of squares a power of 2 remove any literal not a implicant.

A prime implicant is called an Essential Prime Implicant if it is the only prime implicant that covers (includes) one or more minterms.

Prime Implicants and Essential Prime Implicants can be determined by inspection of a K-Map.

A set of prime implicants "covers all minterms" if, for each minterm of the function, at least one prime implicant in the set of prime implicants includes the minterm.

Minterm iMinterm j Product term


Chap 3

33

DB

CB

1 1

1 1

1 1

B

D

A

1 1

1 1

1

Example of Prime Implicants

Find ALL Prime ImplicantsESSENTIAL Prime Implicants

C

BD

CD

BD

Minterms covered by single prime implicant

DB

1 1

1 1

1 1

B

C

D

A

1 1

1 1

1

AD

BA


Chap 3

34

Prime Implicant Practice

Find all prime implicants for:

A

B

C

D

1

13,14,15),10,11,12,(0,2,3,8,9D)C,B,F(A, m

1 1

11 1 1

11 1 1A

BCBD


Chap 3

35

Another Example

Find all prime implicants for:

Hint: There are seven prime implicants!

A

B

C

D

1 1 1

1 1

11 1 1

15),12,13,14,(0,2,3,4,7D)C,B,G(A, m


Chap 3

36

Five Variable or More K-Maps

For five variable problems, we use two adjacent K-maps. It becomes harder to visualize adjacent minterms for selecting PIs. You can extend the problem to six variables by using four K-Maps.

X

Y

Z

W

V = 0

X

Z

W

V = 1 Y

X

Y

Z

W

V = 0

X

Z

W

V = 1Y


Chap 3

37

Prime Implicants Selection Rule

Find all prime implicants. Include all essential prime implicants in the

solution Select a minimum cost set of non-essential prime

implicants to cover all minterms not yet covered: Minimize the overlap among prime implicants as much

as possible.

Make sure that each prime implicant selected includes at least one minterm not included in any other prime implicant selected avoid redundancy.


Chap 3

38

Selection Rule Example

Simplify F(A, B, C, D) given on the K-map.

1

1

1

1 1

1

1

B

D

A

C

1

1

1

1

1

1

1 1

1

1

B

D

A

C

1

1

Essential

Minterms covered by essential prime implicants

Selected


Chap 3

39

Selection Rule Example

B

C

D

A

1 1

11

1 1

1 1

1

Essential


Chap 3

40

Product-of-Sums Simplification

Concept: mi = Mi How to derive a POS using SOP derivation:

Derive F = mi+mj +mn F = Mi Mj Mn

B

C

D

A

1 1

1

1

0 0

1 1

1

0

0 0 0

0

0

0

F = AB + CD + BD

F = (A+B)(C+D)(B+D)


Chap 3

41

Product-of-Sums Simplification

How to derive a simplified SOP and POS from a POS?F =(A+C+D)(A+C+D)(A+B+D)(A+B+D)F = ACD + ACD + ABD + ABD

B

C

D

A

1 1

0

0

0 0

0 1

1

0

1 0 1

1

1

1

F = AB + CD + AD + BC

F = AC + BD

F = (A+C)(B+D)


Chap 3

42

Sometimes a function table or map contains entries for which it is known: the input values for the minterm will never occur, or The output value for the minterm is not used

In these cases, the output value need not be defined Incompletely specified functions functions that have unspecified

outputs (it can be 1 or 0)for some input combinations. Instead, the output value is defined as a don't care By placing don't cares ( an x entry) in the function table or

map, the cost of the logic circuit may be lowered. Example 1: A logic function having the binary codes for the

BCD digits as its inputs. Only the codes for 0 through 9 are used. The six codes, 1010 through 1111 never occur, so the output values for these codes are x to represent dont cares.

Don't Cares in K-Maps


Chap 3

43

Example 2: A circuit that represents a very common situation that occurs in computer design has two distinct sets of input variables: A, B, and C which take on all possible combinations, and Y which takes on values 0 or 1.

and a single output Z. The circuit that receives the output Z observes it only for (A,B,C) = (1,1,1) and otherwise ignores it. Thus, Z is specified only for the combinations (A,B,C,Y) = 1110 and 1111. For these two combinations, Z = Y. For all of the 14 remaining input combinations, Z is a dont care.

Ultimately, each x entry may take on either a 0 or 1 value in resulting solutions

For example, an x may take on value 0 in an SOP solution and value 1 in a POS solution, or vice-versa.

Any minterm with value x need not be covered by a prime implicant.

Don't Cares in K-Maps

AB

C

Y

01

XXXX

XXXX

XX

X

XX

X


Chap 3

44

Example: BCD 5 or More The map below gives a function F1(w,x,y,z) which is

defined as "5 or more" over BCD inputs. With the don't cares used for the 6 non-BCD combinations:

F1 (w,x,y,z) = w + x z + x y G = 7 This is much lower in cost than F2 where the

don't cares were treated as "0s."G = 12

For this particular function, cost G for the POS solution for F1(w,x,y,z) is not changed by using the don't cares.

z

w

0 1 3 2

4 5 7 6

12 13 15 14

8 9 11 10

1

1

11

1

X X X

X X

X

0 0 0 0

0x

y

yxwyxwzxwz) y,x,F2(w,


Chap 3

45

Dont Care Another Example

B

C

D

A

X 1

X

0

0 1

0 0

X

0

0 1 0

1

0

1

B

C

D

A

X 1

X

0

0 1

0 0

X

0

0 1 0

1

0

1

F = CD + AB F = CD + AD

F = D + AC

F = D ( A+C)


Chap 3

46

Selection Rule Example with Don't Cares

Simplify F(A, B, C, D) given on the K-map. Selected

Minterms covered by essential prime implicants

1

1

x

x

x x

x

1

B

D

A

C

1

1 1

1

x

x

x x

x

1

B

D

A

C

1

1

Essential


Chap 3

47

Product of Sums Example

Find the optimum POS solution:

Hint: Use and complement it to get the result.

,13,14,15)(3,9,11,12D)C,B,F(A, m (1,4,6) d

F

B

C

D

A

0 X

0

0

1 1

1 0

0

1

X 0 X

1

1

1

F = AB + BD

F = (A + B) (B + D)


Chap 3

48

Universal

A set of gates is said to be universal if any Boolean function can be composed of the elements of this set. {AND, OR, NOT} a universal set.

Universal gate - a gate type that can implement any Boolean function.


Chap 3

49

Other Gate Types

Why? Implementation feasibility and low cost Power in implementing Boolean functions Convenient conceptual representation

Gate classifications Primitive gate - a gate that can be described using a

single primitive operation type (AND or OR) plus an optional inversion(s).

Complex gate - a gate that requires more than one primitive operation type for its description

Primitive gates will be covered first


Chap 3

50

Buffer

A buffer is a gate with the function F = X:

In terms of Boolean function, a buffer is the same as a connection! So why use it?

A buffer is an electronic amplifier used to improve circuit voltage levels and increase the speed of circuit operation.

X F


Chap 3

51

NAND Gate

The basic NAND gate has the following symbol, illustrated for three inputs: AND-Invert (NAND)

NAND represents NOT AND, i. e., the AND function with a NOT applied. The symbol shown is an AND-Invert. The small circle (bubble) represents the invert function.

XYZ

ZYX)Z,Y,X(F


Chap 3

52

NAND Gates (continued)

Applying DeMorgan's Law gives Invert-OR (NAND)

This NAND symbol is called Invert-OR, since inputs are inverted and then ORed together.

AND-Invert and Invert-OR both represent the NAND gate. Having both makes visualization of circuit function easier.

A NAND gate with one input degenerates to an inverter.

XYZ

ZYX)Z,Y,X(F


Chap 3

53

NAND Gates (continued)

The NAND gate is the natural implementation for the simplest and fastest electronic circuits

The NAND gate is a universal gate as shown in the following.

NAND usually does not have a operation symbol defined since the NAND operation is not associative, and we have difficulty dealing with non-associative mathematics!

x x xy xy xyxy=x+y


Chap 3

54

Two-level NAND Gates

A function of sum-of-products form is easy to convert to NAND gates. F = AB + CD F = AB + CD F = AB CD

AB

CD

F


Chap 3

55

Two-level NAND Gates cont.

Converting procedures Simplify the function and express it in sum-of-

products form, For each line connecting to the 2-level OR gate,

insert two inverters the its two ends, Transform the invert-OR gate to NAND gate.

1 1 1

11 1F = XY + XY + Z

F = XY + XY + Z

F = XY XY Z


Chap 3

56

Multilevel NAND Gates

The procedures to convert to multilevel NAND gates circuits: Convert all AND gates to NAND gates with

AND-NOT graphic symbols, Convert all OR gates to NAND gates with

NOT-OR graphic symbols, Complement the input literal if the signal has

single bubble, and insert a NOT gate for the output signal with single bubble.


Chap 3

57

Multilevel NAND Gates Cont.

AB

CD

BC

B

A

B

D

B

A

CE

D C


Chap 3

58

NOR Gate

The basic NOR gate has the following symbol, illustrated for three inputs: OR-Invert (NOR)

NOR represents NOT - OR, i. e., the OR function with a NOT applied. The symbol shown is an OR-Invert. The small circle (bubble) represents the invert function.

XYZ

ZYX)Z,Y,X(F +


Chap 3

59

NOR Gate (continued)

Applying DeMorgan's Law gives Invert-AND (NOR)

This NOR symbol is called Invert-AND, since inputs are inverted and then ANDed together.

OR-Invert and Invert-AND both represent the NOR gate. Having both makes visualization of circuit function easier.

A NOR gate with one input degenerates to an inverter.

XYZ


Chap 3

60


The NOR gate is another natural implementation for the simplest and fastest electronic circuits

The NOR gate is a universal gate NOR usually does not have a defined operation

symbol since the NOR operation is not associative, and we have difficulty dealing with non-associative

mathematics!

x x xy x+y xyx+y=xy


Chap 3

61


A

B

D

B

A

CEE

A B

B A


Chap 3

62

Exclusive OR/ Exclusive NOR

The eXclusive OR (XOR) function is an important Boolean function used extensively in logic circuits.

The XOR function may be; implemented directly as an electronic circuit (truly a gate) or implemented by interconnecting other gate types (used as a

convenient representation)

The eXclusive NOR function is the complement of the XOR function

By our definition, XOR and XNOR gates are complex gates.


Chap 3

63

Exclusive OR/ Exclusive NOR

Uses for the XOR and XNORs gate include: Adders/subtractors/multipliers Counters/incrementers/decrementers Parity generators/checkers

Definitions The XOR function is: The eXclusive NOR (XNOR) function, otherwise

known as equivalence is:

Strictly speaking, XOR and XNOR gates do no exist for more than two inputs. Instead, they are replaced by odd and even functions.

YXYXYX

YXYXYX


Chap 3

64

Truth Tables for XOR/XNOR

Operator Rules: XOR XNOR

The XOR function means:X OR Y, but NOT BOTH

Why is the XNOR function also known as the equivalence function, denoted by the operator ?

X Y XY

0 0 00 1 11 0 11 1 0

X Y

0 0 10 1 01 0 01 1 1

or XY(XY)


Chap 3

65

XOR/XNOR (Continued)

The XOR function can be extended to 3 or more variables. For more than 2 variables, it is called an odd function or modulo 2 sum (Mod 2 sum), not an XOR:

The complement of the odd function is the even function. The XOR identities:

X1XX0X 1XX0XX

XYYX ZYX)ZY(XZ)YX(

ZYXZYXZYXZYXZYX


Chap 3

66

Symbols For XOR and XNOR

XOR symbol:

XNOR symbol:

Symbols exist only for two inputs


Chap 3

67

XOR Implementations

The simple SOP implementation uses the following structure:

A NAND only implementation is:

X

Y

X Y

X

Y

X Y

xy = xy + xx

= x(x+y)

= xxy


Chap 3

68

Odd and Even Functions

The odd and even functions on a K-map form checkerboard patterns.

The 1s of an odd function correspond to minterms having an index with an odd number of 1s.

The 1s of an even function correspond to minterms having an index with an even number of 1s.

Implementation of odd and even functions for greater than 4 variables as a two-level circuit is difficult, so we use trees made up of : 2-input XOR or XNORs 3- or 4-input odd or even functions

EO E

EE

EE

EE

00 01 11 1O

00

01

11

10 O

O

OO

O

OO


Chap 3

69

Example: Odd Function Implementation

Design a 3-input odd function F = X Y Zwith 2-input XOR gates

Factoring, F = (X Y) Z The circuit:

+ +

+ +

XY

ZF

W

WF


Chap 3

70

Example: Even Function Implementation

Design a 4-input even function F = W X Y Zwith 2-input XOR and XNOR gates

Factoring, F = (W X) (Y Z) The circuit:

+ + +

+ + +

WX

YF

Z


Chap 3

71

Parity Generators and Checkers In Chapter 1, a parity bit added to n-bit code to produce an n

+ 1 bit code: Add odd parity bit to generate code words with even parity Add even parity bit to generate code words with odd parity Use odd parity circuit to check code words with even parity Use even parity circuit to check code words with odd parity

Example: n = 3. Generate evenparity code words of length 4 withodd parity generator:

Check even parity code words of length 4 with odd parity checker:

Operation: (X,Y,Z) = (0,0,1) gives(X,Y,Z,P) = (0,0,1,1) and E = 0.If Y changes from 0 to 1 betweengenerator and checker, then E = 1 indicates an error.

XYZ P

XY

ZE

P

001 1

00

11

0


Chap 3

72

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