m tech est syllabus 2008-09 non-unitized(1)
TRANSCRIPT
-
8/10/2019 M Tech EST Syllabus 2008-09 Non-unitized(1)
1/33
CURRICULUM & SYLLABUS
MASTER OF TECHNOLOGYin
EMBEDDED SYSTEM TECHNOLOGY
(For students admitted in 2008-09 and afterwards)
DEPARTMENT OF ECE
Faculty of Engineering and Technology, SRM University
SRM Nagar, Kattankulathur 603203, Kancheepuram District, Tamilnadu
-
8/10/2019 M Tech EST Syllabus 2008-09 Non-unitized(1)
2/33
Page 1
DEPARTMENT OF ECE
Faculty of Engineering and Technology, SRM University
SRM Nagar, Kattankulathur 603203, Kancheepuram District, Tamilnadu
M.TECH - EMBEDDED SYSTEM TECHNOLOGY (FULL TIME)
Curriculum & Syllabus
(For students admitted in 2008-09 and afterwards)
GUIDELINES FOR SELECTING COURSES
SI.
No.Category
No. of Courses
I Semester II Semester III Semester IV Semester
1 Core Courses 3 3 - -
2 Elective Courses 1 1 3 -
3 Supportive Courses 1 1 - -
4 Seminar - - 1 -
5 Project Work* - - 1* 1**
* Main Project - Phase I ** Main Project - Phase II
CORE COURSES
Code No. Course Title L T P C
EM0501 Advanced Digital System Design 3 1 0 4
EM0502 Micro Controller System Design and Applications 3 0 3 4
EM0503 Digital Signal Processing 3 1 0 4
EM0504 Advanced Microprocessors & Micro controllers Design 3 1 0 4
EM0505
or
EM0506
Embedded system software in C
or
Advanced Embedded Systems
3 1 0 4
EM0507
or
EM0508
VLSI Architecture and Design Methodologies
or
VHDL
3 0 3 4
PROGRAM ELECTIVES
Code No. Course Title L T P C
EM0551 Real Time Operating Systems 3 0 0 3
EM0552 Embedded Communication Software Design 3 0 0 3
EM0553 Architecture and Design of Distributed Embedded System 3 0 0 3
EM0554 Software Modeling For Embedded Systems 3 0 0 3
EM0555 Data Communication and Networking 3 0 0 3
EM0556 Embedded Networking 3 0 0 3
EM0557 Cryptography and Network Security 3 0 0 3
EM0558 Wireless & Mobile Communication 3 0 0 3
EM0559 Embedded Wireless Sensor Networks 3 0 0 3
EM0560 Embedded Control Systems 3 0 0 3
EM0561 Intelligent Systems 3 0 0 3
EM0562 Operating Systems 3 0 0 3
EM0563 Computer Architecture 3 0 0 3
EM0564 Digital Image Processing 3 0 0 3
EM0565 Multimedia Systems 3 0 0 3
-
8/10/2019 M Tech EST Syllabus 2008-09 Non-unitized(1)
3/33
Page 2
EM0566 FPGA based Systems 3 0 0 3
EM0567 DSP Integrated Circuits 3 0 0 3
VL0558 System-on-Chip-Design 3 0 0 3
EM0569 Advanced Computer Architecture 3 0 0 3
EM0573 Advanced FPGA Design 3 0 0 3
SUPPORTIVE COURSES
Course
code Course Title L T P CMA0513 Applied Mathematics 3 0 0 3
EM0509 Real Time Systems 3 0 0 3
OTHER COURSES
Course code Course Title L T P C
EM0601 Project work Phase I 0 0 12 6
EM0602 Project work Phase II 0 0 36 18
EM0603 Seminar 0 0 2 1
-
8/10/2019 M Tech EST Syllabus 2008-09 Non-unitized(1)
4/33
Page 3
EM0501 ADVANCED DIGITAL SYSTEM DESIGN L T P C
Pre-requisite: Nil 3 1 0 4
PURPOSELearning design of digital circuits is a fundamental necessity for designing embedded systems. This subject
provides necessary instruments to achieve that goal.
INSTRUCTIONAL OBJECTIVESTo make the student learn: theory of logic and logic functions, design of digital circuits, and an introduction to VHDL
language.
SYLLABUS CONTENTS
COMBINATIONAL LOGIC FUNCTIONSBinary codes, Symmetric functions, Synthesis of symmetric networks, Identification of symmetric functions,
Introductory concepts of Threshold Logic, Decoders, Encoders, Multiplexers, Implementing functions using
Multiplexers, Demultiplexers, Magnitude Comparators, Parity Generators and Checkers, Signed Binary
Arithmetic, Binary Adders and Subtractors, BCD Adders.
COUNTERS- SHIFT REGISTERS AND STATE MACHINES
Digital counters and shift registers, Mealy machine, Moore machine, State diagrams, State table minimization,Incompletely Specified Sequential Machines- State Assignments.
PROGRAMMABLE LOGIC DEVICESBasic concepts, Programming technologies, Programmable Logic Element (PLE), Programmable Logic Array
(PLA), Programmable Array Logic (PAL), Structure of standard PLDs, complex PLDs (CPLD). Design of
combinational and sequential circuits using PLD's, Introduction to Field Programmable Gate Arrays-types of
FPGA- XILINX XC 3000 series and 4000 series FPGAs. Altera CPLDs- Altera FLEX 10K Series CPLDs.
Design examples.
FINITE STATE MACHINES (FSM)State transition table- state assignment for FPGAs, State Machine Charts, Derivation of SM Charts, Realization
of SM charts, Linked state machines. Encoded state machines, Architectures centered around Non-registeredPLDs. State machine designs centered around shift registers. One-hot design method, Application of one-hot
method.
DIGITAL DESIGN WITH VHDLBasic Concepts: Data Objects, Data Types, Operators, Concurrent and Sequential Assignment Statements,
Different Styles of Modeling, Simple Examples.
REFERENCE BOOKS
1. M.Morris Mano, Digital logic and Computer Design, PHI, 1979.
2. Charles.H.Roth, Jr, Digital Systems Design using VHDL, PWS Publishing Company, 2001.
3. R.F. Tinder, Engineering Digital Design, Academic Press, 2000.
4. Zvi Kohavi, Switching and Finite Automata Theory, Tata McGraw Hill, 1978.
5. William I.Fletcher,An Engineering Approach to Digital Design, Prentice Hall of India,1996.
-
8/10/2019 M Tech EST Syllabus 2008-09 Non-unitized(1)
5/33
Page 4
EM0502MICROCONTROLLER SYSTEM DESIGN AND
APPLICATIONSL T P C
Pre-requisite: Nil 3 0 3 4
PURPOSEAlmost all embedded systems are designed with microcontrollers as an essential basic part. This subject provides
basic knowledge of typical microcontrollers.
INSTRUCTIONAL OBJECTIVESTo make the student learn: two typical microcontrollers and how to use it in pratical applications. The lab component
gives hands on training on the design, development and microcontroller applications.
SYLLABUS CONTENT
8051 ARCHITECTUREBasic organization 8051 CPU structure Register file Interrupts Timers Port circuits Instruction set
Timing diagram Addressing modes Simple Program and Applications.
PERIPHERALS AND INTERFACINGTypical Bus structure Bus memory organization Timing characteristics Extended Model and Memory
Interfacing Polling Interfacing Basic I/O devices Analog and Digital interfacing PWM mode operation
Serial port application.
80196 ARCHITECTURECPU operation Interrupt structure Timers High Speed Input / Output Ports I/O control and Status registers
Instruction Set Addressing Modes Simple Programming Queues Tables and Strings Stack Memories Key
Switch Parsing.
PERIPHERALS AND INTERFACINGAnalog Interface Serial Ports Watch dog timers Real Time Clock Multitasking Bus Control Memory
Timing External ROM and RAM expansion PWM control A/D interfacing.
CASE STUDIES FOR 8051 AND 80196Real Time clock DC Motor Speed Control Generation of Gating Signals for Converters and Inverters Frequency
Measurement Temperature Control
REFERENCE BOOKS
1. Ayala, Kenneth, The 8051 Microcontroller, Upper Saddle River, New Jersey Prentice Hall, 2000.
2. Intel manual on 16 bit embedded controllers, Santa Clara, 1991.
3. Muhammad Ali Mazidi, Janice Gillispie Mazidi., The 8051 Microcontroller and Embedded systems, Person
Education, 2004.
4. Michael Slater, Microprocessor based design - A comprehensive guide to effective Hardware design, Prentice
Hall, New Jersey, 1989.
-
8/10/2019 M Tech EST Syllabus 2008-09 Non-unitized(1)
6/33
Page 5
EM0503 DIGITAL SIGNAL PROCESSING L T P C
Pre-requisite: Nil 3 1 0 4
PURPOSEDigital signal processing has become a part of many embedded systems. Hence this subject on DSP techniques
is given here.
INSTRUCTIONAL OBJECTIVESTo make the student learn: theory of DSP, design of digital signal processing applications and an introduction to DSP
processors.
SYLLABUS CONTENT
DISCRETE TIME SIGNALS AND SYSTEMSRepresentation of discrete time signal classifications Discrete time system Basic operations on sequence
linear Time invariant causal stable solution to difference equation convolution sum correlation Discrete
time Fourier series Discrete time Fourier transform.
FOURIER AND STRUCTURE REALIZATIONDiscrete Fourier transform properties Fast Fourier transform Z-transform structure realization Direct form
lattice structure for FIR filter Lattice structure for IIR Filter.
FILTERSFIR Filter windowing technique optimum equiripple linear phase FIR filter IIR filter Bilinear transformation
technique impulse invariance method Butterworth filter Tchebycheff filter.
MULTISTAGE REPRESENTATIONSampling of band pass signal anti aliasing filter Decimation by an integer factor interpolation by an integer
factor sampling rate conversion implementation of digital filter banks sub-band coding Quadrature mirror
filter A/D conversion Quantization coding D/A conversion Introduction to wavelets.
DIGITAL SIGNAL PROCESSORSFundamentals of fixed point DSP architecture Fixed point number representation and computation Fundamentalsof floating point DSP architecture floating point number representation and computation study of TMS 320 C
54XX processor Basic programming addition subtraction multiplication convolution correlation study ofTMS 320 F2XXX processor Basic programming convolution correlation.
REFERENCE BOOKS
1. John G. Proakis, Dimitris, G. Manolakis, Digital Signal Processing: Principles, Algorithms and
Applications, PHI.
2. S.Salivahanan, A.Vallavaraj and C.Gnanapriya, Digital Signal Processing, TMH, 2000.
3. A.V. Oppenheim and R.W.Schafer, Englewood, Digital Signal Processing, Prentice-Hall Inc, 1975.
4. 4. Rabiner and Gold, Theory and Application of Digital Signal Processing, A comprehensive, Industrial
Strength DSP reference book.
5. B.Venkatramani & M.Bhaskar, Digital Signal Processors architecture, programming and applications,TMH, 2002.
-
8/10/2019 M Tech EST Syllabus 2008-09 Non-unitized(1)
7/33
-
8/10/2019 M Tech EST Syllabus 2008-09 Non-unitized(1)
8/33
-
8/10/2019 M Tech EST Syllabus 2008-09 Non-unitized(1)
9/33
Page 8
EM0506 ADVANCED EMBEDDED SYSTEMS L T P C
Pre-requisite: Nil 3 1 0 4
PURPOSEThis subject provides all basic concepts of embedded systems and their implementation in C language.
INSTRUCTIONAL OBJECTIVESTo make the student learn, the embedded system implementation in C language.
SYLLABUS CONTENT
INTRODUCTION AND REVIEW OF EMBEDDED HARDWARETerminology Gates Timing diagram Memory Microprocessor buses Direct memory access Interrupts
Built interrupts Interrupts basis Shared data problems Interrupt latency - Embedded system evolution trends
Round-Robin Round Robin with interrupt function Rescheduling architecture algorithm.
REAL TIME OPERATING SYSTEMTask and Task states Task and data Semaphore and shared data operating system services Message queues
timing functions Events Memory management Interrupt routines in an RTOS environment Basic design using
RTOS.
EMBEDDED HARDWARE, SOFTWARE AND PERIPHERALSCustom single purpose processors: Hardware Combination Sequence Processor design RT level design
optimizing software: Basic Architecture Operation Programmers view Development Environment
ASIP Proce ssor Design Peripherals Timers, counters and watch dog timers UART Pulse width modulator
LCD controllers Key pad controllers Stepper motor controllers A/D converters Real time clock.
MEMORY AND INTERFACINGMemory write ability and storage performance Memory types composing memory Advance RAM interfacing
communication basic Microprocessor interfacing I/O addressing Interrupts Direct memory access Arbitration
multilevel bus architecture Serial protocol Parallel protocols Wireless protocols Digital camera example.
PROCESS MODELS AND HARDWARE SOFTWARE CO-DESIGN
Modes of operation Finite state machine HCFSL and state charts language state machine models Concurrentprocess model Concurrent process Communication among process Synchronization among process
Implementation - Data Flow model - Design technology- Automation synthesis Hardware & software co-simulation
IP cores Design Process Model.
REFERENCE BOOKS
1. David. E.Simon, An Embedded Software Primer, Pearson Education, 2001.
2. Frank Vahid and Tony Gwargie, Embedded System Design, John Wiley & sons, 2002.
3. Steve Heath, Embedded System Design, Elsevier, Second Edition, 2004.
-
8/10/2019 M Tech EST Syllabus 2008-09 Non-unitized(1)
10/33
Page 9
EM0507VLSI ARCHITECTURE AND DESIGN
METHODOLOGIESL T P C
Pre-requisite: Nil 3 0 3 4
PURPOSEFPGA and ASICs have become a part of many embedded systems. In this subject we introduce FPGAs and some
basic principles needed for FPGA design.
INSTRUCTIONAL OBJECTIVESTo make the student learn to understand various FPGAs and ASIC.
SYLLABUS CONTENT
INTRODUCTIONOverview of digital VLSI design methodologies Trends in IC Technology Advanced Boolean algebra
Shannons expansion theorem Consensus theorem Octal designation- Run measure Buffer gates Gate
expander Reed Muller expansion Synthesis of multiple output combinational logic circuits by product map
method Design of static hazard free, dynamic hazard free logic circuits.
ANALOG VLSI AND HIGH SPEED VLSIIntroduction to analog VLSI realization of neural networks and switched capacitor filters Sub-micron technology
and GAs VLSI Technology.
PROGRAMMABLE ASICsAnti fuse static RAM EPROM and technology PREP bench marks Actel ACT Xilinx LCA Altera flex
Altera MAX DC & AC inputs and outputs Clock and power inputs Xilinx I/O blocks.
PROGRAMMABLE ASIC DESIGN SOFTWAREActel ACT Xilinx LCA Xilinx EPLD Altera MAX 5000 and 7000 Altera MAX 9000 design systems logic
synthesis half gate schematic entry Low level design language PLA tools EDIF CFI design representation.
LOGIC SYNTHESIS, SIMULATION AND TESTINGBasic features of VHDL language for behavioral modeling and simulation Summary of VHDL data types
Dataflow and structural modeling VHDL and logic synthesis Circuit and layout verification Types of simulation
Boundary scan test Fault simulation Automatic test pattern generation design examples.
REFERENCE BOOKS
1. William I.Fletcher, An Engineering Approach to Digital Design, Prentice Hall of India.
2. M.J.S. Smith, Application Specific Integrates Circuits, Addison Wesley Longman Inc. 1997.
3. Amar Mukharjee, Introduction to NMOS and CMOS VLSI System Design, Prentice Hall, 1986.
4. Fredrick J. Hill and Gerald R.Peterson, Computer Aided Logical Design with emphasis on VLSI, 4th
edition,
Wiley, 1993.
-
8/10/2019 M Tech EST Syllabus 2008-09 Non-unitized(1)
11/33
Page 10
EM0508 VHDL L T P C
Pre-requisite:Nil 3 0 0 3
PURPOSEAs FPGAs are becoming part of embedded systems, it is essential for an embedded system developer to know
VHDL. Hence this subject is offered.
INSTRUCTIONAL OBJECTIVESTo make the student learn, VHDL language, programming, its applications to make circuits.
SYLLABUS CONTENT
VHDL FUNDAMENTALSFundamental Concepts Modeling Digital Systems Domains and Levels of Modeling Modeling Languages
VHDL Modeling concepts Scalar Data Types and Operations Constants and variables Scalar Types Type
Classification Attributes and Scalar types Expressions and operators Sequential Statements If statements
Case statements Null Statements Loop statements Assertion and Report statements.
COMPOSITE DATA TYPES AND BASIC MODELING CONSTRUCTSArrays Unconstrained Array types Array Operations and Referencing Records Basic Modeling Constructs
Entity Declarations Architecture Bodies Behavioral Descriptions Structural Descriptions Design Processing.Case Study: A pipelined Multiplier Accumulator.
SUBPROGRAMS AND PACKAGESProcedures Procedure Parameters Concurrent Procedure Call Statements functions Overloading Visibility
of Declarations Packages and Use Clauses Package declarations Package bodies Use Clauses The
predefined Aliases - Aliases for data objects Aliases for Non-Data Items. Case Study: A Bit-Vector Arithmetic
Package.
SIGNALS, COMPONENTS, CONFIGURATIONSBasic Resolved signals IEEE Std_Logic_1164 Resolved subtypes Resolved signal parameters Generic
Constants Parameterizing behavior Parameterizing structure Components and Configurations Components
Configuring component Instances Configuration Specification Generate Statements generating iterativestructure Conditionally generating structures Configuration of generate Statements. Case Study: The DLX
Computer System.
ADTs AND FILESAccess Types Linked Data structures Abstract Data Types using Packages Files and Input/Output Files The
Package Textio Verilog. Case Study: Queuing Networks.
REFERENCE BOOKS
1. Peter J.Ashenden, The Designers Guide to VHDL, Morgan Kaufmann Publishers, San Francisco,
Second Edition, May 2001.
2. Zainalabedin Navabi, VHDL Analysis and Modeling of Digital Systems, McGraw Hill International
Editions, Second Edition, 1998.
3. James M.Lee, Verilog Quick start, Kluwer Academic Publishers, Second Edition, 1999.
-
8/10/2019 M Tech EST Syllabus 2008-09 Non-unitized(1)
12/33
Page 11
EM0551 REAL TIME OPERATING SYSTEMS L T P C
Pre-requisite: Nil 3 0 0 3
PURPOSEThe use of real time operating systems has become a necessity to build complex embedded systems, this subject is
provided.
INSTRUCTIONAL OBJECTIVESTo make the student learn fundamentals of Operating Systems, implementation aspects of real time concepts and few
applications on RTOS.
SYLLABUS CONTENT
REVIEW OF OPERATING SYSTEMSBasic Principles System Calls Files Processes Design and Implementation of processes Communication
between processes Operating System structures.
DISTRIBUTED OPERATING SYSTEMSTopology Network types Communication RPC Client server model Distributed file system Design
strategies.
REAL TIME MODELS AND LANGUAGESEvent Based Process Based and Graph based Models Petrinet Models Real Time Languages RTOS Tasks
RT scheduling - Interrupt processing Synchronization Control Blocks Memory Requirements.
REAL TIME KERNELPrinciples Design issues Polled Loop Systems RTOS Porting to a Target Comparison and study of RTOS VX
works and COS Case studies.
RTOS APPLICATION DOMAINSRTOS for Image Processing Embedded RTOS for voice over IP RTOS for fault Tolerant Applications RTOS
for Control Systems.
REFERENCE BOOKS
1. Charles Crowley, Operating Systems-A Design Oriented approach, McGraw Hill 1997.
2. C.M. Krishna, Kang, G.Shin, Real Time Systems, McGraw Hill, 1997.
3. Tanenbaum, Distributed Operating Systems, Pearson Education.
4. Raymond J.A.Bhur, Donald L.Bailey, An Introduction to Real Time Systems, PHI 1999.
-
8/10/2019 M Tech EST Syllabus 2008-09 Non-unitized(1)
13/33
Page 12
EM0552 EMBEDDED COMMUNICATION SOFTWARE DESIGN L T P C
Pre-requisite: Nil 3 0 0 3
PURPOSEAs now embedded systems has to be designed with some communication facility to give interaction between
themselves and also the user, this course on communication software design is included in the curriculum.
INSTRUCTIONAL OBJECTIVESTo make the student learn: OSI layered architecture of communication systems, hardware software partitioning and
system to system communication design.
SYLLABUS CONTENT
INTRODUCTION TO COMMUNICATIONOSI Reference Model Communication Devices Communication Echo System Design Consideration Host Based
Communication Embedded Communication System OS Vs RTOS.
SOFTWARE PARTITIONINGLimitation of strict Layering Tasks & Modules Modules and Task Decomposition -Layer2 Switch Layer3
Switch / Routers Protocol Implementation Management Types Debugging Protocols.
TABLES & OTHER DATA STRUCTURESPartitioning of Structures and Tables Implementation Speeding Up access Table Resizing Table access
routines Buffer and Timer Management Third Party Protocol Libraries.
MANAGEMENT SOFTWAREDevice Management Management Schemes Router Management management of Sub System
Architecture Device to manage configuration System Start up and configuration.
MULTI BOARD COMMUNICATION SOFTWARE DESIGNMulti Board Architecture Single control Card and Multiple line Card Architecture Interface for Multi Board
software Failures and Fault Tolerance in Multi Board Systems Hardware independent development Using a
COTS Board Development Environment Test Tools.
REFERENCE BOOKS
1. Sridhar .T, Designing Embedded Communication Software, Elsevier publications, 2003.
-
8/10/2019 M Tech EST Syllabus 2008-09 Non-unitized(1)
14/33
-
8/10/2019 M Tech EST Syllabus 2008-09 Non-unitized(1)
15/33
Page 14
EM0554SOFTWARE MODELING FOR EMBEDDED
SYSTEMSL T P C
Pre-requisite: Nil 3 0 0 3
PURPOSETo introduce some C concepts relavant to embedded systems with 80x86 family as basis and UML.
INSTRUCTIONAL OBJECTIVESTo make the student learn: use of C language for embedded applications, real time UML concepts, co-design
methods.
SYLLABUS CONTENT
INTRODUCTION TO DATA REPRESENTATIONData representation Twos complement, fixed point and floating point number formats Low level programming in
C Primitive data types Functions recursive functions Pointers Structures Unions Dynamic memory
allocation File handling Linked lists.
PROGRAMMING IN ASSEMBLYC and assembly Programming in assembly Register usage conventions Typical use of addressing options
Instruction sequencing Procedure call and return Parameter passing Retrieving parameters Everything in passby value Temporary variables threads preemptive kernels system timer - scheduling.
OBJECT ORIENTED ANALYSISObject oriented analysis and design- Connecting the object model with the use case model Key strategies for object
identification UML basics.
UNIFIED MODELING LANGUAGEObject state behavior UML state charts Role of scenarios in the definition of behavior Timing diagrams
Sequence diagrams Event hierarchies types and strategies of operations Architectural design in UML
concurrency design threads in UML .
SOFTWARE / HARDWARE PARTITIONINGSoftware / Hardware partitioning - Co design overview - Co simulation, synthesis and verifications - Re-configurable
computing - System on Chip (SoC) and IP cores - Low-Power RT Embedded Systems - On-chip Networking .
REFERENCE BOOKS
1. Bruce Powel Douglas, Real time UML, second edition: Developing efficient objects for embedded
systems (The Addison Wesley Object technology series), 2nd
edition 1999, Addison Wesley.
2. Hassan Gomma, Designing concurrent, distributed, and real time applications with UML, Pearson
Education, 2000.
3. Daniel W.Lewis, Fundamentals of embedded software where C and assembly meet, PHI 2002.
4. Axel Jantsch, Nework on chips, Kluwar Academic publishers, 2003.
5. Youn-long, Steve Lin, Essential issues of SoC design, Springer 2006.
6. Steave Furber, ARM systemonchip architecture, Addison Wesley, 2000.
-
8/10/2019 M Tech EST Syllabus 2008-09 Non-unitized(1)
16/33
Page 15
EM0555 DATA COMMUNICATION AND NETWORKS L T P C
Pre-requisite: Nil 3 0 0 3
PURPOSETo introduce concepts of data communication networks.
INSTRUCTIONAL OBJECTIVESTo make the student learn, all parts of communication software in layered architecture.
SYLLABUS CONTENT
INTRODUCTIONComponents of network Topologies WAN / LAN OSI ISO layered Architecture - Modulation and
demodulation Bit error rates Line coding Error correcting codes.
DATA LINK LAYERDesign issues CRC technique and sliding window techniques Performance analysis of sliding window techniques
Framing formats Case Study HDLC protocols Medium access control CSMA / CD Token ring and
token bus FDDI Wireless LAN Performance analysis of MAC protocols Bridges.
NETWORK LAYERCircuit switching packet switching Design issues IP addressing and IP diagram Routers and gateways
Routing Sub netting CIDR ICMP ARP RARP IPv6 QoS.
TRANSPORT LAYERTCP and UDP Error handling and flow control Congestion control TCP Retransmission Timeout Socket
Abstraction.
APPLICATION SERVICESSimple Mail Transfer Protocol (SMTP) File Transfer Protocols (FTP), telnet, the World Wide Web (WWW),
Hypertext Transfer Protocol (HTTP), Domain name service (DNS), Security, Multimedia applications.
REFERENCE BOOKS
1. William Stallings, Data and Computer Communications, Seventh Edition, Prentice Hall, 2003.
2. Larry Peterson, Bruce S Davie, Computer Networks: A Systems Approach, Morgan KaufmannPublishers, 2ndEdition, 1999.
3. James F Kurose, Computer Networking: A Top Down Approach Featuring the Internet, Addison
Wesley, 2nd
Edition 2002.
4. W.Richard Stevens and Gary R Wright, TCP / IP Illustrated, Addison Wesley, Volume 1 & 2, 2001.
-
8/10/2019 M Tech EST Syllabus 2008-09 Non-unitized(1)
17/33
Page 16
EM0556 EMBEDDED NETWORKING L T P C
Pre-requisite: Nil 3 0 0 3
PURPOSETo introduce Controller Area Networking (CAN).
INSTRUCTIONAL OBJECTIVESTo make the student learn, understand CAN and design systems based on CAN.
SYLLABUS CONTENT
EMBEDDED NETWORK REQUIREMENTSEmbedded networking code requirements Communication requirements Introduction to CAN open CAN open
standard Object directory Electronic Data Sheets & Device Configuration files Service Data Objectives
Network management CAN open messages Device profile encoder.
CAN CONFIGURATIONCAN open configuration Evaluating system requirements choosing devices and tools Configuring single devices
Overall network configuration Network simulation Network Commissioning Advanced features and testing.
CONTROLLER AREA NETWORKController Area Network Underlying Technology CAN Overview Selecting a CAN Controller CAN
development tools.
MICRO CANImplementing CAN open Communication layout and requirements Comparison of implementation methods
Micro CAN open CAN open source code Conformance test Entire design life cycle.
IMPLEMENTATIONImplementation issues Physical layer Data types Object dictionary Communication object identifiers
Emerging objects Node states.
REFERENCE BOOKS
1. Glaf P.Feiffer, Andrew Ayre and Christian Keyold, Embedded Networking with CAN and CAN
open, Embedded System Academy 2005.
-
8/10/2019 M Tech EST Syllabus 2008-09 Non-unitized(1)
18/33
Page 17
EM0557 CRYPTOGRAPHY AND NETWORK SECURITY L T P C
Pre-requisite: Nil 3 0 0 3
PURPOSETo introduce the concepts of data security in communication networks which are widely used now with embedded
systems.
INSTRUCTIONAL OBJECTIVESTo make the student learn, security needs, data securing methods like cryptography, and network security aspects.
SYLLABUS CONTENT
SYMMETRIC CIPHERSOverview classical Encryption Techniques Block Ciphers and the Data Encryption standard Introduction to
Finite Fields Advanced Encryption standard Contemporary Symmetric Ciphers Confidentiality using Symmetric
Encryption.
PUBLIC-KEY ENCRYPTION AND HASH FUNCTIONSIntroduction to Number Theory Public-Key Cryptography and RSA Key Management Diffie-Hellman Key
Exchange Elliptic Curve Cryptography Message Authentication and Hash Functions Hash Algorithms DigitalSignatures and Authentication Protocols.
NETWORK SECURITY PRACTICEAuthentication Applications Kerbors X.509 Authentication Service Electronic mail Security Pretty Good
Privacy S/MIME IP Security architecture Authentication Header Encapsulating Security Payload Key
Management.
SYSTEM SECURITYIntruders Intrusion Detection Password Management Malicious Software Firewalls Firewall Design
Principles Trusted Systems.
WIRELESS SECURITYIntroduction to Wireless LAN Security Standards Wireless LAN Security Factors and Issues.
REFERENCE BOOKS
1. William Stallings, Cryptography and Network Security Principles and Practices, Pearson Education, 3rd
Edition, 2003.
2. Atul Kahate, Cryptography and Network Security, Tata McGraw Hill, 2003.
3. Bruce Schneier, Applied Cryptography, John Wiley and Sons Inc, 2001.
4. Stewart S. Miller, Wi-Fi Security, McGraw Hill, 2003.
5. Charles B. Pfleeger, Shari Lawrence Pfleeger, Security In Computing, 3rd Edition, Pearson Education,
2003.
6. Mai, Modern Cryptography: Theory and Practice, First Edition, Pearson Education, 2003.
-
8/10/2019 M Tech EST Syllabus 2008-09 Non-unitized(1)
19/33
-
8/10/2019 M Tech EST Syllabus 2008-09 Non-unitized(1)
20/33
Page 19
EM0559 EMBEDDED WIRELESS SENSOR NETWORKS L T P C
Pre-requisite: Nil 3 0 0 3
PURPOSETo make the student understand and apply the theory behind wireless sensor networks.
INSTRUCTIONAL OBJECTIVESTo impart students with wireless sensor network fundamentals.
SYLLABUS CONTENT
INTRODUCTIONEmbedded network systems representation of signals signal propagation sensor principles.
COMMUNICATIONSource detection and identification digital communications multiple source estimation and multiple access
communications.
NETWORKINGNetworking network position and synchronization services
NETWORK MANAGEMENTEnergy management data management articulation mobility and infrastructure.
NODES, DATA AND APPLICATIONNode architecture network data integrity experimental system design.
REFERENCE BOOKS
1. Gregory Pottie and William Waiger, Principles of Embedded Networked System Design, Cambridge
University Press, 2005.
2. Jr.Edger H. Callaway, Wireless Sensor Networks, CRC Press, 2004.
-
8/10/2019 M Tech EST Syllabus 2008-09 Non-unitized(1)
21/33
-
8/10/2019 M Tech EST Syllabus 2008-09 Non-unitized(1)
22/33
Page 21
EM0561 INTELLIGENT SYSTEMS L T P C
Pre-requisite: Nil 3 0 0 3
PURPOSEIntelligent system concepts are becoming more relevant for embedded systems. Hence this course is provided.
INSTRUCTIONAL OBJECTIVESTo make the student learn: Basic intelligent system concepts, neural networks, fuzzy logic and its implementation
methods.
SYLLABUS CONTENT
INTRODUCTION AND BASIC CONCEPTSIntroduction- Humans and Computers, the structure of the brain, learning in machines, the differences. The basic
neuron- Introduction, modeling the single neuron, learning in simple neurons, the perception: a vectorial perspective,
the perception learning rule, proof, limitations of perceptrons.
MULTILAYER NETWORKSThe multi layer perceptron: Introduction, altering the perception model, the new model, the new learning rule, multi
layer perception algorithm, XOR problem. Multi layer feed forward networks, error back propagation trainingalgorithm: problems with back propagation, Boltzman training, Cauchy training, combined back propagation, Cauchy
training.
RESONANT NETWORKS AND APPLICATIONSHop-field networks: recurrent and bi-directional associative memories, counter propagation network, Artificial
Resonance Theory (ART) Application of neural network: Hand written digit and character recognition- Traveling
sales man problem, a neuro controller.
FUZZY SET THEORYIntroduction to fuzzy set theory: Fuzzy set vs Crisp set, properties of fuzzy sets, operations on fuzzy set fuzzy
compliments, fuzzy intersection- T norms, fuzzy union- t- co-norm, fuzzy relations.
FUZZY LOGIC AND SYSTEMS
Fuzzy Logic: Classical logic multi valued logic, fuzzy propositions, fuzzy quantifiers, linguistic hedges and theirinferences. Fuzzy systems: fuzzy controllers, fuzzy systems and neural networks, fuzzy neural networks, fuzzy
automata, fuzzy dynamic system.
REFERENCE BOOKS
1. R Beale & T Jackson, Neural Computing, An Introduction, Adam Hilger, 1990.
2. G.J.Klir & Bo Yuan, Fuzzy Sets and Fuzzy Logic Theory and Applications, Prentice Hall of India, 1997.
3. Timothy S.Ross, Fuzzy Logic with engineering applications, McGraw Hill, 1997.
4. Kosko B, Neural Networks and Fuzzy Systems, Prentice Hall of India, 1994.
5. Zimmermann H.J, Fuzzy Set Theory and Its Applications, Kluwer Academic Publishers, 1994.
6. Rao V.B and Rao H.V., C++, Neural Networks and Fuzzy Logic, BPB Publications, 1996.
-
8/10/2019 M Tech EST Syllabus 2008-09 Non-unitized(1)
23/33
Page 22
EM0562 OPERATING SYSTEMS L T P C
Pre-requisite: Nil 3 0 0 3
PURPOSEThis course gives in depth knowledge on operating systems which is essential for writing software for embedded
systems.
INSTRUCTIONAL OBJECTIVESTo make the student learn: Basic operating system concepts in detail, to make a few case studies.
SYLLABUS CONTENT
OPERATING SYSTEMS AND SERVICESProcesses CPU Scheduling approaches.
PROCESS SYNCHRONIZATIONSemaphores Deadlocks Handling deadlocks Multithreading.
MEMORY MANAGEMENT
Paging Segmentation Virtual memory Demand paging Replacement algorithms.
DISK SCHEDULING APPROACHESFile systems Design issues User interfaces to file systems I / O device management.
CASE STUDIESDesign and implementation of the UNIX OS, process model and Structure Memory management File system
UNIX I / O management and Device drivers Windows System components Process management Memory
management File systems Networking.
REFERENCE BOOKS
1. Abraham Silberschatz Peter B. Galvin, G.Gagne, Operating System Concepts, 6th
Edition, Wesley
Publishing company, 2003.
2. M.J.Bach, Design of the UNIX Operating System, Prentice Hall, 1986.
-
8/10/2019 M Tech EST Syllabus 2008-09 Non-unitized(1)
24/33
Page 23
EM0563 COMPUTER ARCHITECTURE L T P C
Pre-requisite: Nil 3 0 0 3
PURPOSETo introduce computer architecture to the student
INSTRUCTIONAL OBJECTIVESTo make the student learn, computer architectures.
SYLLABUS CONTENT
FUNDAMENTALS OF COMPUTER DESIGNReview of fundamentals of CPU, Memory and I/O Performance evaluation Instruction set principles Design
issues Example Architectures.
INSTRUCTION LEVEL PARALLELISMPipelining and handling hazards Dynamic Scheduling Dynamic hardware prediction Multiple issues Hardware
based speculation Limitations of ILP Case studies.
INSTRUCTION LEVEL PARALLELISM WITH SOFTWARE APPROACHESCompiler techniques for exposing ILP Static branch prediction VLIW & EPIC Advanced compiler support
Hardware support for exposing parallelism - Hardware versus software speculation mechanisms IA 64 and ltanium
processor.
MEMORY AND I/OCache performance Reducing cache miss penalty and miss rate Reducing hit time Main memory and
performance Memory technology. Types of storage devices Buses RAID Reliability, availability and
dependability I/O performance measures Designing an I/O system.
MULTIPROCESSORS AND THREAD LEVEL PARALLELISMSymmetric and distributed shared memory architectures Performance issues Synchronization Models ofmemory consistency Multithreading.
REFERENCE BOOKS
1. A.Kai Hwang, Advanced Computer architecture, Mcgraw Hill, Inc 1987.
2. Kai Hwang and Faye A.Briggs, Computer Architecture and Parallel Processing, McGraw-Hill 1989.
3. John L.Hennessey and David A.Patterson, Computer Architecture: A Quantitative Approach, Third
Edition, Morgan Kaufmann, 2003.
4. D.Sia, T.Fountain and P.Kacsuk, Advanced computer Architectures: A Design Space Approach, Addion
Wesley, 2000.
-
8/10/2019 M Tech EST Syllabus 2008-09 Non-unitized(1)
25/33
Page 24
EM0564 DIGITAL IMAGE PROCESSING L T P C
Pre-requisite: EM0503 3 0 0 3
PURPOSESince image processing is an upcoming embedded field wherein many small systems and robots are built with image
processing functions we give in this subject an idea of image processing concepts.
INSTRUCTIONAL OBJECTIVESTo make the student learn: Basic image processing operations and concepts, multi resolution analysis and to make a
few case studies.
SYLLABUS CONTENT
FUNDAMENTALS OF IMAGE PROCESSINGIntroduction Steps in image processing systems Image acquisition Sampling and Quantization Pixel
relationships Color fundamentals and models, File formats, Image operations Arithmetic, Geometric and
Morphological.
IMAGE ENHANCEMENT
Spatial Domain: Gray level Transformations Histogram processing Spatial filtering smoothing and sharpening.Frequency Domain: Filtering in frequency domain DFT, FFT, DCT Smoothing and sharpening filters
Homomorphic Filtering.
IMAGE SEGMENTATION AND FEATURE ANALYSISDetection of Discontinuities Edge operators Edge linking and Boundary Detection Thresholding Region based
segmentation Morphological Watersheds Motion Segmentation, Feature Analysis and Extraction.
MULTI RESOLUTION ANALYSIS AND COMPRESSIONSMulti Resolution Analysis: Image Pyramids Multi resolution expansion Wavelet Transforms. Image compression:
Fundamentals Models Elements of Information Theory Error free compression Lossy Compression
Compression Standards.
APPLICATIONS OF IMAGE PROCESSING
Image classification Image recognition Image understanding Video motion analysis Image fusion Steganography Digital compositing Mosaics Color Image Processing.
REFERENCE BOOKS
1. Rafael C. Gonzalez and Richard E. Woods, Digital Image Processing, 2nd
Edition, Pearson Eduction, 2003.
2. Anil K. Jain, Fundamentals of Digital Image Processing, Pearson Education, 2003.
3. Milan Sonka, Vaclav Hlavac and Roger Boyle, Image Processing, Analysis and Machine Vision, 2nd
Edition,
Thomson Learning, 2001.
-
8/10/2019 M Tech EST Syllabus 2008-09 Non-unitized(1)
26/33
Page 25
EM0565 MULTIMEDIA SYSTEMS L T P C
Pre-requisite: Nil 3 0 0 3
PURPOSEMultimedia applications are coming in to the arena of embedded systems. With future applications in mind this
course on multi media systems is offered.
INSTRUCTIONAL OBJECTIVESTo make the student learn: Multimedia principles, Knowledge and user understanding, and text, sound and image
applications.
SYLLABUS CONTENT
MULTIMEDIAIntroduction Multimedia modalities, Channels and Medium Interaction Communicative Interaction Objects
and Agents Channels of Communication Artificial Languages Natural Communication Meta-languages
Components of Interactive Multimedia Systems.
KNOWLEDGE AND USER UNDERSTANDING
Knowledge Basic idea of knowledge A working definition Knowledge representation Knowledge Elicitation Know about user applying user knowledge acquiring user knowledge User profiling User modelling.
INTERACTION, INTERFACE & SEMIOTICSTraditional HCI Modalities and the interface Interface channels Functionality and usability Visual appearance
and Graphic design Multimedia content Semiotics Idea of a Sign Complex Signs Semiotics and Media.
TEXT AND SOUNDVisual Perception of Text Images on Page Meaning and Text Readability Text and the Screen Modality of
Sound Channels of Communication Combining Sound Channels Technology of Sound MIDI.
IMAGESPsychology of vision Representational Images Juxtaposition of Images Perception of Motion Constructing aShot Shots into narrative Modern languages of film and television.
REFERENCE BOOKS
1. Mark Elsom-Cook, Principles of Interactive Multimedia, McGraw Hill, International Edition 2001.
-
8/10/2019 M Tech EST Syllabus 2008-09 Non-unitized(1)
27/33
Page 26
EM0566 FPGA BASED DESIGN L T P C
Pre-requisite: Nil 3 0 0 3
PURPOSEThe role of FPGAs and ASIC are perceived to be enormous in embedded systems and hence this subject is offered.
INSTRUCTIONAL OBJECTIVESTo make the student learn, FPGA fundamentals, design and implementation of circuits in them.
SYLLABUS CONTENT
INTRODUCTION TO ASICS, CMOS LOGIC AND ASIC LIBRARY DESIGNTypes of ASICs Design Flow CMOS transistors, CMOS design rules Combinational Logic Cell Sequential
logic cell Data path logic cell Transistors as Resistors Transistor Parasitic Capacitance Logical effort
Library cell design Library architecture.
PROGRAMMABLE LOGIC CELLS AND I/O CELLSAnti fuse static RAM EPROM and EEPROM technology PREP bench marks Actel ACT Xilinx LCA
Altera FLEX Altera MAX DC & AC inputs and outputs Clock and power inputs Xilinx I/O blocks.
INTERCONNECTS AND ASIC DESIGN SOFTWAREActel ACT Xilinx LCA Xilinx EPLD Altera MAX 5000 and 7000 Altera MAX 9000 Altera FLEX Design
systems Logic Synthesis Half Gate ASIC Schematic entry Low level design language PLA tools EDIF
CFI design representation.
LOGIC SYNTHESIS, SIMULATION AND TESTINGVerilog and logic synthesis VHDL and logic synthesis - Types of simulation Boundary scan test Fault
simulation Automatic test pattern generation Built-in self test.
FLOOR PLANNING, PLACEMENT AND ROUTINGSystem partition FPGA partitioning partitioning methods floor planning placement physical design flow
global routing detailed routing special routing circuit extraction DRC.
REFERENCE BOOKS
1. M.J.S. SMITH, Application Specific Integrated Circuits, Addison Wesley Longman Inc., 1997.
2. Wolf Wayne, FPGA Based System Design, Pearson Education India, 2004.
3. Mohammed Ismail and Terri Fiez, Analog VLSI Signal and Information Processing, McGraw Hill, 1994.
4. Design manuals of Altera, Xilinx and Actel. (From the web).
-
8/10/2019 M Tech EST Syllabus 2008-09 Non-unitized(1)
28/33
Page 27
EM0567 DSP INTEGRATED CIRCUITS L T P C
Pre-requisites: EM0503 and EM0507/EM0508 3 0 0 3
PURPOSETo make the implementation of DSP ICs in VLSI.
INSTRUCTIONAL OBJECTIVESTo make the student learn, implementation of DSP in VLSI.
SYLLABUS CONTENT
DSP ICs AND VLSI CIRCUIT TECHNOLOGIESStandard digital signal processors, Application specific ICs for DSP, DSP systems, DSP system design, Integrated
circuit design. MOS transistors, MOS logic, VLSI process technologies, Trends in CMOS technologies.
DIGITAL SIGNAL PROCESSINGDigital signal processing, Sampling of analog signals, Selection of sample frequency, Signal-processing systems,
Frequency response, Transfer functions, Signal flow graphs, Filter structures, Adaptive DSP algorithms, DFT-The
Discrete Fourier Transform, FFT-The Fast Fourier Transform Algorithm, Image coding, Discrete cosine transforms.
DIGITAL FILTERS AND FINITE WORD LENGTH EFFECTSFIR filters, FIR filter structures, FIR chips, IIR filters, Specifications of IIR filters, Mapping of analog transfer
functions, Mapping of analog filter structures, Multirate systems, Interpolation with an integer factor L, Sampling rate
change with a ratio L/M, Multirate filters. Finite word length effects -Parasitic oscillations, Scaling of signal levels,
Round-off noise, Measuring round-off noise, Coefficient sensitivity, Sensitivity and noise.
DSP ARCHITECTURES AND THEIR SYNTHESISDSP system architectures, Standard DSP architecture, Ideal DSP architectures, Multiprocessors and multicomputers,
Systolic and Wave front arrays, Shared memory architectures. Mapping of DSP algorithms onto hardware,
Implementation based on complex PEs, Shared memory architecture with Bit serial PEs.
ARITHMETIC UNITS AND INTEGRATED CIRCUIT DESIGNConventional number system, Redundant Number system, Residue Number System. Bit-parallel and Bit-Serial
arithmetic, Basic shift accumulator, Reducing the memory size, Complex multipliers, Improved shift-accumulator.Layout of VLSI circuits, FFT processor, DCT processor and Interpolator as case studies.
REFERENCE BOOKS
1. Lars Wanhammer, DSP Integrated Circuits, 1999 Academic press, New York
2. Keshab K.Parhi, VLSI digital Signal Processing Systems design and Implementation, John Wiley &
Sons, 1999.
3. A.V.Oppenheim et.al, Discrete-time Signal Processing, Pearson education, 2000.
4. Emmanuel C. Ifeachor, Barrie W. Jervis, Digital signal processing A practical approach, Second
edition, Pearson education, Asia.
-
8/10/2019 M Tech EST Syllabus 2008-09 Non-unitized(1)
29/33
Page 28
VL0558 SYSTEM ON CHIP DESIGN L T P C
Pre-requisite: Nil 3 0 0 3
PURPOSEIP cores and application specific design is becoming the order of the day. Because of usefulness of this for both VLSI
and embedded students this subject is provided.
INSTRUCTIONAL OBJECTIVESTo make the student learn System-on-chip fundamentals, their applications and On-chip networking methods.
SYLLABUS CONTENT
Part-A: SOC
SOC fundamentalsEssential issues of SoC design A SoC for Digital still camera multimedia IP development : Image and video
codecs.
SOC software and energy managementSoC embedded software energy management techniques for SoC design.
Part- B: On-chip networking
System design and methodologyDesign methodology for NOC based systems Mapping concurrent application onto architectural platforms.
Hardware and basic infrastructurePacket switched network for on-chip communication energy reliability tradeoff for NoCs clocking strategies
parallel computer as a NoCs region.
Software and application interfacesMP-SoC from software to hardware NoC APIs multilevel software validation for NoC Software for network on
chip
REFERENCE BOOKS
1. Axel Jantsch, Hannu Tenhunen, Network on chips, Kluwer Academic Publishers, 2003.
2. Youn-Long, Steve Lin, Essential Issues of SoC Design: Designing Complex Systems-On-Chip, Springer,2006.
-
8/10/2019 M Tech EST Syllabus 2008-09 Non-unitized(1)
30/33
Page 29
EM0569 ADVANCED COMPUTER ARCHITECTURE L T P C
Pre-requisites: Nil 3 0 0 3
PURPOSETo introduce the computer architecture concepts.
INSTRUCTIONAL OBJECTIVESTo make the student familiarize various processors, fundamentals of computer design, various parallel and pipeline
architectures and software required for parallel programming.
PROCESSORS AND MEMORY HIERARCHYMultiprocessors and Multicomputers Multivector and SIMD computers Architectural Development Tracks
Processors and Memory Hierarchy Advanced Processor Technology Superscalar and vector Processor Memory
Hierarchy technology-Virtual memory technology.
FUNDAMENTALS OF COMPUTER DESIGNElements of modern computers-System attributes to performance-Bus, Cache and Shared memory-Bus Systems
Cache Memory Organizations Shared memory Organization Sequential and weak consistency models.
PARALLEL AND SCALABLE ARCHITECTURESMultiprocessor System Interconnects Cache Coherence and Synchronization Mechanisms Message-Passing
Mechanisms Vector Processing Principles Multivector Multiprocessors Performance-Directed Design Rules
Fujitsu VP2000 and VPP500 SIMD Computer Organizations Implementation models The MasPar MP-1
Architecture-Latency - Hiding Techniques Principles of Multithreading Scalable and Multithreaded Architectures
- The Tera Multiprocessor System.
PIPELINING AND SUPERSCALAR TECHNIQUES:Introduction Basics of a RISC Instruction set Implementation of five stage Pipeline for a RISC processor
Performance issues hurdle of pipelining simple implementation of MIPS extending the MIPS pipeline to handle
multicycle operations cross cutting issues.
SOFTWARE FOR PARALLEL PROGRAMMING:
Parallel programming models parallel languages and compilers code optimization and scheduling scalaroptimization with basic blocks code generation and scheduling trace scheduling compilation parallelization and
wave fronting software pipelining parallel programming environments Y-MP, Paragon and CM-5 environments
synchronization and multiprocessing modes principles of synchronization - multiprocessor execution modes
shared-variable program structures locks for protected access semaphores and applications message-passing
program development.
REFERENCE BOOKS
1. Kai Hwang & Naresh Jotwani, Advanced Computer Architecture, McGraw Hill, Inc. 2011.
2. John L. Hennessey and David A. Patterson, Computer Architecture: A Quantitative Approach, Third Edition,
Morgan Kaufmann, 2003.
-
8/10/2019 M Tech EST Syllabus 2008-09 Non-unitized(1)
31/33
Page 30
EM0573 ADVANCED FPGA DESIGN L T P C
Pre-requisites: Nil 3 0 0 3
PURPOSETo introduce VLSI design concepts to the students
INSTRUCTIONAL OBJECTIVESTo make the student learn the fundamentals of various FPGA architectures, design flow using FPGA and
programming.
INTRODUCTION TO ASICs, CMOS LOGIC AND ASIC LIBRARY DESIGNTypes of ASICs - Design Flow - CMOS transistors, CMOS design rules - Combinational Logic Cell - Sequential
logic cell - Data path logic cell - transistors as resistors - transistor parasitic capacitance - Logical effort - Library cell
design - Library architecture.
PROGRAMMABLE LOGIC CELLS AND I/O CELLSDigital clock Managers-Clock management- Regional clocks- Block RAM Distributed RAM-Configurable Logic
Blocks-LUT based structures Phase locked loops- Select I/O resources Anti fuse - static RAM - EPROM and
EEPROM technology
DEVICE ARCHITECTURESDevice Architecture-Spartan 6 -Vertex 4 architecture- Altera Cyclone and Quartus architectures.
DESIGN ENTRY AND TESTINGVerilog and VHDL -logic synthesis - Types of simulation Faults- Fault simulation - Boundary scan test -
Automatic test pattern generation. Built-in self test. scan test.
FLOOR PLANNING, PLACEMENT AND ROUTINGSystem partition - FPGA partitioning - partitioning methods - floor planning - placement - physical design flow -
global routing - detailed routing - special routing - circuit extraction - DRC.
REFERENCE BOOKS
1. M.J.S. SMITH, "Application Specific Integrated Circuits", Addison Wesley Longman Inc., 1997
2. Wolf Wayne, "FPGA Based System Design", Pearson Education.
3. Design manuals of Altera, Xilinx and Actel.
-
8/10/2019 M Tech EST Syllabus 2008-09 Non-unitized(1)
32/33
-
8/10/2019 M Tech EST Syllabus 2008-09 Non-unitized(1)
33/33