memory management 1 tanenbaum ch. 3 silberschatz ch. 8,9

Memory Management 1

Tanenbaum Ch. 3

Silberschatz Ch. 8,9

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Background

System

User 1

User 2

User 3

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Creating an Executable File

prog.c

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prog.c

prog.o

sqrt.c

Compiler Compiler

sqrt.o

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prog.c

Linker

prog.o

prog.exe

sqrt.c

Compiler Compiler

sqrt.o

Library

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Address Binding

• Compile Time– Specify the physical memory locations during the

compile.

• Load Time– Determine physical addresses when all modules are

combined into a load module and loaded into memory

• Execution Time– Bind addresses when module is executed (to allow

flexibility in moving process during execution).

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Figure 3-1. Three simple ways of organizing memory with an operating system and one user process.

No Memory Abstraction

Tanenbaum, Modern Operating Systems 3 e, (c) 2008 Prentice-Hall, Inc. All rights reserved. 0-13-6006639

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Figure 3-2. Illustration of the relocation problem.

Multiple Programs Without Memory Abstraction


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Hardware support for relocation

CPU <

LimitRegister

RelocationRegister

+Memory

addressingerror:

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Hardware support for relocation

CPU <

LimitRegister

RelocationRegister

+Memory

addressingerror:

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Figure 3-3. Base and limit registers can be used to give each process a separate address space.

Base and Limit Registers

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Swapping

• Move a currently executing process temporarily out of memory and into a backing store to make room for a new (higher priority?) process.

• Typically uses load time binding, but can use execution time binding.

• Context switching time can be high– 100k / 1000k = 100 milliseconds

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Figure 3-4. Memory allocation changes as processes come into memory and leave it. The shaded regions are unused memory.

Swapping (1)


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Figure 3-5. (a) Allocating space for growing data segment. (b) Allocating space for growing stack, growing data segment.

Swapping (2)


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Manage Free Memory

• With Bit Maps

• With Linked Lists

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Figure 3-6. (a) A part of memory with five processes and three holes. The tick marks show the memory allocation units. The

shaded regions (0 in the bitmap) are free. (b) The corresponding bitmap. (c) The same information as a list.

Memory Management with Bitmaps


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Figure 3-7. Four neighbor combinations for the terminating process, X.

Memory Management with Linked Lists


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Early Memory Management Techniques

• Fixed Partitioning– Simple to Implement but inefficient use of

memory

• Dynamic Partitioning– No internal fragmentation, but inefficient use of

processor

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Fixed Partitioning

OS

8 meg

8 meg

8 meg

8 meg

8 meg

8 meg

8 meg

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Fixed Partitioning

OS

8 meg

8 meg

8 meg

8 meg

8 meg

8 meg

8 meg

OS

8 meg

8 meg

12 meg

16 meg

6 meg4 meg2 meg

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Dynamic Partitioning

• Was used by IBM (OS/MVT)

• Create partitions when neededOS

P1

P2

P3

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• Create partitions when neededOS OS

P1 P1

P2

P3 P3

!P2

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• Create partitions when neededOS OS OS

P1 P1 P1

P2

P3

P4

P3 P3

!P2 P4

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• Create partitions when neededOS OS OS OS

P1 P1 P1

P2

P3

P4

P3 P3 P3

P4!P2 P4 !P1

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• Create partitions when neededOS OS OS OS OS

P1 P1 P1P5

P2

P3 P3 P3 P3 P3

P4 P4!P2 P4 !P1 P5

P4

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Placement Algorithms• First-fit

– Use the first available hole that will work

• Next-fit– Search continues from where last allocation was made

• Best-fit– Consider all available holes and use the one that most closely fits.

• Worst-fit– Consider all available holes and use the one that leaves the largest

remaining free hole.

• Quick Fit– Maintain separate lists of more common sizes

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Logical vs. Physical Address Space

• Logical Address– Referred to in executing programs– Generated by CPU (also known as virtual address)

• Physical address– Refers to an actual storage location in memory.

• Memory Management is the process of mapping logical addresses to the appropriate physical address.

• Relocation register used to map between domains

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Paging

• Difficult to find memory holes large enough to satisfy new process needs.

• Simplify the problem: Break the process memory requirements into many smaller sized lots.

• Divide physical memory into fixed size blocks called frames (typically 512 to 16 meg)

• Divide logical memory (process memory needs) into same sized blocks called pages

• Allocate as many frames as needed

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Address Translation Architecture

CPU PhysicalMemory

PageTable

f

logical address physical address

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CPU PhysicalMemory

PageTable

p dd

f

p{


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CPU PhysicalMemory

PageTable

p dfd

f

p{


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Paging Example

Page 0

Page 1

Page 2

Page 3

Page 0

Page 1

Page 2

Page 3

1437

0123

logicalmemory

pagetable

physicalmemory

0

1

2

3

4

5

6

7

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Paging Example

Page 0

Page 1

Page 2

Page 3

Page 0

Page 1

Page 2

Page 3

1437

0123

logicalmemory

pagetable

physicalmemory

0

1

2

3

4

5

6

7

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Paging Example

Page 0

Page 1

Page 2

Page 3

Page 0

Page 1

Page 2

Page 3

1437

0123

logicalmemory

pagetable

physicalmemory

0

1

2

3

4

5

6

7

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Figure 3-8. The position and function of the MMU – shown as being a part of the CPU chip (it commonly is nowadays).

Logically it could be a separate chip, was in years gone by.

Virtual Memory – Paging


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Figure 3-10. The internal operation of the MMU with 16 4-KB pages.

Paging


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Figure 3-11. A typical page table entry.

Structure of Page Table Entry


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Paging implementation issues:

• The mapping from virtual address to physical address must be fast.

• If the virtual address space is large, the page table will be large.

Speeding Up Paging


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Summary

• Memory Management Background

• Memory Partitioning

• Paging

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Questions• Explain the difference between logical address space

and physical address space. Which parts of a computer system use logical addresses and which parts use physical addresses?

• When considering dynamic memory partitioning, what is the major disadvantage of the “best fit” algorithm? What is the advantage of the “worst fit” algorithm?

• How (where) is virtual memory managed in contemporary computer systems?

• In an MMU why would we ever want to disable caching?• The book suggests that page sizes range from 512 bytes

to perhaps 64kbytes. What are the advantages of a small page size? When is a large page size preferred?

memory management 1 tanenbaum ch. 3 silberschatz ch. 8,9

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