metal-semiconductor contactsnanotr16/notes/slodha.pdf · metal-semiconductor contacts • fermi...

Metal-Semiconductor Contacts

Saurabh Lodha !

Dept. of Electrical Engineering, IIT Bombay !

Feb 25, 2016 School on Nanoscale Electronic Transport and

Magnetism: Fundamentals to Applications HRI, Allahabad

Outline

• Metal-semiconductor contacts – Energy band alignment – Fermi-level pinning – Current transport and barrier height extraction – Measurement of Rc and ρc !

• Contact resistance in emerging materials – Germanium – MoS2

25/02/2016 2

Outline



25/02/2016 3

Metal-semiconductor Band Alignment

• In equilibrium Fermi-levels align • Depletion-mode contact

25/02/2016 4

Try this yourself

• What kind of a contact is this?

25/02/2016 5

?

Schottky-Mott Rule

• φB reflects the mismatch in energy position of majority carrier band edge of the semiconductor and the metal Fermi level at the interface25/02/2016

6

d=0, metal and s.c. in contact

Deviation from Ideal (Schottky-Mott)

!• Experimental vs measured SBH on Si • A.M. Cowley et al., "Surface States and Barrier Height of

Metal-Semiconductor Systems," J. Appl. Phys 36, 3212 (1965)

25/02/2016 7

Interface States: Fermi-level Pinning

• Interface states!dipole!interfacial layer of atomic dimensions

• φCNL energy level below which all states must be filled to ensure charge neutrality, measured from VBM

• S depends on Ds and δi25/02/2016 8

Charge at the interface due to electronic states in the bandgap

Pinning factor

Density of surface states, Cowley and Sze

0=++ SSSCM QQQ

Origin of Interface States: Model 1- Unified Defect Model by Spicer

• Surface states created by dangling bonds of covalent semiconductor • Fermi level pins at defect levels for sub/few monolayer metal coverage • W.E. Spicer et al., "Unified Defect Model and Beyond," J. Vac. Sci.

Tech. 17, 1019 (1980).25/02/2016 9

Origin of Interface States: Model 2- Metal Induced Gap States by Heine

Heine (V. Heine, "Theory of Surface States," Phys. Rev. 138, A1689 (1965))

• Interface states ! tails of the metal wave functions • Length of the tail ~ a few lattice constants, depends on

complex energy band structure of semiconductor • Deviation from local charge neutrality results in "metallic"

screening by MIGS ! Fermi-level pinning !J. Tersoff (J. Tersoff, "Schottky Barrier Heights and the

Continuum of Gap States," Phys. Rev. Lett. 52, 465, (1984)) • Gap states come from valence band and conduction band

states • Charge neutrality requires filling of valence band like states

and empty conduction band states • Cross-over point ! Branch point ! MIGS DOS is minimum

and EF is pinned here

25/02/2016 10

Current transport in Contacts

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Contact Resistance and Resistivity

• Specific contact resistivity is a key parameter to describe contact performance

25/02/2016 12

Bulk resistivity

Specific Contact Resistivity

Thermionic Emission: Schottky Contact

• Specific contact resistivity independent of doping

25/02/2016 13

Field Emission (Tunneling): Ohmic contact

25/02/2016 14

Contact resistivity on Si

25/02/2016 15

How do you measure φB?

• I-V measurement in a low doped Schottky diode25/02/2016 16

J0

How do you measure φB?

• Reverse bias C-V curves give φB and doping Nd

25/02/2016 17

How do we measure Rc and ρc?

• If current density was uniform then ρc is contact resistance/A

• In practice ! J is non uniform due to current crowding • Need a more accurate model 25/02/2016 18

Model for Contact Resistance

• vm(x,y,z) ! Metal potential • v(x,y,z) ! Semiconductor potential • Poisson and carrier continuity eqns • Effect of minority carriers is neglected

– Neglecting the semiconductor depletion width – Only need to solve the majority carrier continuity eqn in the

semiconductor region under the contact • Assume majority carrier density is the same as the

active doping density • Metal conductivity >> semiconductor conductivity ! vm

is constant along entire interface ! Only need to solve for v(x,y,z)

25/02/2016 19

3D Model- Equations

25/02/2016 20

Difference in Fermi potentials of majority carriers

Finite resistance seen by infinitesimal current crossing the interface for infinitesimal applied V

2D Model

25/02/2016 21

z

x

y

semiconductor

metal

Sheet Resistance of the semiconductor

x=0 x=lI

Conductivity weighted average potential

Assumptions

Transverse gradient and Laplacian operators

2D Model

25/02/2016 22

Helmholtz equation, Under the contact

Laplace equation, Not under the contact

Integrating along z

Close to 1 for shallow junctions

Assuming vm to be constant and 0

2D Simplified to a 1D Model

• Neglecting y-axis variation !

!

• V=Vi at x=0 and dV/dx=0 at x=l

25/02/2016 23

z

x

y

semiconductormetal

x=0 x=lI

⎟⎟⎠

⎞⎜⎜⎝

⎛=

t

ts

itot

lllR

WVI

coth

1

0D Model

• Rc approaches ρcA as l becomes less than lt • Potential across the semiconductor is uniform • Current entering the contact is uniform • Macroscopic definition

25/02/2016 24

x

y

semiconductor

metal

x=0 x=l < ltI

1D Transmission line model

• Rc is dependent on contact size, structure layout besides semiconductor doping and ρc

• ρc is a fundamental quantity governed by the interface

25/02/2016 25

1D Transmission Line Model (Distributed ρc and Rs)


• Current density drops exponentially from leading edge to trailing edge of the contact

• lt is the characteristic length over which current drops by 63%

25/02/2016 26


25/02/2016 27

For d<<lt, or large ltAs if you have uniform current density through the entire contact

For l2=0

Similarly for d>>lt

⎟⎟⎠

⎞⎜⎜⎝

⎛=

t

ts

i

lllR

WVIcoth

11

Recall,

Rc=

t

cf wlR ρ

≈ As if you have uniform current density through an effective area of wlt

1D Transmission Line Model

• Rc plateau determined by Lt value for given ρc

25/02/2016 28

t

cf ZlR ρ

≈ZL

R cf

ρ≈

Measurement of Rc and ρc

• Transmission line tap resistor25/02/2016 29


• Value of Rf (Rc) is small compared to Rs • Measurement of Rt needs to be accurate25/02/2016 30

TLM Method

• For L>>LT x-intercept gives LT value

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Cross-bridge Kelvin Resistor

• Assumes uniform current density through the entire contact area

25/02/2016 32

Limitations of 1D Model

• 2D current flow is not accounted for • Overestimation of ρc -> does not scale with area • Need accurate 2D/3D current flow simulations

25/02/2016 33

Outline



25/02/2016 34

CMOS Evolution

• Engineering innovation has sustained Moore’s law – Strain – Hi-K/Metal Gate – FinFET/Trigate

35

Classical Dennard Scaling

Strain Engineering

Hi-K / MG Gate stack

Trigate / FinFET

1974-2000 2000-2007 2007-2012 2016-?

90 nm 45 nm 22/14 nm

25/02/2016

What’s next for Moore’s law?

!• Mobility enhancement

using alternate channel materials, strain, wafer orientation

Id=µCox/Leff (Vg-Vt)α

36

High Mobility/Injection Velocity

Lubow et al., APL 96 122105 (2010)

Intel Developer Forum, Sept. 2011

❑ Ge is a single material CMOS solution ❑ Integral part of Si foundries25/02/2016

What’s next for Moore’s law?

– Scaled FinFETs !

– GAA FETs !– Tunnel FETs !– Ultra thin (2D) materials:

MoS2, WSe2

Id=µCox/Leff (Vg-Vt)α

37

LG

Hsi

Gate

Source

Drain

Wsi

Improved Electrostatics/Sub-Vt Slope

Lower Leff at same Vt, or lower Vt at same Leff

SiO2

Back Gate

MoS2

Source Drain

0.7 nm

25/02/2016

P-I-N TFET

Series Resistance in Future Transistors

• Contribution of contact resistance to overall parasitic series resistance is increasing with scaling

25/02/2016 38

Rcontact Scaling

39

• Lcontact scales faster than Lgate !• Aggressive reduction of

Contact-to-S/D specific contact resistance (ρc) needed

39

Lgate

Spacer

Lcontact

2011 2012 2013 2014 20150.0

1.0x10-8

2.0x10-8

3.0x10-8

4.0x10-8

5.0x10-8

6.0x10-8

7.0x10-8

8.0x10-8

9.0x10-8 2011 2012 2013 2014 2015

ρ c O

hm.cm

2

year

ITRS 2011

2011 2012 2013 2014 20155

10

15

20

25

30

5

10

15

20

25

30

Lga

te (n

m)

L co

ntac

t (nm

)

year

Contact length Physical gate length (nm)

ITRS 2011

25/02/2016

Metal-semiconductor contacts

• Fermi level pinning is the “lack of barrier height modulation with metal work function” due to – Either large density of “intrinsic” states: e.g. point

defects on semiconductor surface – Or “extrinsic” Metal-Induced-Gap-States (MIGS)

ECNL

φB

Ec

Ev

Metal Semiconductor

)()1()( CNLCsMB EESS −−+−=Φ χφ

)4

exp(*

surf

Bc N

mqh

επρ

Φ∝

4025/02/2016

Ge Transistor Contacts

• N+ Silicon S/D – N-type barrier height is high (NiSi,

NiPtSi)

!• N+ Si:C S/D (higher mobility)

– N-type barrier height is high (NiSi, NiPtSi)

– Effective doping is less vs Si !

!• N+ Ge S/D (higher mobility)

– N-type barrier height is high • Fermi level pinning near VB

– Low dopant activation (~5e19 cm-3)

41Toriumi et al., APL, 2007

Si Si:C Ge1E19

1E20

1E21

Max

imum

pos

sible

dopi

ng (c

m-3)

25/02/2016

Solution: MIS Contacts (Metal-Interfacial Layer-Semiconductor)

42

S: pinning factor • S=1 Ideal

surface, No pinning

• S=0 complete pinning

S ↑

εIL↑ EgIL ↑thickness t of IL ↑

ρc ↓

ΔEc↓thickness t of IL ↓

Jenny Hu et al. MRS Bulletin 2011

ρc: Specific contact resistivity • ρc

depends on φB,eff

• ρc depends on ΔEc

ΔEc

25/02/2016

MIS vs Silicide

dd

MIS S/D

Source Metal

Drain Metal

Gate

dh

Drain Metal

Gate

Source Metald

Fully Silicided S/D

hHorizontal Cut

Contact Area AMIS = wd+2hd Asilicide = wh

w

w

w

w

MIS gives area advantage over fully silicided S/D

• MIS contacts scale better than Silicide • Contact area and current crowding penalty for

silicide

5 6 8 10 12 150

100

200

300

400

Tota

l Con

tact

Resis

tanc

e (o

hms)

Fin Width (nm)

Fin Extension Resistance Silicide Contact Resistance MIS Contact Resistance

MIS Silicide

ρc=1e-9 Ω.cm2

4325/02/2016

• P. Parahamans et al., p. 83-84, VLSI Symposium 2012

ZnO as an IL

4425/02/2016

FERMI LEVEL PINNING ELECTROSTATICS

Interlayer (IL) Comparison

• ZnO gives lowest ρc for thick films

45

• S. Gupta et al., Journal of Applied Physics (2013)

25/02/2016

Effect of Doping ZnO

46

• ρc decreases with increasing doping

• At high doping, ρc independent of thickness

• S. Gupta et al., Journal of Applied Physics (2013)

25/02/2016

Device Fabrication

47

N-Ge Substrate Pre-Clean

PVD ZnO, Ti/Au Diode formation

PDA in N2 forming high doped ZnO

Back Al metallization

Ti

n-GeZnO

TEM of n-Ge/ZnO/Ti interface

0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.50123456

F(R

)hv

a.u

hv(ev)

Tauc Plot of the deposited ZnO film

Band Gap =3.1eV

Tauc plot of the deposited ZnO film. Measured Eg ~3.1eVDiodes C-TLM

Lithography on n+ epi-Ge

PVD ZnO

Ti/Au

Liftoff PDA in N2 Forming high doped ZnO

25/02/2016

J-V Characteristics

48

• As expected significant increase in on and off currents for n-Ge !

• NiGe/n-Ge and Ti/n-Ge control devices are pinned near VB !• ALD ZnO also shows a similar response as PVD ZnO !

25/02/2016

Contact Resistance (C-TLM)

• ZnO shows reduction in ρc for Ge (2.5x) and Si:C (1.3x) • Benefit reduces with increasing substrate doping

– ∆ρSi < ∆ρSi:C < ∆ρGe, NSi >NSi:C > NGe 49

Top Metal Contacts

Epi, insitu doped Si/Ge/Si:C

P-Si

t

Epi Layer Doping (cm

t (nm)

N+ Silicon

~3e20 40

N+ Si:C ~1e20 40

N+ Ge ~2E19 120

~2.5X

~1.3X

Ge Si Si:C

Control With ZnO

Control With ZnO

Control With ZnO

3.3E-7 1.4E-7 3.7E-8 3.7E-8 5.4E-8 4.3E-8

25/02/2016

Summary: Contact resistance vs Ge doping

• ZnO helps lower doping requirement for contacts to n-Ge – 1e20 cm-3 S/D doping with ZnO IL should reach ITRS spec (2014)

50

• P. Paramahans et al., Appl. Phys. Lett. 101, 182105 (2012) • P. Parahamans et al., p. 83-84, VLSI Symposium 2012

25/02/2016

MoS2: Key Features

➢ Unique properties of Graphene have led to interest in 2D materials ➢ Linear dispersion relationship ! µ= 106 cm2/V.s at 2K

❑ Graphene

[1] K. Novoselov et al., Review of mod. Phy. (2009). [2] A. Kis et al., Nat. Nanotech. (2011)

➢ Semi-metallic (zero bandgap) nature makes it unsuitable for logic applications

➢ Layered with strong in-plane bonding and weak out-of-plane interactions ➢ Enables exfoliation of monolayer ➢ Large intrinsic band gap e.g. 1.8 eV in monolayer and 1.29 eV in multilayer ➢ Monolayer! Direct band gapGood for optoelectronic application ➢ Thermal stability up to 1100 C

❑ MoS2

Van der waals Forces

➢ Monolayer ! 6.5 Å

25/02/2016 51

Transition Metal Dichalcogenides (TMDs)

➢ Group 4–7 TMDs are layered, whereas group 8–10 TMDs are non-layered structures.

➢ About 40 different layered TMD compounds exist

M. Chhowalla et al., Nature chemistry 10, 1038 (2013) 25/02/2016 52

How good can a monolayer MoS2 transistor be?

➢ ION/IOFF ! >1010

➢DIBL∼10 mV/V, SS ! 60 mV/decade➢ Lg = 15 nm ➢ HfO2 Tox 2.5 nm

Y. Yoon et al., Nanoletters, 11.3773, 2011.

25/02/2016 53

Back Gate

Device Fabrication

Source

280 nm SiO2

Reactive ion etching Surface treatment

MoS2 exfoliation

PMMA Resist coating

Source/Drain EBL Patterning

SiO2

➢ S E M i m a g e o f monolayer MoS2 device➢ Transistor

process flow

➢TLM structure process flow to estimate contact resistance (Rc)

P+ Si as Back gate

MoS2

Lift off

Back Gate

SiO2

MoS2

MoS2

MetallizationPMMA

PMMA

L~ 5 µmW

~ 3 µ

m

1L,

MoS

2SiO2

Au PdPdAu

3 µm

1 µm

Source DrainAu/Pd Au/Pd

Elec

trode

s

Elec

trod

es

Elec

trod

es

Elec

trod

es

Elec

trod

es

25/02/2016 54

Characterization of MoS2 layers

1.40 nm

Bi Layer MoS2

20 µm

SiO2

Multi

Lay

er M

oS2

360 380 400 420558

564

570 A1GE1

2G

ΔΚ=21.6 cm-1

Inte

nsity

(a.u

)

Raman shift (cm-1)

168 164 160

S2p

B.E (eV)

Intensity (C/s)1400

1600

1800

2000

235 230 2251500

2000

2500

3000

Mo

3d5

Mo

3d3

Inte

nsi

ty (

C/s

)

B.E (eV)

➢ O p t i c a l m i c r o g r a p h showing Bilayer MoS2➢ AFM data for Bi layer MoS2 flake

➢ R a m a n spectrum of Bi layer MoS2 flake

➢ XPS spectra of MoS2 flake25/02/2016 55

❑ Large contact resistance at metal-MoS2 interface

!!!!!

❑ Different approaches to reduce the contact resistance

High Contact Resistance

0 10 20 30 40

50

100

150

200

Pd Au

VBG (V)

Rc (

KΩ

.mm

)

30

35

40

45

Rc (Ω.m

m)

Ref. no. Charge transfer

Φ Δ µ (cm

Stability

[1] Potassium NA NA 25 No[2] PEI NA NA NA No

This work

TiOmetal)

40 meV, constant Φ

13X ↓ Up to 11X↑

Yes

N-type doping of MoS2

[1] H. Fang et al., Nano lett. 13, 1991 (2013), [2] N. Pour et al., DRC., 101 (2013)

➢ Contact resistance limited by sheet charge density

Ref. D. Jena et al., Nat. mat., (2014).

56

↓RC

Doping Interfacial layer

ФB lower Fermi-level unpinning

ФB thinner25/02/2016

-8

-6

-4

-2

0

CNL

MoS2

Energ

y (eV

)Vaccuum level

TiO2

TiO

2 as an interfacial layer

❑ Why is TiO2 a good interfacial layer candidate? ➢ Small or no conduction band offset ! low tunneling R ➢ Large bandgap ! Fermi-level unpinning ➢ Ultra-thin IL ! low tunneling R

❑ Energy band alignment of MoS2 and TiO2 suggests possibility of charge transfer from TiO2 to MoS2

A. Agrawal et al., Sym. on VLSI Tech., (2013).

5725/02/2016

Device fabrication: Process flow

❑ Transistor process flow

SiO2

Back Gate

MoS2Source DrainTiO2 TiO2

Metal Metal 280 nm SiO2

Reactive ion etching Surface treatment

MoS2 exfoliation

Source/Drain EBL Patterning

ALD TiO2

P+ Si as Back gate

Metallization and Lift Off

➢ Optical micrograph of back gated transistor

➢ Scanning electron microscope image showing devices with different channel length 5825/02/2016

❑ Resistor network model for metal-semiconductor contacts

Contact resistance using TLM❑ Reduction in contact (Rc) and transfer length (LT)

59

Reduction in LT for contact-TiO2

25/02/2016

Barrier height extraction❑ Reduction in effective SBH with TiO2 IL for Au, Pd, Ni and Ti

60

-40 -20 0 20 400.00

0.06

0.12

0.18

Au TiO2-Au

VGS (V)

ΦAu

(eV)

0.00

0.02

0.04 ΦB

Au

0.12 eV

ΦTi

O 2-Au (

eV)

ΦBTiO2-Au

0.028 eV

Thermionic Thermionic

TunnelingTunneling

WBWB

Undoped Doped

❑ Constant effective SBH with TiO2 IL indicates increase in doping instead of φB reduction

25/02/2016

Electrical characteristics

❑ SEM images of TLM devices with and without TiO2

61

➢ Metal-MoS2 ! High resistance, large SBH ➢ Metal-TiO2-MoS2 ! Low resistance, small

SBH ➢ Metal-TiO2-MoS2 -Metal ! Asymmetric I-V

confirms significant difference in barrier heights !

WB WB

S D

no-TiO2

Contact-TiO2

25/02/2016

Transistor Characteristics ❑ Improvement in on-current and field effect mobility with TiO

2 IL for different metals

❑ Larger change with Pd

6225/02/2016

Physical proof of charge transfer

➢ XPS spectra shows Mo-3d, and S-2p core level shifts to higher binding energy from MoS2 to TiO2–MoS2

10 5 0 -50

2M

4M

6M

8M

Cou

nts

(a.u

.)

Binding Energy(eV)

MoS2

TiO2-MoS2

12.0 11.6 11.2 10.8

11.9

MoS2 TiO2-MoS2

11.6

➢ UPS measurements of TiO2–MoS2 and MoS2 ➢ Reduction in work-function (0.3 eV) with TiO2

25/02/2016 63

Contact vs. Channel TiO2

25/02/2016 64

❑ Larger benefit from reduction in contact resistance vs mobility enhancement from dielectric screening !

Conclusion

❑ N-type doping by charge transfer mechanism !!!!

! ❑Improvement in ION/IOFF with TiO2 and constant ΦB irrespective of metal work-function !

10 5 0 -50

2M

4M

6M

8M

Cou

nts

(a.u

.)Binding Energy(eV)

MoS2

TiO2-MoS2

12.0 11.6 11.2 10.8

11.9

MoS2 TiO2-MoS2

11.6

-8

-6

-4

-2

0

CNL

MoS2

Ene

rgy

(eV

)

Vaccuum level

TiO2

4.2 4.5 4.8 5.1 5.4

0.1

0.2

0.3

0.4 MoS2

MoS2-TiO2

Linear fit of Φ Linear fit of Φ

ΦB (

eV)

Work function (eV)

Pd

Au

Ti

Ni

-40 -20 0 20 400

10µ

20µ

30µ

40µ

I DS

(A/µ

m)

I DS

(A/µ

m)

VGS (V)

TiO2-Pd Pd

10f1p100p10n1µ100µ

(a)

~7X

25/02/2016 65

N. Kaushik et al., Device Research Conference (2015), ACS Applied Materials and Interfaces (2015).

MoS2

TiO2

MetalMetal

Summary

• Metal-semiconductor contacts are a part of every semiconductor device – Low contact resistance is critical for high

performance !

• Diodes (φB) and TLM (ρc) structures are used for extracting contact parameters

!• Fermi-level pinning, low doping activation are

leading causes of high resistance • Emerging materials need novel solutions to

reduce contact resistance6625/02/2016

Thank you!

25/02/2016 67

Backup

25/02/2016 68


25/02/2016 69

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