modul praktikum teknik digital - 2020 · modul praktikum microcontroller laboratory 2020 5 lembar...

Modul Praktikum

Microcontroller Laboratory 2020

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Modul Praktikum


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VISI DAN MISI FAKULTAS ILMU TERAPAN UNIVERSITAS TELKOM

Visi Menjadi Fakultas dunia dalam bidang ilmu terapan yang berbasis TIK . Misi 1. Melaksanakan pembelajaran dan penelitian berbasis ilmu terapan dalam menghasilkan lulusan vokasi yang professional

2. Meningkatkan kegiatan pengabdian kepada masyarakat berdasarkan kebutuhan masyarakat berbasis ICT Terapan

3. Menjalankan tata kelola fakultas yang baik (Good Faculty Governance), mengembangkan SDM yang unggul dan melakukan perbaikan berkesinambungan. Tujuan 1. Menjadi Fakultas dengan penelitian aplikatif dan berorientasi pada TIK, manajemen dan pariwisata

2. Menjadi Fakultas yang secara konsisten melakukan pengabdian kepada masyarakat dan berorientasi padaTIK, manajemen dan pariwisata

3. Menjadi Fakultas yang mandiri dan menghasilkan lulusan vokasi yang profesional dan berorientasi pada TIK yang tepat guna, manajemen dan pariwisata. Sasaran Untuk tujuan 1 dan 2 diatas memiliki sasaran : 1. Terwujudnya pembelajaran dan pengabdian berbasis penelitian

2. Terwujudnya jejaring kerjasama dengan PTN/PTS, Lembaga Penelitian, Pemerintah, LSM dan industri

3. Terwujudnya kegiatan-kegiatan usaha sesuai dengan kebutuhan masyarakat. Untuk tujuan 3 memiliki sasaran :

1. Tercapainya sitem pengelolaan fakultas dan program studi sesuai sertifikasi sistem mutu.

2. Terwujudnya kegiatan-kegiaan untuk meningkatkan tata kelola yang baik unutk menghasilkan lulusan yang profesional.

Modul Praktikum


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DAFTAR PENYUSUN

NAMA NIM JURUSAN

I Gusti Ngurah Bagus Dimas Wiradyaksa

6705180062 D3 Teknologi Telekomunikasi

Candra Eka Dwi Warsa 6705184027 D3 Teknologi Telekomunikasi

Andi Alfian Adriawan 6705184065 D3 Teknologi Telekomunikasi

Danica Sidi Gotama 6705184099 D3 Teknologi Telekomunikasi

Nanda Riskyapriliani 6705184008 D3 Teknologi Telekomunikasi

Tia Rahmawati 6705184031 D3 Teknologi Telekomunikasi

Rosmitha Ballynda Putri 6706184053 D3 Teknologi Telekomunikasi

Aulia Rizqi Putra 6705180006 D3 Teknologi Telekomunikasi

Wahyu Primadia Kusumaningrum

6705184045 D3 Teknologi Telekomunikasi

Shendy Setiawan 6705184023 D3 Teknologi Telekomunikasi

Rizky Septiansyah 6705184108 D3 Teknologi Telekomunikasi

Mohammad Rafiqi Putra 6705184066 D3 Teknologi Telekomunikasi

Diperiksa dan disetujui oleh Dosen Koordinator Mata Kuliah DTH1J2 – Bengkel Elektronika Denny Darlis, S.Si., M.T. NIP : 13770026

Modul Praktikum


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LEMBAR REVISI

No. Keterangan Revisi Tanggal Revisi

1.

2.

3.

4.

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LEMBAR PERNYATAAN

Saya yang bertanggung jawab di bawah ini :

Nama : Denny Darlis, S.Si., M.T.

NIK : 13770026

Dosen Koordinator : Bengkel Elektronika

Kelompok Keahlian : Installation Operation Maintenance Telecommunication

Menerangkan dengan sesungguhnya bahwa modul ini telah diperiksa dan akan digunakan

untuk pelaksanaan praktikum di Semester Genap Tahun Ajaran 2019/2020 pada Mata

Kuliah DTH1J2 – Bengkel Elektronika di Bengkel Mekatronika Fakultas Ilmu Terapan

Universitas Telkom.

Bandung,13 Januari 2020

Mengetahui,

Ketua Kelompok Keahlian IOMT Dosen Pembina Laboratorium

Mikrokontroler

Radial Anwar Ph.D Denny Darlis, S.Si., M.T.

NIK 17810068 NIK 13770026

Modul Praktikum


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STRUKTUR ORGANISASI LABORATORIUM MIKROKONTROLER

TAHUN AJARAN 2019/2020

KETUA KELOMPOK KEAHLIAN

Radial Anwar Ph.D

KEPALA PEMBINA LABORATORIUM BENGKEL MEKATRONIKA

Denny Darlis, S.Si., M.T.

KOORDINATOR ASISTEN LABORATORIUM

I Gusti Ngurah Bagus Dimas Wiradyaksa (6705184162)

DIVISI ADMINISTRASI

Wahyu Primadia Kusumaningrum (6705184045)

Nanda Riskyapriliani (6705184008)

Rizky Septiansyah (6705184108)

DIVISI PRAKTIKUM

Andi Alfian Adriawan (6705184065)

Candra Eka Dwi Warsa (6705184027)

Tia Rahmawati (6705184031)

Danica Sidi Gotama (6705184099)

DIVISI PERALATAN

Aulia Rizqi Putra (6705180006)

Mohammad Rafiqi Putra (6705184066)

Rosmitha Ballynda Putri (6705184053)

DIVISI RISET

Shendy Setiawan (6705184023)

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DAFTAR ISI

MODUL 0 ..................................................................................................................................... 14

Running Modul ............................................................................................................................ 14

0.1 Tujuan ................................................................................................................................ 14

0.2 Peraturan Praktikum ........................................................................................................ 14

0.3 Kesehatan dan Keselamatan Kerja saat Praktikum ...................................................... 15

0.4 Penilaian Praktikum .......................................................................................................... 16

0.5 Sanksi Running Modul ...................................................................................................... 16

MODUL 1 ..................................................................................................................................... 17

Instalasi Altera Quartus II dan ModelSim for Altera, Vivado, Xilinx SDK, Digilent Board Files ............................................................................................................................................... 17

1.1 Tujuan Praktikum Modul 1 .............................................................................................. 17

1.2 Dasar Teori Praktikum Modul 1 ...................................................................................... 17

1.2.1 Software Quartus II .................................................................................................... 17

1.2.2 ModelSim ..................................................................................................................... 17

1.3 Lembar Kegiatan Praktikum Modul 1 ............................................................................ 17

1.3.1 Alat dan Bahan ........................................................................................................... 17

1.3.2 Langkah Praktikum Modul 1 .................................................................................... 18

1.4 Soal Jurnal .......................................................................................................................... 22

MODUL 2 ..................................................................................................................................... 23

Pengenalan IC Digital Keluarga TTL dan CMOS ................................................................... 23

2.1 Tujuan Praktikum Modul 2 : ........................................................................................... 23


2.2.1 Gerbang Logika .......................................................................................................... 23

2.2.2 Tabel Kebenaran ........................................................................................................ 23

2.3 Lembar Kegiatan Praktikum Modul 2 : .......................................................................... 32

2.3.1 Alat dan Bahan ........................................................................................................... 32


2.4 Soal Jurnal.......................................................................................................................... 42

MODUL 3 ..................................................................................................................................... 43

Simulasi Digital Menggunakan Modelsim ................................................................................. 43



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3.2.1 ModelSim ..................................................................................................................... 43


3.3.1 Alat dan Bahan ........................................................................................................... 43


3.4 Soal Jurnal.......................................................................................................................... 51

MODUL 4 ..................................................................................................................................... 52

Simulasi Digital Menggunakan Quartus II ............................................................................... 52


4.2 Dasar Teori Praktikum Modul 4 ..................................................................................... 52

4.2.1 Quartus Altera II ........................................................................................................ 52

Lembar Kegiatan Praktikum 4 .............................................................................................. 53


4.3.1 Alat dan Bahan ........................................................................................................... 54

4.4 Soal Jurnal.......................................................................................................................... 64

MODUL 5 ..................................................................................................................................... 65

Implementasi Rangkaian Digital Sederhana Menggunakan FPGA Board ............................ 65

5.1 Tujuan Kegiatan Praktikum 5 ......................................................................................... 65

5.2 Dasar Teori Kegiatan Praktikum 5 .................................................................................. 65

5.2.1 FPGA (Field Programmable Gate Array) ................................................................ 65

5.2.2 Board FPGA DE10-Lite ............................................................................................. 65


5.3.1 Alat dan Bahan ........................................................................................................... 70


5.4 Soal Jurnal .......................................................................................................................... 78

MODUL 6 ..................................................................................................................................... 79

Implementasi Rangkaian Penjumlah dan Pengurangan 4-Bit Menggunakan FPGA Board 79


6.2 Dasar Teori Modul 6 ......................................................................................................... 79

6.2.1 DE10-Lite .................................................................................................................... 79

6.2.2 Quartus 18 Prime Lite ................................................................................................ 81

6.2.3 Pin Plener .................................................................................................................... 81

6.2.4 Adder ........................................................................................................................... 82

6.2.5 Binary Adder-Subtractor ........................................................................................... 83


6.4 Soal Jurnal.......................................................................................................................... 93

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MODUL 7 ..................................................................................................................................... 94

Implementasi Rangkaian Mux Dan Demux Menggunakan FPGA Board ............................. 94



7.2.1 Multiplexer .................................................................................................................. 94

7.2.2 Tipe Multiplexer ......................................................................................................... 95

7.2.3 Implementasi Multiplexer .......................................................................................... 98

7.2.4 Demultiplexer .............................................................................................................. 98

7.2.5 Tipe Demultiplexer ..................................................................................................... 99

7.2.6 Implementasi Demultiplexer ................................................................................... 100

7.3 Lembar Kegiatan Praktikum Modul 7 : ........................................................................ 101

7.3.1 Alat dan Bahan ......................................................................................................... 101

7.3.2 Langkah percobaan modul 7 (4-channel multiplexer) .......................................... 101

7.3.3 Langkah percobaan modul 7 (1 to 4 demultiplexer) ............................................. 107

7.4 Soal Jurnal........................................................................................................................ 112

MODUL 8 ................................................................................................................................... 113

Implementasi Rangkaian Decoder Dan Encoder Menggunakan Terasic DE10-LITE FPGA Board ........................................................................................................................................... 113

8.1 Tujuan Praktikum Modul 8 ............................................................................................ 113

8.2 Dasar Teori Praktikum Modul 8 .................................................................................... 113

8.2.1 Decoder. .................................................................................................................... 113

8.2.2 Encoder ...................................................................................................................... 115

8.3 Lembar Kegiatan Praktikum Modul 8 .......................................................................... 116

8.3.1 Alat dan Bahan ......................................................................................................... 116

8.3.2 Langkah Praktikum Modul 8 (Rangkaian Decoder) ............................................. 116

8.3.3 Langkah Praktikum Modul 8 (Rangkaian Encoder) ............................................. 126

8.4 Soal Jurnal........................................................................................................................ 134

MODUL 9 ................................................................................................................................... 136

Implementasi Rangkaian BCD-To-7 Segment Menggunakan FPGA................................... 136

9.1 Tujuan Praktikum Modul 9 ............................................................................................ 136

9.2 Dasar Teori Praktikum Modul 9 ................................................................................... 136

9.3 Lembar Kegiatan Praktikum Modul 9 : ........................................................................ 138

9.3.1 Alat dan Bahan ......................................................................................................... 138

9.3.2 Langkah Praktikum Modul 9 ................................................................................. 139

9.4 Soal Jurnal ........................................................................................................................ 148

Modul Praktikum


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MODUL 10 ................................................................................................................................. 149

Implementasi Rangkaian Flip-Flop dan Memori Menggunakan Terasic DE10-Lite FPGA Board ........................................................................................................................................... 149

10.1 Tujuan Praktikum Modul 10 ........................................................................................ 149

10.2 Dasar Teori Praktikum Modul 10 ................................................................................ 149

10.3 Lembar Kegiatan Praktikum Modul 10 ...................................................................... 152

10.3.1 Alat dan Bahan ....................................................................................................... 152

10.3.2 Langkah Praktikum Modul 10 .............................................................................. 152

10.4 Soal jurnal ...................................................................................................................... 161

MODUL 11 ................................................................................................................................. 162

Implementasi Counter dan Register Menggunakan Terasic DE10-Lite FPGA Board .......... 162

11.1 Tujuan Praktikum Modul 11 : ..................................................................................... 162

11.2 Dasar Teori Praktikum Modul 11 ................................................................................ 162

11.2.1 Register .................................................................................................................... 162

11.2.2 Counter .................................................................................................................... 164

11.3 Lembar Kegiatan Praktikum Modul 11 : .................................................................... 166

11.3.1 Alat dan Bahan ....................................................................................................... 166


11.4 Soal Jurnal ...................................................................................................................... 179

MODUL 12 ................................................................................................................................. 180

Implementasi Prosesor NIOS II & Microblaze Menggunakan DE10-Lite FPGA Board .... 180

12.1 Tujuan Pratikum Modul 12 : ....................................................................................... 180

12.2 Dasar Teori Pratikum Modul 12 .............................................................................. 180

12.2.1 NIOS II .................................................................................................................... 180

12.2.2 Arsitektur Nios II .................................................................................................... 180

12.2.3 Eclipse ...................................................................................................................... 180

12.2.4 Arsitektur Eclipse ................................................................................................... 181

12.3 Lembar Kegiatan Pratikum Modul 12 : .................................................................. 182

12.3.1 Alat dan Bahan ....................................................................................................... 182


12.4 Soal Jurnal ...................................................................................................................... 192

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DAFTAR GAMBAR

Gambar 2. 1 Bagan Sistem; (a) 2 masukan/input, (a) 4 masukan/input ........................................ 23

Gambar 2. 2 Simbol dan Tabel Kebenaran Gerbang NOT ............................................................ 26

Gambar 2. 3 Simbol dan Tabel Kebenaran Gerbang AND ........................................................... 26

Gambar 2. 4 Simbol dan Tabel Kebenaran Gerbang OR .............................................................. 27

Gambar 2. 5 Simbol dan Tabel Kebenaran Gerbang Nand ........................................................... 27

Gambar 2. 6 Simbol dan Tabel Kebenaran Gerbang NOR ............................................................ 28

Gambar 2. 7 Simbol dan Tabel Kebenaran Gerbang X-OR .......................................................... 28

Gambar 2. 8 Simbol dan Tabel Kebenaran Gerbang X-NOR ....................................................... 29

Gambar 2. 9 (a) IC TTL 7404, (b) IC TTL 7408, (c) IC TTL 7432. ............................................. 30

Gambar 2. 10 (a) IC CMOS 4081, (b) IC CMOS 4071, (c) IC CMOS 4011 ................................ 32

Gambar 2. 1 Contoh Gerbang Logika ............................................................................................ 53

Gambar 5. 1 FPGA XILINK Spartan ............................................................................................ 65

Gambar 5. 2 FPGA Board DE10-Lite ........................................................................................... 66

Gambar 5. 3 Clock Circuit untuk board FPGA ............................................................................. 67

Gambar 5. 4 Hubungan antara push-button dengan FPGA MAX 10 ............................................ 67

Gambar 5. 5 Koneksi antara slide switches dan FPGA MAX 10 .................................................. 68

Gambar 5. 6 Koneksi antara LED dan FPGA MAX 10 ................................................................ 69

Gambar 5. 7 Koneksi antara 7-segment dengan FPGA ................................................................. 69

Gambar 6. 1 IC 74283 (4bit adder) ................................................................................................ 82

Gambar 6. 2 Gerbang logika rangkaian half adder ........................................................................ 82

Gambar 6. 3 Gerbang logika rangkain full adder .......................................................................... 83

Gambar 6. 4 Rangkain 4 bit adder/subtractor ................................................................................ 83

Gambar 7. 1 Input dan output multiplexer ..................................................................................... 94

Gambar 7. 2 Status pin .................................................................................................................. 95

Gambar 7. 3 Rangkaian 2-channel multiplexer ............................................................................. 96



Gambar 7. 6 Rangkaian demultiplexer .......................................................................................... 98

Gambar 7. 7 Rangkaian 1 to 4 demultiplexer ................................................................................ 99

Gambar 7. 8 Rangkaian 1 to 8 demultiplexer .............................................................................. 100

Gambar 8. 1 Decoder .................................................................................................................. 114

Gambar 8. 2 Encoder ................................................................................................................... 115

Gambar 9. 1 Seven segment display ............................................................................................ 136

Gambar 9. 2 Decoder BCD to 7 Segment .................................................................................... 137

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Gambar 10. 1 Rangkaian R-S flip-flop ........................................................................................ 150

Gambar 10. 2 Rangkaian D flip-flop ........................................................................................... 151

Gambar 10. 3 Rangkaian J-K flip-flop ........................................................................................ 151

Gambar 10. 4 Rangkaian T flip-flop........................................................................................... 151

Gambar 11. 1 Register Parallel In Parallel Out (PIPO) .............................................................. 163

Gambar 11. 2 Register Serial In Serial Out (SISO) ..................................................................... 163

Gambar 11. 3 Register Serial In Parallel Out (SIPO) .................................................................. 164

Gambar 11. 4 Register Parallel In Serial Out (PISO) .................................................................. 164

Gambar 11. 5 Synchronous Up Counter ...................................................................................... 165

Gambar 11. 6 Asynchronous Up Counter .................................................................................... 165

Gambar 11. 7 Synchronous Down Counter ................................................................................. 166

Gambar 11. 8 Asynchronous Down Counter ............................................................................... 166

Modul Praktikum


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DAFTAR TABEL

Tabel 2. 1 Contoh table kebenaran (a) 2 masukan (A dan B) dan 1 keluaran ............................... 24

Tabel 2. 2 Contoh tabel kebenaran gambar (b) 4 masukan (A,B,C) dan 1 keluaran (Y) ............... 24

Tabel 2. 3 Daftar IC TTL gerbang logika ...................................................................................... 31

Tabel 4. 1 Bagian Tools Blok Diagram Quartus Altera II : ........................................................... 53

Tabel 5. 1 Pin assignment untuk clock Inputs ............................................................................... 67

Tabel 5 2 Pin assignment untuk push-buttons ............................................................................... 68

Tabel 5. 3 Pin assignment untuk slide switches ............................................................................ 68

Tabel 5. 4 Pin assignment untuk LED ........................................................................................... 69

Tabel 2. 5 Pin assignment 7-segment ............................................................................................ 70

Tabel 6. 1 Features Altera Max 10FPGA ...................................................................................... 79

Tabel 6. 2 Pin plener switch .......................................................................................................... 81

Tabel 6. 3 Pin plener LED ............................................................................................................. 81

Tabel 7. 1 Tabel kebenaran 2-channel multiplexer........................................................................ 96



Tabel 7. 4 Tabel kebenaran1 to 4 demultiplexer ........................................................................... 99

Tabel 7. 5 Tabel kebenaran 1 to 8 demultiplexer ........................................................................ 100

Tabel 8. 1 Tabel kebenaran decoder ............................................................................................ 114

Tabel 8. 2 Tabel kebenaran encoder ............................................................................................ 115

Tabel 9. 1 BCD to 7 Segment Display Decoder .......................................................................... 138

modul praktikum teknik digital - 2020 · modul praktikum microcontroller laboratory 2020 5 lembar...

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