n-channel 100 v, 0.0062 typ., 19 a, stripfet vii ......july 2013 docid023656 rev 4 1/16 16...
TRANSCRIPT
This is information on a product in full production.
July 2013 DocID023656 Rev 4 1/16
16
STL100N10F7
N-channel 100 V, 0.0062 Ω typ., 19 A, STripFET™ VII DeepGATE™ Power MOSFET in a PowerFLAT™ 5x6 package
Datasheet - production data
Figure 1. Internal schematic diagram
Features
• Ultra low on-resistance
• 100% avalanche tested
Applications• Switching applications
DescriptionThis device is an N-channel Power MOSFET developed using the 7th generation of STripFET™ DeepGATE™ technology, with a new gate structure. The resulting Power MOSFET exhibits the lowest RDS(on) in all packages.
AM15540v2
5678
1 2 3 4
Top View
D(5, 6, 7, 8)
G(4)
S(1, 2, 3)
PowerFLAT™ 5x6
1
2
3
4
Order code VDSSRDS(on)
maxID PTOT
STL100N10F7 100 V 0.0073 Ω 19 A 5 W
Table 1. Device summary
Order code Marking Package Packaging
STL100N10F7 100N10F7 PowerFLAT™ 5x6 Tape and reel
www.st.com
Contents STL100N10F7
2/16 DocID023656 Rev 4
Contents
1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1 Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3 Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
4 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
5 Packaging mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
DocID023656 Rev 4 3/16
STL100N10F7 Electrical ratings
1 Electrical ratings
Table 2. Absolute maximum ratings
Symbol Parameter Value Unit
VDS Drain-source voltage 100 V
VGS Gate-source voltage ± 20 V
ID(1)
1. This value is rated according to Rthj-c.
Drain current (continuous) at TC = 25 °C 80 A
ID (1) Drain current (continuous) at TC = 100 °C 70 A
ID(2)
2. This value is rated according to Rthj-pcb.
Drain current (continuous) at Tpcb = 25 °C 19 A
ID (2) Drain current (continuous) at Tpcb=100 °C 13 A
IDM(2)(3)
3. Pulse width limited by safe operating area.
Drain current (pulsed) 76 A
PTOT(1) Total dissipation at TC = 25 °C 100 W
PTOT (2) Total dissipation at Tpcb = 25 °C 5 W
TJ
Tstg
Operating junction temperatureStorage temperature
-55 to 175 °C
Table 3. Thermal resistance
Symbol Parameter Value Unit
Rthj-case Thermal resistance junction-case 1.56 °C/W
Rthj-pcb (1)
1. When mounted on FR-4 board of 1inch², 2oz Cu, t < 10 sec
Thermal resistance junction-pcb 31 °C/W
Table 4. Avalanche data
Symbol Parameter Value Unit
EAS
Single pulse avalanche energy (TJ = 25 °C, L = 3.5 mH, IAS = 15 A, VDD = 50 V, VGS = 10 V)
400 mJ
Electrical characteristics STL100N10F7
4/16 DocID023656 Rev 4
2 Electrical characteristics
(TCASE=25 °C unless otherwise specified)
Table 5. On/off states
Symbol Parameter Test conditions Min. Typ. Max. Unit
V(BR)DSSDrain-source breakdown voltage (VGS= 0)
ID = 250 µA 100 V
IDSSZero gate voltage drain current (VGS = 0)
VDS = 100 VVDS = 100 V; TC=125 °C
1100
µAµA
IGSSGate body leakage current(VDS = 0)
VGS = +20 V 100 nA
VGS(th) Gate threshold voltage VDS= VGS, ID = 250 µA 2 4 V
RDS(on)Static drain-source on- resistance
VGS= 10 V, ID= 19 A 0.0062 0.0073 Ω
Table 6. Dynamic
Symbol Parameter Test conditions Min. Typ. Max. Unit
Ciss Input capacitance
VDS =50 V, f=1 MHz, VGS=0
- 4369 5680 pF
Coss Output capacitance - 823 1070 pF
CrssReverse transfer capacitance
- 36 47 pF
Qg Total gate charge VDD=50 V, ID = 19 A
VGS =10 VFigure 14
- 61 80 nC
Qgs Gate-source charge - 26 nC
Qgd Gate-drain charge - 13 nC
Table 7. Switching times
Symbol Parameter Test conditions Min. Typ. Max. Unit
td(on) Turn-on delay timeVDD=50 V, ID= 19 A, RG=4.7 Ω, VGS= 10 VFigure 13
- 27 - ns
tr Rise time - 40 - ns
td(off) Turn-off delay time - 46 - ns
tf Fall time - 15 - ns
DocID023656 Rev 4 5/16
STL100N10F7 Electrical characteristics
Table 8. Source drain diode
Symbol Parameter Test conditions Min Typ. Max Unit
ISD Source-drain current - 19 A
ISDM(1)
1. Pulse width limited by safe operating area
Source-drain current (pulsed) - 76 A
VSD(2)
2. Pulsed: pulse duration=300µs, duty cycle 1.5%
Forward on voltage ISD = 38 A, VGS=0 - 1.2 V
trr Reverse recovery time ISD = 19 A, di/dt = 100 A/µs,VDD=80 V, Tj=150 °C
- 77 ns
Qrr Reverse recovery charge - 146 nC
IRRM Reverse recovery current - 4 A
Electrical characteristics STL100N10F7
6/16 DocID023656 Rev 4
2.1 Electrical characteristics (curves) Figure 2. Safe operating area Figure 3. Thermal impedance
Figure 4. Output characteristics Figure 5. Transfer characteristics
Figure 6. Gate charge vs gate-source voltage Figure 7. Static drain-source on-resistance
ID
10
1
0.1
0.010.1 1 VDS(V)10
(A)
Operation in
this a
rea is
Limite
d by max R
DS(on)
100ms1s
10msTj=175°CTc=25°C
Singlepulse
100
AM15617v1
-pcb
ID
150
100
50
00 2 VDS(V)4
(A)
1 3
200
250
VGS= 5 V
VGS= 6 V
VGS= 7 V
VGS=8 V
VGS=9 V
VGS=10 V
300
AM15623v1ID
150
100
50
02 VGS(V)
(A)
4 6 8
200
250
10
VDS= 5 V300
AM15618v1
VGS
6
4
2
00 20 Qg(nC)
(V)
8
40 60
10
VDD=50V
ID=100A12
AM15624v1RDS(on)
6
4
2
00 40 ID(A)
(mΩ)
20 60
8
10
VGS=10V
80 100
12
AM15621v1
DocID023656 Rev 4 7/16
STL100N10F7 Electrical characteristics
Figure 8. Capacitance variations Figure 9. Normalized BVDSS vs temperature
Figure 10. Normalized gate threshold voltage vs temperature
Figure 11. Normalized on-resistance vs temperature
Figure 12. Source-drain diode forward characteristics
C
3000
2000
1000
00 40 VDS(V)
(pF)
20
4000
60
Ciss
CossCrss
80
5000
AM15625v1 VDS
-55 -5 TJ(°C)
(norm)
-30 7020 45 950.94
0.96
0.98
1
1.02
1.04 ID = 1mA
120
AM15619v1
VGS(th)
0.75
0.7
0.65
0.6-55 -5 TJ(°C)
(norm)
-30 7020 45 95
ID = 250 µA
120
0.8
0.85
0.9
0.95
1
AM15622v1 RDS(on)
1.9
1.3
0.9
0.5-50 0 TJ(°C)
(norm)
-25 7525 50 100
0.7
1.1
1.5
1.7
2.1
AM06484v2
ID=50 A
VSD
0 40 ISD(A)
(V)
20 10060 800.5
0.6
0.7
0.8
0.9
1
1.1 TJ=-50°C
TJ=150°C
TJ=25°C
AM15620v1
Test circuits STL100N10F7
8/16 DocID023656 Rev 4
3 Test circuits
Figure 13. Switching times test circuit for resistive load
Figure 14. Gate charge test circuit
Figure 15. Test circuit for inductive load switching and diode recovery times
Figure 16. Unclamped inductive load test circuit
Figure 17. Unclamped inductive waveform Figure 18. Switching time waveform
AM01468v1
VGS
PW
VD
RG
RL
D.U.T.
2200
μF3.3μF
VDD
AM01469v1
VDD
47kΩ 1kΩ
47kΩ
2.7kΩ
1kΩ
12V
Vi=20V=VGMAX
2200μF
PW
IG=CONST100Ω
100nF
D.U.T.
VG
AM01470v1
AD
D.U.T.
SB
G
25 Ω
A A
BB
RG
G
FASTDIODE
D
S
L=100μH
μF3.3 1000
μF VDD
AM01471v1
Vi
Pw
VD
ID
D.U.T.
L
2200μF
3.3μF VDD
AM01472v1
V(BR)DSS
VDDVDD
VD
IDM
ID
AM01473v1
VDS
ton
tdon tdoff
toff
tftr
90%
10%
10%
0
0
90%
90%
10%
VGS
DocID023656 Rev 4 9/16
STL100N10F7 Package mechanical data
4 Package mechanical data
In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark.
Package mechanical data STL100N10F7
10/16 DocID023656 Rev 4
Table 9. PowerFLAT 5x6 type S-R mechanical data
Dim.mm
Min. Typ. Max.
A 0.80 1.00
A1 0.02 0.05
A2 0.25
b 0.30 0.50
D 5.00 5.20 5.40
E 5.95 6.15 6.35
D2 4.11 4.31
E2 3.50 3.70
e 1.27
L 0.60 0.80
K 1.275 1.575
DocID023656 Rev 4 11/16
STL100N10F7 Package mechanical data
Figure 19. PowerFLAT 5x6 type S-R drawing
8231817_Rev.F_Ribbon type S-R
5 8
4 1
Pin 1 identification
1 4
58
Pin 1 identification
.
Bottom View
Side View
Top View
Package mechanical data STL100N10F7
12/16 DocID023656 Rev 4
Figure 20. PowerFLAT™ 5x6 recommended footprint (dimensions in mm)
Footprint
DocID023656 Rev 4 13/16
STL100N10F7 Packaging mechanical data
5 Packaging mechanical data
Figure 21. PowerFLAT™ 5x6 tape(a)
Figure 22. PowerFLAT™ 5x6 package orientation in carrier tape.
a. All dimensions are in millimeters.
Measured from centerline of sprocket holeto centerline of pocket.
Cumulative tolerance of 10 sprocketholes is ± 0.20 .
Measured from centerline of sprockethole to centerline of pocket.
(I)
(II)
(III)
2
2.0±0.1 (I)
Bo
(5.3
0±0.
1)
Ko (1.20±0.1)
±0.05)
Ø1.5 MIN.
Ø1.55±0.05
P
Ao(6.30±0.1)
F(5
.50±
0.1)
(III)
W(1
2.00
±0.
3)
1.75±0.1
4.0±0.1 (II)P 0
Y
Y
SECTION Y-Y
CL
P1(8.00±0.1)
Do
D1
E1(0.30
T
REF.R0.50
REF 0.2
0
Base and bulk quantity 3000 pcs
8234350_Tape_rev_C
Pin 1 identification
Packaging mechanical data STL100N10F7
14/16 DocID023656 Rev 4
Figure 23. PowerFLAT™ 5x6 reel
2.20Ø21.2
13.00
CORE DETAIL
2.501.90
R0.60
77
128
ØA
R1.10
2.50
4.00
R25.00
PART NO.
W1
W2 18.4 (max)
W3
06 PS
ESD LOGO
ATTE
NTIO
N
OBS
ERVE
PRE
CAUT
IONS
FOR
HAND
LING
ELE
CTRO
STAT
ICSE
NSIT
IVE
DEVI
CES
11.9/15.4
12.4 (+2/-0)
A330 (+0/-4.0)
All dimensions are in millimeters
ØN178(±2.0)
8234350_Reel_rev_C
DocID023656 Rev 4 15/16
STL100N10F7 Revision history
6 Revision history
Table 10. Document revision history
Date Revision Changes
05-Oct-2012 1 First release.
19-Feb-2013 2
– Document status chaged from preliminary to production data– Inserted: Section 2.1: Electrical characteristics (curves)– Updated: Section 4: Package mechanical data
– Added: Section 5: Packaging mechanical data– Minor text changes
21-Feb-2013 3– Updated Table 8: Source drain diode and Figure 5: Transfer
characteristics.
31-Jul-2013 4
– Updated ID values in test conditions respectively in Table 6: Dynamic and Table 7: Switching times.
– Modified: Figure 13, 14, 15 and 16– Minor text changes
STL100N10F7
16/16 DocID023656 Rev 4
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