output stages - 國立中興大學cc.ee.nchu.edu.tw/~aiclab/teaching/electronics3/lect14.pdf ·...

Ching-Yuan Yang

National Chung-Hsing UniversityDepartment of Electrical Engineering

Output Stages

Microelectronic Circuits

14-1 Ching-Yuan Yang / EE, NCHUMicroelectrics (III)

Outline

Classification of Output Stages

Class A Output Stage

Class B Output Stage

Class AB Output Stage

Biasing the Class AB Circuit

Variations on the Class AB Configuration


Classification Of Output Stages


Class A Stage

The class A stage is biased at a current IC greater than the amplitude of the signal current, .

The transistor in a class A stage conducts for the entire cycle of the input signal; that is, the conduction angle is 360o.

cI


Class B Stage

The class B stage is biased at zero dc current.

The transistor in a class B stage conducts for only half of the cycle of the input sine wave, resulting in a conduction angle of 180o.


Class AB Stage

An intermediate class between A and B, named class AB, involves biasing the transistor at a nonzero dc current much smaller than the peak current of the sine-wave signal.

The transistor in a class AB stage conducts for a interval slightly greater than half a cycle. The resulting conduction angle is greater than 180o but much less than 360o.


Class C Stage

The transistor in a class C stage conducts for an interval shorter than that of a half cycle; that is, the conduction angle is less than 180o.

Class C amplifiers are usually employed for radio-frequency (RF) power amplification (required, for example, in mobile phones and TV transmitters).


Class A Output Stage


Transfer Characteristic

Because of its low output resistance, the emitter follower is the most popular class A output stage.

An emitter follower (Q1) biased with a constant current I supplied by transistor Q2:

Since iE1 = I + iL, the bias current I must be

greater than the largest negative load current;

otherwise, Q1 cuts off and class A operation will

no longer be maintained.

The transfer characteristic of the emitter follower:vO = vI − vBE1

where vBE1 depends on the emitter current iE1

and thus on the load current iL.


Transfer characteristic of the emitter follower:

The linear characteristic is obtain by neglecting the change in vBE1 with iL.

The maximum positive output is determined by the saturation of Q1:

In the negative direction, the limit of the linear region is determined either by Q1

turning off or by Q2 saturating, depending on the values of I and RL.

Q1 turning off :

Q2 saturating : (the absolutely lowest output voltage)

sat1max CECCO VVv −=

LO IRv −=min

sat2min CECCO VVv +−=

vO = vI − vBE1


Biasing current:

The bias current I is greater than the magnitude of the corresponding load current. ( I ≥ iL )

L

CECC

RVV

I sat2+−≥


Signal Waveforms

(Neglect vCEsat ) Consider that maximum signal waveforms are under the condition I = VCC /RL.

vCE1 = VCC − vO

The instantaneous power dissipation in Q1:PD1 = vCE1iC1


Power Dissipation

Maximum instantaneous power dissipation in Q1 = VCC I. (vO = 0).

The power dissipation in Q1 depends on the value of RL.

If RL = ∞, then

ic1 = I, constant.

The maximum power dissipation will occur when vO = −VCC.

PD1 = 2VCC I.

The average power dissipation in Q1 is VCC I.

If RL = 0, then

A very large current may flow through Q1. It raises the junction temperature beyond the specified maximum, causing Q1 to burn up.

Need short-circuit protection.

The maximum instantaneous power dissipation in Q2 is 2VCC I when vO

= VCC . A more significant quantity for design purpose is the average power dissipation in Q2, which is VCC .


Power Conversion Efficiency

Power-conversion efficiency

Average load power

Total average supply power:

Since the current in Q2 is constant (I ), the power drawn from the negative supply is VCC I .

The average current in Q1 is equal to I, and thus the average power drawn from the positive supply is VCC I .

Thus, the total average supply power is PS = 2VCC I .

%100)( circuit output to supplied power dc

)( load to delivered power Signal×≡

S

L

PPη

L

OL R

VP

∧

=2

21

IVP CCS 2=


Determine power-conversion efficiency of the class A output stage :

Small signal, i.e., is small,

static power consumption 2VCC I even no excitation.

Since and , maximum efficiency is obtained when

In practice the output voltage is limited to lower values in order to avoid transistor saturation and associated nonlinear distortion.

The efficiency achieved is usually in the 10% to 20% range.

Class A operation is a poor choice for power amplification.

⎟⎟⎠

⎞⎜⎜⎝

⎛⎟⎟⎠

⎞⎜⎜⎝

⎛==

CC

O

L

O

CCL

O

VV

IRV

VIRV ˆˆ

41ˆ

41 2

η

OV

.0 →η

CCO VV ≤ˆLO IRV ≤ˆ

. ˆLCCO IRVV == %25 max =∴ η


Class B Output Stage


Output Stages

Ideal output stages

Supply external load current

Low output impedance

Large output swing ≈ VCC − VEE (ideally)

Commonly used complementary emitter follower

Each transistor is on for only half the time.


Circuit Operation

Class B output stage consists of a complementary pair of transistors connected in such a way that both conduct simultaneously.

Operation in push-pull fashion:

The transistors in class B stage are biased at zero current and conduct only when the input signal is present.

QN pushes (sources) current into the load when vI is positive, and QP pulls (sinks) current from the load when vI is negative.

vI = 0 , QP and QN are cut off and vO = 0 .

vI > 0.5V , QP is cut off ; QN turns on and

acts as an emitter follower.vO = vI − vBEN

and QN supplies the load current.vI < −0.5V , QN is cut off ; QP conducts

and operates as an emitter follower.

vO = vI + vEBP

and QP supplies the load current.


Transfer Characteristic

There exists an range of vI centered around zero where both transistors are

cut off and vO is zero. This dead band results in the crossover distortion.


Illustrating how the dead band in the class B transfer characteristic results in crossover distortion.

The effect of crossover distortion will be pronounced when the amplitude of the input signal is small. Crossover distortion in audio power amplifiers gives rise to unpleasant sounds.


Power Conversion Efficiency

We neglect the crossover distortion and consider the case of an output sinusoid of peak amplitude .

Average load power

Total supply power

The peak amplitude of current draw from supply:

The average current draw from supply:

The average power drawn from each of the two power supplies:

The total supply power

Efficiency (14.15)

Maximum average power available

oV

L

oL R

VP

2ˆ

21

=

Lo RV

Lo RV πˆ

CCL

oSS V

RV

PPˆ1

π== −+

CCL

oS V

RV

Pˆ2

π=

CC

o

VV

4πη =

%5.784max ==πη when CCCECCo VVVV ≈−= sat

ˆ

L

CCL R

VP

2

max 21

=


Power Dissipation

Unlike the class A stage, which dissipates maximum power under quiescent conditions (vO = 0), the quiescent power dissipation of the class B stage is zero.

Average power dissipation

Maximum average power dissipation

By Eq. (14.15), at the point of max. power dissipation the efficient η = 50%.

Average load power

L

oCC

L

oLSD R

VV

RV

PPP2ˆ

21ˆ2

−=−=π

L

CCD

R

VP 2

2

max2

π= when CCPo VV

D π2ˆ

max=

L

CCDPDN R

VPP 2

2

maxmax π==∴

⎟⎟⎠

⎞⎜⎜⎝

⎛=

∂∂

0o

D

VP

L

oL R

VP

2ˆ

21

=


Power dissipation of the class B output stage versus amplitude of the output sinusoid.

Increasing beyond 2VCC /π decreases the power dissipated in the class B stage while increasing the load power.

The price paid is an increase in nonlinear distortion as a result of approaching the saturation region of operation of QP and QN. Transistor saturation flattens the peaks of the output sine waveform.

This type of distortion cannot be significantly reduced by the application of negative feedback.

The transistor saturation should be avoided in applications requiring low THD.

oV

L

oCC

L

oD R

VV

RV

P2ˆ

21ˆ2

−=π


Example 9.1 Class B output stage designThe class B output stage deliver an average power of 20W to an 8-Ω load. Select the power supply such that VCC is about 5V greater than the peak output voltage. This avoids transistor saturation and the associated nonlinear distortion, and allows for including short-circuit protection circuitry. Determine the supply voltage required, the peak current drawn from each supply, the total supply power, and the power-conversion efficiency. Also determine the maximum power that each transistor must be able to dissipate safely.

Solution

Determine VCC :

The peak current drawn from each supply

The average power drawn from each supply

Total supply power = PS+ + PS− = 32.8W

The power-conversion efficiency

The maximum power dissipated in each transistor

18V 82022 ˆ ˆ

21 2

=××=== RPVRV

P LLoL

oL

A24.28

9.17ˆˆ ===

L

oo R

VI

W4.162324.21ˆ1

=××=== −+ ππ CCL

oSS V

RV

PP

%618.32

20===

S

L

PPη

W7.68)23(

2

2

2

2

maxmax =×

===ππ L

CCDPDN R

VPP


Distortion in the Class B Push-Pull Stage

Harmonic distortion

For matched devices QN & QP

iN and iP are identical except shifted in phase by 180o

Even-order harmonic distortions have been eliminated.

If I -Vs of QN & QP are not identical, then even-order harmonic is expected.

Crossover distortion: has been discussed before.

)3coscos(2

3cos2coscos

)()(

3cos2coscos

31

3210

3210

++=−=

+−+−+=+=

+++++=

tBtBiii

tBtBtBBIi

titi

tBtBtBBIi

PNL

cP

NP

cN

ωωωωω

πωωωωω

iN

iP


Reducing Crossover Distortion

Class B circuit with an op amp connected in a negative-feedback loop to reduce crossover distortion

The ±0.7V dead band is reduced to ±0.7/A0 volts, where A0 is the dc gain of the op amp.Slew-rate limiting of the op amp.


Single-Supply Operation

Class B output stage operated with a single power supply





Crossover distortion can be virtually eliminated by biasing the complementary output transistors at a small, non-zero current.

A bias voltage VBB is applied between the bases of QN and QP , giving rise to a bias current

TBB VVSQPN eIIii 2/=== (Assuming matched devices)


Circuit Operation

As iN increases, iP decreases by the same ratio while the product remains constant.

2ln2lnln QPNS

QT

S

PT

S

NTBBEBPBEN iii

I

iV

Ii

VIi

VVvv =⇒⎟⎟⎠

⎞⎜⎜⎝

⎛=⎟⎟

⎠

⎞⎜⎜⎝

⎛+⎟⎟

⎠

⎞⎜⎜⎝

⎛⇒=+

022 =−−⇒+= QNLNLPN Iiiiiii


Output resistance

Determine the small-signal output resistance of the class AB circuit

ePeNout rrR =

where reN and reP are the small-signal emitter resistances of QN and QP , respectively.

N

TeN i

Vr = and

P

TeP i

Vr =

NP

T

P

T

N

Tout ii

ViV

iV

R+

==⇒


Biasing The Class AB Circuit


Biasing Using Diodes

Class AB output stage utilizing diodes for biasing. If the junction area of the output devices, QN and QP , is n times that of the biasing devices D1 and D2, a quiescent current IQ = nIbias flows in the output devices.


Example 14.2 Class AB output stage design

VCC = 15V, RL = 100Ω, and the output is sinusoidal with a maximum amplitude of 10V. Let QN and QP be matched with IS = 10−13A and β = 50. Assume the biasing diodes have one-third the junction area of the output devices. Find the value of Ibias that guarantees a minimum of 1mA through the diode at all times. Determine the quiescent current and the quiescent power dissipation in the output transistors (i.e., at vO = 0 ). Also find VBB for vO

= 0 , +10V, and −10V.The maximum current through QN :

iLmax = 10V/0.1k Ω =100mAThe maximum base current in QN is 2mA.To maintain a min. of 1mA through the diodes, we select Ibias = 3mA.A quiescent current of 9mA through QN and QP .Quiescent power dissipation

PDQ = 2×15×9 = 270mWFor vO = 0 , IB,Q1 = 9/51 = 0.18mA. ∴ ID = ID1,D2 = 3 − 0.18 = 2.82mASince the diodes have , then

vO = +10V ID ≈ 1mA VBB = 1.21VvO = −10V ID ≈ 3mA VBB ≈ 1.26V

1331 10−×=SI

V26.1mA82.2

ln025.02ln2 =××=×=SS

DTBB II

IVV


Biasing using the VBE multiplier

1

1

RV

I BER =

⎟⎟⎠

⎞⎜⎜⎝

⎛+=+=

1

2121 1)(

RR

VRRIV BERBB

Find VBB :

Determine VBE1 :

⎟⎟⎠

⎞⎜⎜⎝

⎛=

−=

1

11

1

lnS

CTBE

RbiasC

II

VV

III


A discrete-circuit class AB output stage with a potentiometer used in the VBEmultiplier. The potentiometer is adjusted to yield the desired value of quiescent current in QN and QP.


Variations On The Class AB Configuration


Use of Input Emitter Followers

High input resistance

Quiescent current in Q3 and Q4 is equal

to that in Q1 and Q2 if RL = ∞ and R3 = R4 ≈ 0.

R3 and R4 are small and are included to

guard against the possibility of thermal

runaway due to temperature differences

between the input and output – stage

transistor.


Use of Compound Devices

The Darlington configuration

The compound-pnp configuration

1. increase current gain

2. reduce base current drive

3. Equivalent VBE(eq.) = 2VBE

4. can be used for both NPN

transistors and PNP transistors

1. used to improve PNP

configuration

2 Q1 is usually a lateral PNP

having low β (≈ 5−10)


A class AB output stage utilizing a Darlington npn and a compound pnp. Biasing is obtained using a VBE multiplier.

• Bias is obtained using a VBE multiplier.

• VBE multiplier is required to provide 3VBE.


Short-Circuit Protection

A class AB output stage is equipped with protection against the effect of short-circuiting the output while the stage is sourcing current.

A large current that flows through Q1 in the

event of a short circuit will develop a

voltage drop across RE1 of sufficient value

to turn Q5 on.

The collector of Q5 will then conduct most

of the current Ibias , robbing Q1 of its base

drive.

The current through Q1 will thus be reduced

to a safe operating level.

iL VRE1 IC5 IB1 IC1


Thermal Shutdown

Thermal shutdown circuit

Transistor Q2 is normally off.

As the chip temperature rises, a combination of

positive temperature coefficient of zener diode Z1

and the negative temperature coefficient of VBE1

causes the voltage at the emitter of Q1 to rise.

This in turn raises the voltage at the base of Q2 to

the point at which Q2 turns on.

T VZ1 , VBE VR2 IC2

Q2 absorbs bias current of OPAMP


Homework

Problem 2, 11, 16, 19, 33

output stages - 國立中興大學cc.ee.nchu.edu.tw/~aiclab/teaching/electronics3/lect14.pdf ·...

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