Pulsar StatusFor Peter

L2 decisioncrate L1T RA C K

SVT

CLUST E RPHOT ONMUONMagic BusCPUTechnical requirement: need a FAST way to collect/process many inputsWith the technology available back then (1990s), had to design custom (alpha) processor & backplane (magicbus) had to deal with the fact that each data input was implemented in a different way 6 different types of custom interface boards + custom processor & backplane CDF L2 legacy decision Crate

L2 decision crateelectronInput: up to 50KHzOutput: 300Hz

Gigabit EthernetRF clockSRAMsPulsar is designed to be: Modular, universal & flexible, fully self-testable (board &system level) All interfaces are bi-directional (Tx & Rx) Lego-style, open design In God we trust, everything else we test Spare linesone for all andall for oneuser definedinterfaces

Personality cards

Standard linkanother Pulsar or S-LINK to PCIHas ALL interfaces L2 decision crate has

Mezzanine slotsAUX cardPulsar (Pulser And Recorder) Design modular/universal/self-testablePulsarCustommezzanine

Bottom viewPulsar design philosophy: able to interface with any user data with any link format (e.g. S-LINK or GbE) via mezzanineMany applications within & outside CDF (compatible with Atlas) S-LINKPCIGbEworksup to100MHzTop view

PC SLINKPulsar pre-processorsL1 muon

L1 XTRPL1 triggerTSL2 CAL(CLIST/Iso)

PreFredShowMax

(RECES)SVTMuonClusterElectronMergerMergerSVTL2toTS Pulsar based new L2 decisionCommissioning strategy:

Use Tx Rx in teststandSplit all input signals, run parasitically with real system

PC SLINKPulsar pre-processorsL1 muon

L1 XTRPL1 triggerTSShowMax

(RECES)SVTMuonClusterElectronMergerMergerSVTL2toTS System Integration: two main efforts one between the two: SLINK fibersL2 CAL(CLIST/Iso)

PreFredTrigger Room with beamTeststand Room Standalone

Main tasks for the projectHardware: custom: Pulsar, mezzanine cards, AUX, LVDS splitter commercial: fiber splitter, SLINK mezzanine, SLINK-PCI cards, Linux processorsFirmware: transmitters and receivers for all data paths SLINK merger and L2 to trigger supervisor interfaces about 14 different types of Pulsar firmwareSoftware: board testing, VME DAQ readout, online/offline monitoring, infrastructure software for decision PC and L2 algorithm Beam tests: beam tests monitoring firmware fine tuning

Main tasks: current statusHardware: all hardware production/testing finished all custom hardware: no revision/blue wire on all prototypes RunIIa L2 muon Pulsar running in system since Sept.03 12 Pulsar as SVT road warrior running in system since June 04

Firmware: all firmware in place and fine tuning starts key to success: design for uniformity/modularity, CVS control, dedicated firmware developers (eng. students)Software: core software in place and fine tuning starts

Beam tests: started last month beam tests monitoring firmware/software fine tuning

Pulsar to PC round trip timing measurement

Mini-DAQ with L2 trigger in test stand roomRXPTTXPTTSPulsar (L2TS)FRED (GL1)preFREDL2 Trigger Decision+ TL2D Bank (Phase I)L2 Trigger DataTSL1AL2TS PulsarPulsar MergerTx(SLINK fiber)PC(SLINK fiber)TS handshaking(sending L2A/R,ROL, Buffer #)

Summary: we are in good shapeAll custom hardware production&testing finishedAll commercial hardware in hand and tested, tested new Linux PC and performance is excellent All firmware for 14 types of Pulsar in place and fine tuning on goingAll software for board testing, VME DAQ readout working; core online/offline software in place All core software for decision/control PCs and algorithm in place, ready for system integrationBeam tests with real system in parasitic mode started

Our target is to test as much as possible of the new system in parasitic mode with beam before Aug. 2004 shutdown

Pulsar production delivery time vs upgrade needsTime 06/04 01/05 07/05 10/05

Build 45 40?

L2 Decision 9 (system) + 6 spare +15 (teststand Tx Rx)

SVT 12+3 +10 +14 + 6 spare

XFT 5 + 2 spare

081 L2 Pulsar Muon/XTRP Rx IIa 083 L2 Pulsar SVT Road Warrior 085 L2 Pulsar Muon/XTRP/L1 Tx or SVT XTRP-emu 086 L2 Pulsar Muon/XTRP/L1 Rx IIb 087 L2 Pulsar RECES Tx 088 L2 Pulsar RECES Rx 089 L2 Pulsar Cluster/PreFred Tx 090 L2 Pulsar Cluster/PreFred Rx 091 L2 Pulsar SVT Tx 092 L2 Pulsar SVT Rx 093 L2 Pulsar Merger Tx 094 L2 Pulsar Merger Rx 095 L2 Pulsar L2TS Tx 096 L2 Pulsar L2TS 097 L2 Pulsar L1 Scaler 098 L2 Pulsar SVT TF 099 L2 Pulsar test Tx 100 L2 Pulsar test Rx 101 L2 Pulsar Stereo Tx 102 L2 Pulsar Stereo RxOne Hardware -- many FirmwaresBoard type Description Firmware SakariFrancoTomiSakariTomiSakariTomiVadim + SakariTomiSakariTomiSakari

Sakari

SakariSakariWhats needed for phase I

SLINKPulsar pre-processorsL1 muon

L1 XTRPL1 triggerShowMax

(RECES)SVTMuonClusterElectronMergerMergerSVTL2toTS System Integration: Part I in trigger room L2 CAL(CLIST/Iso)

PreFredTrigger Room with beamRoom StandalonePulsar RxBeam TestsPulsarMonitoringFirmwareFine tune

Pulsar Crate in Trigger Room B0L2PU00MuonXTRPL2 MuonsRun IIa Level 2 Decision Cratea - Processor1/3 RECESRecesClusterSVTSVTConnections:Fibers LVDS Slink Pulsar Test patternCList MasterCListISOListMergerSlinkRxPulsarTxB0L2PU00Level2_Pulsar_00