Real-Time DSP Multiprocessor Implementation for Future Wireless Base-Station Receivers

Bryan Jones, Sridhar Rajagopal, and Dr. Joseph Cavallaro

Wireless Information Applicance – RENE

Home Area Wireless LAN

High Speed Office Wireless LAN

Outdoor CDMA Cellular Network

Home Area Wireless LAN

Wireless Information Applicance – RENE

High Speed Office Wireless LAN

Outdoor CDMA Cellular Network

Wireless Information Appliance

Challenges:Higher data ratesLonger battery life (lower power signals)

noiseMAI

reflections

base station

fading

attenuation multipath

Wireless Information Appliance

Solution:Advanced DS-CDMA joint multiuser channel estimation and detectionFixed-point friendlyFocus on baseband processing

Real-world:AsynchronousFading channelPerformance includes both estimation and detection

Outline

Algorithms for joint estimation Algorithms for joint estimation and detectionand detectionWireless testbed (Simulink + RealSync)Multiprocessor implementationResults and conclusions

As each bit arrives:Form cross- and auto-correlation matrices from windowed data

Algorithms – channel estimation

)1()( ibb

ibb RR )1()( i

bribr RR

Rbb, Rbr

downdate

Tbb 00 Trb 00

update

TLLbb T

LLrb

0 (newest) L (oldest)Window index:

…

…

Pilot bits orDetected bits

Chips fromantenna

b

r

As each bit arrives:

Update channel estimate iteratively:

becomes

controls convergence behavior.A contains both amplitude and delay information for each user.

Algorithms – channel estimation

TLL

Tibb

ibb bbbbRR

00)1()( T

LLTi

bribr bbbbRR

00)1()(

)( )()()1()1()( ibr

ibb

iii RRAAA brbbRRA 1

Algorithms – detection (CMF)

Separate odd and even columns of channel estimate

Form initial estimate of users’ bits via code-matched filtering Soft:

Hard:

AA 1,0

0011)0(

0 rArAy TT

)( )0(0

)0(0 ysignd

Form L, R, C matrices from channel estimate

Improve estimate of users’ bits via parallel interference cancellation

Algorithms – detection (PIC)

10 AAL T TLR 0)(,0011 CdiagletAAAAC TT

)1()1()1()0()( iprev

iprev

iprevcur

icur RdCdLdyy

)( )()( icur

icur ysignd

Outline

Algorithms for joint estimation and detection

Wireless testbed (Simulink + Wireless testbed (Simulink + RealSync)RealSync)Multiprocessor implementationResults and conclusions

Wireless testbed – Simulink

Provide a rapid development / debug environment Generate data for a varieties of SNRs, users, spreading codes, channelsDetermine bit error rate

Wireless testbed – Simulink

Joint estimation and detection runs on DSP, while data generation, analysis runs on host!

Wireless testbed – RealSync

Simulink in Simulink out

RealSyncS-function

PutMatrix(out)GetMatrix(in1, in2)

Estimate, detect

DSP

Outline

Algorithms for joint estimation and detectionWireless testbed (Simulink + RealSync)

Multiprocessor implementationMultiprocessor implementationResults and conclusions

Multiprocessor implementation

Sundance multi-processor board with 3L Diamond multi-P OS• Twin TI

TMS320C6701 processors

• Twin Xilinx Virtex 300K gate FPGAs

• 3L software allows easy reconfiguration of programs, tasks among processors

Multiprocessor implementation

Interprocessor communication via comm-ports (no shared memory) @ 5MB/sec. Blocks during data transfer.Task partitioning: estimator on one processor, detector on the other.Goal: keep both processors maximally busy

Outline

Algorithms for joint estimation and detectionWireless testbed (Simulink + RealSync)Multiprocessor implementation

Results and conclusionsResults and conclusions

Results – static single proc.

2 4 6 8 10 12 14 1610

-3

10-2

10-1

100

101

Number of users

Pe

rfo

rma

nce

(m

se

c/b

it)

Single-processor performance

Multi-user estimation PIC + CMF PIC only CMF Sliding correlator estimation

Results – static single vs. dual

2 4 6 8 10 12 14 160

0.02

0.04

0.06

0.08

0.1

0.12

0.14

Number of users

Syste

m p

erf

orm

an

ce

(m

se

c/b

it)

Single/dual-processor comparison

Dual processors, PIC Single processor, PIC Dual processors, CMF Interprocessor comm overheadSingle processor, CMF

Results – tracking single vs. dual

2 4 6 8 10 12 14 160

0.02

0.04

0.06

0.08

0.1

0.12

0.14

0.16

0.18

Number of users

Sys

tem

per

form

ance

(mse

c/bi

t)

Proposed single/dual-processor tracking comparison

Single-processor Dual-processor (comm overhead) Dual-processor (no comm overhead)Interprocessor comm overhead

Conclusions

Performance measures should include channel estimation and detection time.Estimation and detection map well to a dual-processor implementation.

“The right algorithms, the right tools… the real world”