Real-Time Embedded Real-Time Embedded Software SynthesisSoftware Synthesis即時嵌入式軟體合成即時嵌入式軟體合成

熊博安熊博安國立中正大學資訊工程學系國立中正大學資訊工程學系

民國九十年十一月廿九日民國九十年十一月廿九日

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What do I want to talk about ?What do I want to talk about ?

What is a real-time system?What is a real-time system? What is an embedded system?What is an embedded system? Why software?Why software? Why synthesis?Why synthesis? How to generate code automatically?How to generate code automatically? Real-world applications?Real-world applications? Future work?Future work?

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What is a REAL-TIME SYSTEM?What is a REAL-TIME SYSTEM?

Timely ResponseTimely Response Predictable ResponsePredictable Response System Correctness:System Correctness:

Timing (period, deadlines, etc.)Timing (period, deadlines, etc.) FunctionFunction

Constraints:Constraints: Hard (meet ALL deadlines)Hard (meet ALL deadlines) Soft (miss SOME deadlines)Soft (miss SOME deadlines)

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Examples of Real-Time SystemsExamples of Real-Time Systems

multimedia servers

automobiles

air craftstelecommunications

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What is an EMBEDDED SYSTEM?What is an EMBEDDED SYSTEM?

Installed in a larger systemInstalled in a larger system Dedicated taskDedicated task Small Memory Space (200~400 KB)Small Memory Space (200~400 KB) Low Processing Power (100~200 Low Processing Power (100~200

MHzMHz)) Unstable Environment (mobile, …)Unstable Environment (mobile, …) ReactiveReactive Real-TimeReal-Time

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Embedded Systems ExampleEmbedded Systems Example

medical instrumentshome appliances office equipments

space crafts research lab equipments

factory automation

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Embedded System ArchitectureEmbedded System Architecture

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Why SOFTWARE?Why SOFTWARE?

more than more than 70% software70% software in many in many real-time embedded systems!!!real-time embedded systems!!!

software is more flexible and easily software is more flexible and easily reconfigurable, hence reconfigurable, hence more errorsmore errors!!!!!!

real-time real-time need need correctcorrect software software

embedded embedded need need smallsmall, , efficientefficient software software

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Why SYNTHESIS?Why SYNTHESIS?

More software More software high complexity high complexity need for need for automatic designautomatic design (synthesis) (synthesis)

Eliminate human and logical errorsEliminate human and logical errors Relatively Relatively immatureimmature synthesis synthesis

techniques for softwaretechniques for software Code Code optimizationsoptimizations

sizesize efficiencyefficiency

Automatic Automatic code generationcode generation

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How to generate CODE How to generate CODE automatically?automatically? Real-Time Embedded System Model? Real-Time Embedded System Model?

Set of concurrent tasks with Set of concurrent tasks with memory and timing constraints!memory and timing constraints!

How to execute in an embedded systeHow to execute in an embedded system (e.g. 1 CPU, 100 KB Mem)? m (e.g. 1 CPU, 100 KB Mem)? Task Scheduling!Task Scheduling!

How to generate code?How to generate code?Map schedules to software code!Map schedules to software code!

Code optimizations?Code optimizations?Minimize size, maximize efficiency!Minimize size, maximize efficiency!

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Design Issues and SolutionsDesign Issues and Solutions

2. Real-Time Constraints

1. Bounded Memory Execution

Quasi-Static Scheduling

(QSS)Proposed Solutions

Real-Time Scheduling

(RTS)

Hard Real-Time

Firing Interval Bound Synthesis

(FIBS)

Soft Real-Time

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Real-Time Embedded System Real-Time Embedded System ModelModel

Time Free-Choice Petri Nets (TFCPN)

Each arc from a place is either a unique outgoing arc or a unique incoming arc to a transition.

t1

t3(5, 10)

t2(1, 4)

2

p1

p2

p3

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Synthesis Algorithm (Hard RTES)Synthesis Algorithm (Hard RTES)

Synthesize_Hard_RTES(Synthesize_Hard_RTES(SS, , , , QSSQSS = = Quasi_Static_ScheduleQuasi_Static_Schedule((SS, , If (If (QSSQSS = NULL) return MemOverFlow; = NULL) return MemOverFlow;

RTSRTS = = Real_Time_SchedReal_Time_Sched((SS, , QSSQSS, , If (If (RTSRTS = NULL) return RTS_Error; = NULL) return RTS_Error;

else else CodeCode = = Code_GenCode_Gen((SS,,QSSQSS,,RTSRTS););

return return CodeCode;;

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Synthesis Algorithm (Soft RTES)Synthesis Algorithm (Soft RTES)

Synthesize_Soft_RTES(Synthesize_Soft_RTES(SS, , , , QSSQSS = = Quasi_Static_ScheduleQuasi_Static_Schedule((SS, , If (If (QSSQSS = NULL) return MemOverFlow; = NULL) return MemOverFlow;

FIBFIB = = Firing_Interv_SynthFiring_Interv_Synth((SS, , QSSQSS, , ););

If (If (FIBFIB = NULL) return FIB_Error; = NULL) return FIB_Error; else else CodeCode = = Code_GenCode_Gen((SS, , QSSQSS, , FIBFIB););

return return CodeCode;;

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Quasi-Static SchedulingQuasi-Static Scheduling

TFCPNTFCPN

net

decomposition

Conflict-Free Components

Quasi-Static Schedules

t1

t3(5, 10)

t2(1, 4)

2

p1

p2

p3

t1

t2(1, 4)

2

p1

p2

t1

t3(5, 10)

p1

p3

• Finite Complete Cycle

• Deadlock Free

• Satisfy Memory ReqtsMemoryOK!!!

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Real-Time SchedulingReal-Time Scheduling

Single ProcessorSingle Processor Worst Case Timing Analysis:Worst Case Timing Analysis:

Rate Monotonic (RM)Rate Monotonic (RM) fixed priorityfixed priority small period small period high priority high priority

Earliest Deadline First (EDF)Earliest Deadline First (EDF) dynamic prioritydynamic priority early deadline early deadline high priority high priority

ijkiA

iQSSt

kCF

A tLFTWCT Max

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Firing Interval Bound SynthesisFiring Interval Bound Synthesis

2 issues in Soft Real-Time 2 issues in Soft Real-Time Embedded System Control:Embedded System Control: Synchronization WaitSynchronization Wait: :

(for completion of other tasks)(for completion of other tasks) Real-Time SpecificationReal-Time Specification: :

(complete before deadlines)(complete before deadlines)

Proposed Solutions:Proposed Solutions: Postpone Release TimePostpone Release Time: :

+ + ww, , ww> 0> 0 Advance Finish TimeAdvance Finish Time: :

nn, , nn>0>0

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Code GenerationCode Generation generate_code(generate_code(SS, , QSSQSS11, QSS, QSS22, …, , …, QSSQSSnn, RTS, RTS) {) { for for ii = 1, …, = 1, …, n n {{ DDii = = create_processcreate_process((QSSQSSii););

for for jj = 1, …, Indep_Tasks( = 1, …, Indep_Tasks(AAii) {) {

ddijij = = create_taskcreate_task((QSSQSSii););

generate_task_codegenerate_task_code((ddijij););

add_taskadd_task((ddijij, , DDii); ); }} }} create_maincreate_main()();; output output ““for(i=0, i<length(RTS); i++) {for(i=0, i<length(RTS); i++) {”;”; for for kk = 1, …, = 1, …, RTS RTS output_codeoutput_code((DDikik);); output output ““}}”; ”; }}

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Optimal Code HierarchyOptimal Code Hierarchy

Main Program

Processi

Task 1 Task 2 Task k…

TFCPN

# Tasks = # Independent Source Transitions

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ExampleExample

SS = { = {FF11, , FF22}}

t11(2, 3)

t12(1, 3)

t13(3, 5)

p1

p2

p3

2

t14(5, 10)

t15(4, 9)

2

F1:

t21(0, 1)

t22(1, 2)

t23(1, 2)

p7

p2

p3

2

t24(2, 4)

t25(2, 4)

2

2

p4

p5

p6

t27(4, 8)

t26(5, 10)

2

t28(0, 5) t29(1, 2) F2:

p1

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Conflict Free Components for Conflict Free Components for FF11

t11(2, 3)

t12(1, 3)

p1

p2 2

t14(5, 10)

t11(2, 3)

t13(3, 5)

p1

p3 t15(4, 9)

2 R12:

R11:

v12 = (t11, t13, t15, t15)

13 (v12) 26

Quasi-Static Scheduling

v11 = (t11, t12, t11, t12, t14)

11 (v11) 22

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Conflict Free Components for Conflict Free Components for FF22

t21(0, 1)

t22(1, 2)

p7

p2 2

t24(2, 4)

2 p4

t26(5, 10)

t28(0, 5) t29(1, 2)

t21(0, 1)

t23(1, 2)

p7

p3 t25(2, 4)

2

p4

p5

p6

t27(4, 8)

t26(5, 10)

2

t28(0, 5) t29(1, 2)

R21:

R22:

p1

p1

v21 = (t21, t22, 2t24, 4t26, t28, t29, t26)

31 (v21) 68v22 = (t21, t23, t25,

2t27, t28, t29, t26)

15 (v22) 36

Quasi-Static Scheduling

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Real-Time SchedulingReal-Time Scheduling

TaskTask PriorityPriority ii maxmax((11)) maxmax((22))

TT11 11 100100 2626 4848

TT22 22 110110 6868 6868

SchedulableSchedulable YesYes NoNo

AlgorithmsAlgorithms RM, RM, EDFEDF

1 = {v11, v12} 2 = {v12, t11 t12 k v12 t11 t12 t14, k 1}

CASE STUDY: AN ATM VIRTUAL CASE STUDY: AN ATM VIRTUAL PRIVATE NETWORK SERVERPRIVATE NETWORK SERVER

CLASSIFIERCLASSIFIERCONGESTION CONGESTION

CONTROL CONTROL (MSD)(MSD)

SUPERVISORSUPERVISOR

WFQ WFQ SCHEDULERSCHEDULER

ATM INATM IN

(155 Mbit/s)(155 Mbit/s)

ATM OUTATM OUT

(155 Mbit/s)(155 Mbit/s)

DISCARDED DISCARDED CELLSCELLS

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ATM Server ExampleATM Server Example CID READ_STATE_VCC UPDATE_STATE_INIT

p1

p2

p3

p4

p5

p6

p7

p8

p10

MSD

PTI

TI

t1

READ_OUT_QUID

t2

t6

t9

p9

p11

p12

p15

p16

p19

p13

p14

p17

p18

p20

p22

p23

t3

t4

t5

READ_MAX_QLENGTH

CHECK_QLENGTH

t8

READ_THRESHOLD

CHECK_QLENGTH

t7

t11

UPDATE_STATE_REJ

t10

t12

PUSH

Qlength < thres ?

UPDATE_STATE_ACC

N

Y

Qlength <max ?

Y

N

p21

Qlength = 0 ?

*SCHEDULE_WFQ

COMPUTE_OUT_TIME

Y

N

p24 st=2

st=0

st=1

PTI = 1/3 ?

Y

N

[1, 16]

[10, 25]

[9, 9]

[6, 15]

[12, 37]

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0

MSD

1

CID

2

PTI

3

t1

4

READ_STATE_VCC

7

READ_OUT_QUID

10

t2

11

t3 t4 t5

12

t6 UPDATE_STATE_INIT

13 18

12

READ_MAX_QLENGTH

15

CHECK_QLENGTH1

18

t7

19

t6 UPDATE_STATE_INIT

12

READ_THRESHOLD

15

CHECK_QLENGTH2

18

t8

19

t10 t9

PUSH

COMPUTE_OUT_TIME t12

*SCHEDULE_WFQ

t10 t9

PUSH

COMPUTE_OUT_TIME t12

*SCHEDULE_WFQ

PUSH

t11 UPDATE_STATE_REJ

PUSH

*SCHEDULE_WFQ COMPUTE_OUT_TIME

t12

*SCHEDULE_WFQ

COMPUTE_OUT_TIME t12

*SCHEDULE_WFQ

UPDATE_STATE_ACC

UPDATE_STATE_ACC

t11 UPDATE_STATE_REJ

t6 UPDATE_STATE_INIT 20

21 21

30

431

52

20

21 26

30

36

46 37

58

25

26 31

35

41

51 42

63

25

26 26

35

4 36

57

Schedule Results:

49 markings

14 schedules

63 instructions

12 Kbytes Memory

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14 Schedules of MSD in ATM14 Schedules of MSD in ATM

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ConclusionsConclusions Software needs to be synthesized Software needs to be synthesized

automatically because it is getting automatically because it is getting more and more more and more complexcomplex!!

HardHard RTES Synthesis Method = RTES Synthesis Method = QSS + RTS + Code-GenerationQSS + RTS + Code-Generation

SoftSoft RTES Synthesis Method = RTES Synthesis Method = QSS + FIBS + Code-GenerationQSS + FIBS + Code-Generation

ATM VPN ServerATM VPN Server Example shows Example showsfeasibility of our approachfeasibility of our approach

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Current and Future WorkCurrent and Future Work

IntegrateIntegrate Time & Memory Scheduling Time & Memory Scheduling

A A generalgeneral Petri Net system model Petri Net system model

Java ImplementationJava Implementation: install into embedde: install into embedded systems such as PDA for dynamic code d systems such as PDA for dynamic code change and management by user (web cochange and management by user (web computing)mputing)

C Code GenerationC Code Generation: for embedding into pro: for embedding into prototyping systems such as SoC design and totyping systems such as SoC design and verification platformverification platform