review session - seoul national universityarchi.snu.ac.kr/.../slides/final_review.pdf ·...
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컴퓨터 개념 및 실습
Review session
Bryan S. Kim
Logistics of the exam
• On 6/12, Wednesday, @ 14:30 – 16:50
• In-class @ 301-203
• Covers Chapters 1-18
• Closed-book, closed-notes
• Bring your ID
• Only writing utensils will be allowed on your desk (no electronics!)
Logistics of today
• High-level overview of high-level languages
• Some of the questions from last year
• Some of the exercises from the text
컴퓨터 개념 및 실습
High-level overview of high-level languages
Bryan S. Kim
In the world of assembly
ISA
Micro-architecture
Binary (executable)
Assembly program
Assembler
In the world of assembly
ISA
Micro-architecture
Binary (executable)
Assembly program
Assembler
Q: What does the ISA hide/expose? Q: What does the assembler hide/expose?
In the world of assembly
ISA
Micro-architecture
Binary (executable)
Assembly program
Assembler
We want to abstract away more low-level details!
C as a high-level language
Hardware
C Program
Compiler
Looks at entire program
Generates binary
C as a high-level language
Hardware
C Program
Compiler
Looks at entire program
Generates binary
We need to... Use correct syntax Understand the semantics Refine algorithm into a
sequence of C statements
C as a high-level language
Hardware
C Program
Compiler
Looks at entire program
Generates binary
We need to... Use correct syntax Understand the semantics Refine algorithm into a
sequence of C statements
Understand how a program in C translates into binary
C as a high-level language
Hardware
C Program
Compiler
Looks at entire program
Generates binary
We need to... Use correct syntax Understand the semantics Refine algorithm into a
sequence of C statements
Understand how a program in C translates into binary
Learn powerful programming constructs
컴퓨터 개념 및 실습
Some questions from last year
Bryan S. Kim
X S1 S0 Z D1 D0
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1
X S1 S0 Z D1 D0
0 0 0 1
0 0 1 0
0 1 0 0
0 1 1 0
1 0 0 1
1 0 1 0
1 1 0 0
1 1 1 0
Z = NOR(S1, S0)
Z = NOR(S1, S0) D1 = OR(S0, AND(~X, S1))
X S1 S0 Z D1 D0
0 0 0 1 0
0 0 1 0 1
0 1 0 0 1
0 1 1 0 1
1 0 0 1 0
1 0 1 0 1
1 1 0 0 0
1 1 1 0 1
Z = NOR(S1, S0) D1 = OR(S0, AND(~X, S1)) D0 = NAND(S0, AND(~X, S1))
X S1 S0 Z D1 D0
0 0 0 1 0 1
0 0 1 0 1 1
0 1 0 0 1 1
0 1 1 0 1 0
1 0 0 1 0 1
1 0 1 0 1 1
1 1 0 0 0 1
1 1 1 0 1 1
; R4 0
; R3 0
; R0 x4000
; R4 0
; R3 0
; R0 x4000
; R1 M[x4000] ; R2 ~R1
; If R1 is xFFFF, goto DONE
; R4 0
; R3 0
; R0 x4000
; R1 M[x4000] ; R2 ~R1
; If R1 is xFFFF, goto DONE ; R2 R1[3:0]
; If R1[3:0] is zero, goto L1
; R4 0
; R3 0
; R0 x4000
; R1 M[x4000] ; R2 ~R1
; If R1 is xFFFF, goto DONE ; R2 R1[3:0]
; If R1[3:0] is zero, goto L1
; Increment R4 (if R1[3:0] is not zero)
; goto NEXT
; Increment R3 (if R1[3:0] is zero)
; R4 0
; R3 0
; R0 x4000
; R1 M[x4000] ; R2 ~R1
; If R1 is xFFFF, goto DONE ; R2 R1[3:0]
; If R1[3:0] is zero, goto L1
; Increment R4 (if R1[3:0] is not zero)
; goto NEXT
; Increment R3 (if R1[3:0] is zero) ; R0 R0 + 1 (goto next mem location)
; goto LOOP
; HALT
Starting from x4000, goes
through consecutive memory locations until it reaches xFFFF.
Counts the number of numbers that are divisible by 16 (or a multiple of 16), and stores in R3.
Counts the number of numbers that are not divisible by 16 and stores in R4.
// x3005
// x3008
// x3109
5 4
xEFFF
xEFFE
xEFFD
xEFFC
xEFFB
xEFFA
xEFF9
xEFF8 xEFF7
xEFF6
xEFF5
xEFF4
xEFF3
xEFF2
xEFF1
xEFF0
main’s var: a
main’s var: b
// x3005
// x3008
// x3109
5 4 0 0 0 0 0 0 0 0 0 0 0 0 0 0
xEFFF
xEFFE
xEFFD
xEFFC
xEFFB
xEFFA
xEFF9
xEFF8 xEFF7
xEFF6
xEFF5
xEFF4
xEFF3
xEFF2
xEFF1
xEFF0
main’s var: a
main’s var: b
// x3005
// x3008
// x3109
5 4 3 0 0 0 0 0 0 0 0 0 0 0 0 0
xEFFF
xEFFE
xEFFD
xEFFC
xEFFB
xEFFA
xEFF9
xEFF8 xEFF7
xEFF6
xEFF5
xEFF4
xEFF3
xEFF2
xEFF1
xEFF0
main’s var: a
main’s var: b
Arg0 for watt
// x3005
// x3008
// x3109
5 4 3 0
x3006 xEFFF
0 0 0 0 0 0 0 0 0 0
xEFFF
xEFFE
xEFFD
xEFFC
xEFFB
xEFFA
xEFF9
xEFF8 xEFF7
xEFF6
xEFF5
xEFF4
xEFF3
xEFF2
xEFF1
xEFF0
main’s var: a
main’s var: b
Arg0 for watt
Ret val to main
Ret addr to main
Dyn link of main
// x3005
// x3008
// x3109
5 4 3 0
x3006 xEFFF
0 0 0 0 0 0 0 0 0 0
xEFFF
xEFFE
xEFFD
xEFFC
xEFFB
xEFFA
xEFF9
xEFF8 xEFF7
xEFF6
xEFF5
xEFF4
xEFF3
xEFF2
xEFF1
xEFF0
main’s var: a
main’s var: b
Arg0 for watt
Ret val to main
Ret addr to main
Dyn link of main
watt’s var: w
// x3005
// x3008
// x3109
5 4 3 0
x3006 xEFFF
0 7
xEFFD 0 0 0 0 0 0 0
xEFFF
xEFFE
xEFFD
xEFFC
xEFFB
xEFFA
xEFF9
xEFF8 xEFF7
xEFF6
xEFF5
xEFF4
xEFF3
xEFF2
xEFF1
xEFF0
main’s var: a
main’s var: b
Arg0 for watt
Ret val to main
Ret addr to main
Dyn link of main
watt’s var: w
Arg1 for volta
Arg0 for volta
// x3005
// x3008
// x3109
5 4 3 0
x3006 xEFFF
0 7
xEFFD 0
x310A xEFF9
0 0 0 0
xEFFF
xEFFE
xEFFD
xEFFC
xEFFB
xEFFA
xEFF9
xEFF8 xEFF7
xEFF6
xEFF5
xEFF4
xEFF3
xEFF2
xEFF1
xEFF0
main’s var: a
main’s var: b
Arg0 for watt
Ret val to main
Ret addr to main
Dyn link of main
watt’s var: w
Arg1 for volta
Arg0 for volta
Ret val to watt
Ret addr to watt
Dyn link of watt
// x3005
// x3008
// x3109
5 4 3 0
x3006 xEFFF
0 7
xEFFD 0
x310A xEFF9
0 0 0 0
xEFFF
xEFFE
xEFFD
xEFFC
xEFFB
xEFFA
xEFF9
xEFF8 xEFF7
xEFF6
xEFF5
xEFF4
xEFF3
xEFF2
xEFF1
xEFF0
main’s var: a
main’s var: b
Arg0 for watt
Ret val to main
Ret addr to main
Dyn link of main
watt’s var: w
Arg1 for volta
Arg0 for volta
Ret val to watt
Ret addr to watt
Dyn link of watt
volta’s var: a
volta’s var: b
// x3005
// x3008
// x3109
5 4 3 0
x3006 xEFFF
0 7
xEFFD 0
x310A xEFF9
3 6 0 0
xEFFF
xEFFE
xEFFD
xEFFC
xEFFB
xEFFA
xEFF9
xEFF8 xEFF7
xEFF6
xEFF5
xEFF4
xEFF3
xEFF2
xEFF1
xEFF0
main’s var: a
main’s var: b
Arg0 for watt
Ret val to main
Ret addr to main
Dyn link of main
watt’s var: w
Arg1 for volta
Arg0 for volta
Ret val to watt
Ret addr to watt
Dyn link of watt
volta’s var: a
volta’s var: b
// x3005
// x3008
// x3109
5 4 3 0
x3006 xEFFF
0 7
xEFFD 6
x310A xEFF9
3 6 0 0
xEFFF
xEFFE
xEFFD
xEFFC
xEFFB
xEFFA
xEFF9
xEFF8 xEFF7
xEFF6
xEFF5
xEFF4
xEFF3
xEFF2
xEFF1
xEFF0
main’s var: a
main’s var: b
Arg0 for watt
Ret val to main
Ret addr to main
Dyn link of main
watt’s var: w
Arg1 for volta
Arg0 for volta
Ret val to watt
Ret addr to watt
Dyn link of watt
volta’s var: a
volta’s var: b
gcd(72, 52)
gcd(52, 20)
gcd(20, 12)
gcd(12, 8)
gcd(8, 4)
gcd(4, 0)
gcd(52, 72)
gcd(72, 52)
gcd(52, 20)
gcd(20, 12)
gcd(12, 8)
gcd(8, 4)
gcd(4, 0)
gcd(52, 72)
4
4
4
4
4
4
컴퓨터 개념 및 실습
Some text exercises
Bryan S. Kim
Some exercises
• Chap. 11: 5, 6, 7
• Chap. 12: 5, 12, 20
• Chap. 14: 15
• Chap. 15: 3
• Chap. 16: 1, 3, 7, 12
• Chap. 17: 1, 5
• Chap. 18: 4, 8