<4D6963726F736F667420576F7264202D20A6E6AC46B07CA4CEA9D2C4DDA655BEF7C3F6A558B0EAB3F8A7696368312D332E646F63> PIC 18f452 IC-EMI PIC 18f452
TEM cell, 1Ohm/150Ohm TEM Cell
IC 10MHz TEM Cell
spice
10MHz~200MHz 10MHz20MHz
11.218dBμ V5.889 dBμ V 3dBμ V

1Ohm/150Ohm 10M~200MHz

2006 EMC

….……………..…..21
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3
symposium

(INSA)
measurement.)
Characterization.)
5
Parasitic Emission, Origin of Susceptibility, Fourier Transform,
Impedance, Conclusion).
(EMC Issues)
(Measurement Methods )
,
Conclusion)
()
Package Models. Emission simulation, susceptibility
simulation). (Strategy )
()
(Strategical plans for research in EMC of Ics related to SoC,
programmable devices, etc.. in Taiwan)
6
(INSA)
,(S12X case study. Implemented techniques. PCB design. EMC methods. Measurement setup)
(Emission measurement) S12X PIC 18f452 ,VDE , TEM/GTEM ( Toulouse N7 ) S12X case study. VDE measurement. TEM/GTEM measurement. Scan measurement (N7)
(Susceptibility measurement) S12X ,(DPI)
(S12X case study. Coupler handling in 50 ohm, 330 Ohm. DPI measurement on input. Near-field scan)
(EMI modeling) PIC 18f452 , VDE ,TEM Cell ,
(PIC 18f452 case study for TEM/ 1ohm/150ohm/IBIS/near field scan.)
(EMS modeling) S12X case study for DPI method( S12X ,DPI .)
7
Professor
Scard meeting 1 (Research discussions with his IC-EMC teams, and having a meeting with Professor Scard once a week)
EMC Europe 2006 (symposium) Topics for Discussion (SoC susceptibility to EMI) (Emission and Susceptibility Issues in System-on-Chip for EMC)
(Modeling the Effectiveness of on-Chip Decoupling Capacitors for PSN and EMI reduction)
(Hybrid solutions for Leveraging SoC Robustness in EMI-Exposed Environments) IC (Testing for Complex ICs Signal Integrity)
(SoC design and Test Roadmap for EM compatibility and Collaborative Perspectives) (Modeling) (Computational Electromagnetic) (Measurements, Instrumentation and Testing)
(Standards and Regulations) (Emissions) (Immunity) (Transients) (Lightning and EMP) (ESD) (Shielding) (Coupling)
8
9
IC

Integrity ,SI) EMC (IC)
(High Density
(System in Package ,SiP)


(robustness)
EMC
IC
EMS
EMC
1.2



11
(System in Package,SiP) IC
High Density Interconnect, HDI
(Signal Integrity, SI)Power
Integrity, PIElectromagnetic Compatibility, EMC
(clock)
rate)
(Gates Level)(Register Transistor Level ,RTL)
(SIP)(reuse)
operation system, RTOS)-- 2.2

12

(Co-design,
Co-verification) (SIP) (reuse)
(reconfigure)(platform-based design)



(System in Package,SiP) 2.3
IC (System
in Package,SiP)
(SoC)
CMOS
ICSiP SoC


IC

(lead frame)
Integrity)



Vomax VOH 1VoL Vomin
0VoH VoL (noise margin)=VoH-VoL
VoH
VoL
VoL

2.4 IC power pad (lead
frame)(noise voltage ,NV)=L di/dt
(ground bounce)
2.5 IC

(PI)



IC
(ground bounce)
(FFT)

2.6.2 — 150ohm (ring)
2.7
2.8
40MHz 4 I/O ort2 timer
3.1 PIC 18F452
19