sfr 9034

Avalanche Rugged Technology Rugged Gate Oxide Technology Lower Input Capacitance Improved Gate Charge Extended Safe Operating Area Lower Leakage Current : 10 µA (Max.) @ VDS = -60V Lower RDS(ON) : 0.106 Ω (Typ.)

Advanced Power MOSFET

Thermal Resistance

Junction-to-Case

Junction-to-Ambient

Junction-to-Ambient

RθJC

RθJA

RθJA

oC/W

Characteristic Max. UnitsSymbol Typ.

FEATURES

*

* When mounted on the minimum pad size recommended (PCB Mount).

Absolute Maximum Ratings

Drain-to-Source Voltage

Continuous Drain Current (TC=25oC)

Continuous Drain Current (TC=100oC)

Drain Current-Pulsed

Gate-to-Source Voltage

Single Pulsed Avalanche Energy

Avalanche Current

Repetitive Avalanche Energy

Peak Diode Recovery dv/dt

Total Power Dissipation (TA=25oC)

Total Power Dissipation (TC=25oC)

Linear Derating Factor

Operating Junction and

Storage Temperature Range

Maximum Lead Temp. for Soldering

Purposes, 1/8” from case for 5-seconds

Characteristic Value UnitsSymbol

IDM

VGS

EAS

IAR

EAR

dv/dt

PD

ID

TJ , TSTG

TL

A

V

mJ

A

mJ

V/ns

W

W

W/oC

A

oC

VDSS V

*

D-PAK

1. Gate 2. Drain 3. Source

1

2

3

I-PAK

1

32

O1

O2

O3

O1O1

SFR/U9034

BVDSS = -60 V

RDS(on) = 0.14 Ω

ID = -14 A

-60

-14

-9.8

56

336

-14

4.9

-5.5

2.5

49

0.39

- 55 to +150

300

2.55

50

110

--

--

--

20 +_

©1999 Fairchild Semiconductor Corporation

Rev. B

P-CHANNELPOWER MOSFET

Electrical Characteristics (TC=25oC unless otherwise specified)

Drain-Source Breakdown Voltage

Breakdown Voltage Temp. Coeff.

Gate Threshold Voltage

Gate-Source Leakage , Forward

Gate-Source Leakage , Reverse

CharacteristicSymbol Max. UnitsTyp.Min. Test Condition

Static Drain-Source

On-State Resistance

Forward Transconductance

Input Capacitance

Output Capacitance

Reverse Transfer Capacitance

Turn-On Delay Time

Rise Time

Turn-Off Delay Time

Fall Time

Total Gate Charge

Gate-Source Charge

Gate-Drain(“Miller”) Charge

gfs

Ciss

Coss

Crss

td(on)

trtd(off)

tfQg

Qgs

Qgd

BVDSS

∆BV/∆TJ

VGS(th)

RDS(on)

IGSS

IDSS

V

V/oC

V

nA

µA

Ω

Ω

pF

ns

nC

--

--

--

--

--

--

--

--

--

--

--

--

--

VGS=0V,ID=-250µA

ID=-250µA See Fig 7

VDS=-5V,ID=-250µA

VGS=-20V

VGS=20V

VDS=-60V

VDS=-48V,TC=125oC

VGS=-10V,ID=-7.0A

VDS=-30V,ID=-7.0A

VDD=-30V,ID=-18A,

RG=12

See Fig 13

VDS=-48V,VGS=-10V,

ID=-18A

See Fig 6 & Fig 12

Drain-to-Source Leakage Current

VGS=0V,VDS=-25V,f =1MHz

See Fig 5

Source-Drain Diode Ratings and Characteristics

Continuous Source Current

Pulsed-Source Current

Diode Forward Voltage

Reverse Recovery Time

Reverse Recovery Charge

ISISM

VSD

trrQrr

CharacteristicSymbol Max. UnitsTyp.Min. Test Condition

--

--

--

--

--

A

V

ns

µC

Integral reverse pn-diode

in the MOSFET

TJ=25oC,IS=-14A,VGS=0V

TJ=25oC,IF=-18A

diF/dt=100A/µs

Ω

O4

O5

O4

O4

O5O4

O4

O4O1

SFR/U9034

-60

--

-2.0

--

--

--

--

--

-0.05

--

--

--

--

--

265

84

14

24

43

28

30

5.3

12

--

--

-4.0

-100

100

-10

-100

0.14

--

1155

400

125

40

60

95

65

38

--

--

8.1

890

--

--

--

85

0.25

-14

-56

-3.9

--

--

Notes ; Repetitive Rating : Pulse Width Limited by Maximum Junction Temperature L=2.0mH, IAS=-14A, VDD=-25V, RG=27Ω*, Starting TJ =25oC ISD -18A, di/dt 300A/µs, VDD BVDSS , Starting TJ =25oC Pulse Test : Pulse Width = 250 µs, Duty Cycle 2% Essentially Independent of Operating Temperature

_<

O1O2

O3

O4O5

_<_<_<


Fig 1. Output Characteristics Fig 2. Transfer Characteristics

Fig 6. Gate Charge vs. Gate-Source VoltageFig 5. Capacitance vs. Drain-Source Voltage

Fig 4. Source-Drain Diode Forward VoltageFig 3. On-Resistance vs. Drain Current

SFR/U9034

0 10 20 30 40 50 60 700.0

0.1

0.2

0.3

0.4

@ Note : TJ = 25 oCVGS = -20 V

VGS = -10 V

R DS(on) , [

Ω]

Drai

n-So

urce

On-

Resi

stan

ce

-ID , Drain Current [A]

10-1 100 101

100

101

@ Notes : 1. 250 µs Pulse Test 2. TC = 25

oC

VGS

Top : - 15 V - 10 V - 8.0 V - 7.0 V - 6.0 V - 5.5 V - 5.0 VBottom : - 4.5 V

-ID ,

Drai

n Cu

rren

t [

A]

-VDS , Drain-Source Voltage [V]

0 5 10 15 20 25 30 350

5

10VDS = -48 VVDS = -30 VVDS = -12 V

@ Notes : ID =-18 A

-VGS ,

Gat

e-So

urce

Vol

tage

[V

]

QG , Total Gate Charge [nC]

2 4 6 8 1010-1

100

101

25 oC

150 oC

- 55 oC

@ Notes : 1. VGS = 0 V 2. VDS = -30 V 3. 250 µs Pulse Test

-ID ,

Drai

n Cu

rren

t [

A]-VGS , Gate-Source Voltage [V]

0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.010-1

100

101

150 oC

25 oC

@ Notes : 1. VGS = 0 V 2. 250 µs Pulse Test-I

DR ,

Rev

erse

Dra

in C

urre

nt

[A]

-VSD , Source-Drain Voltage [V]

100 1010

300

600

900

1200

1500Ciss= Cgs+ Cgd ( Cds= shorted)

Coss= Cds+ CgdCrss= Cgd

@ Notes : 1. VGS = 0 V 2. f = 1 MHzC rss

C oss

C iss

Capa

cita

nce

[pF

]

-VDS , Drain-Source Voltage [V]


Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

Fig 11. Thermal Response

Fig 10. Max. Drain Current vs. Case TemperatureFig 9. Max. Safe Operating Area

PDM.

t1.t2.

SFR/U9034

100 101 10210-1

100

101

102

10 msDC

1 ms

0.1 ms

@ Notes : 1. TC = 25

oC

2. TJ = 150 oC

3. Single Pulse

Operation in This Area is Limited by R DS(on)

-ID ,

Drai

n Cu

rren

t [

A]

-VDS , Drain-Source Voltage [V]25 50 75 100 125 1500

3

6

9

12

15

-ID ,

Drai

n Cu

rren

t [

A]

Tc , Case Temperature [oC]

-75 -50 -25 0 25 50 75 100 125 150 1750.8

0.9

1.0

1.1

1.2

@ Notes : 1. VGS = 0 V 2. ID = -250 µA

-BV DSS ,

(No

rmal

ized

)Dr

ain-

Sour

ce B

reak

down

Vol

tage

TJ , Junction Temperature [oC]

-75 -50 -25 0 25 50 75 100 125 150 1750.0

0.5

1.0

1.5

2.0

2.5

@ Notes : 1. VGS = -10 V 2. ID = -9.0 A

R DS(on) ,

(No

rmal

ized

)Dr

ain-

Sour

ce O

n-Re

sist

ance

TJ , Junction Temperature [oC]

10-5 10-4 10-3 10-2 10-1 100 101

10-1

100

single pulse

0.2

0.1

0.010.02

0.05

D=0.5

@ Notes : 1. Z

θJ C (t)=2.55 oC/W Max.

2. Duty Factor, D=t1/t2 3. TJM-TC=PDM*ZθJ C (t)

Z θJC(t)

,

Ther

mal

Resp

onse

t1 , Square Wave Pulse Duration [sec]


Fig 12. Gate Charge Test Circuit & Waveform

Fig 13. Resistive Switching Test Circuit & Waveforms

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

EAS = LL IAS2----

21 --------------------

BVDSS -- VDD

BVDSS

Vin

Vout

10%

90%

td(on) tr

t on t off

td(off)tf

Charge

VGS

-10V

Qg

Qgs Qgd

Vary tp to obtainrequired peak ID

-10V

VDDC

LLVDS

ID

RG

t p

DUT

BVDSS

t p

VDD

IAS

VDS (t)

ID (t)

Time

VDD( 0.5 rated VDS )

-10V

Vout

Vin

RL

DUT

RG

-3mA

VGS

Current Sampling (IG)Resistor

Current Sampling (ID)Resistor

DUT

VDS

300nF

50K

200nF12V

Same Typeas DUT

“ Current Regulator ”

R1 R2

Ω

SFR/U9034


Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT

VDS

+

--

LI S

DriverVGS

RGCompliment of DUT

(N-Channel)

VGS • dv/dt controlled by “RG”• IS controlled by Duty Factor “D”

VDD

10VVGS

( Driver )

I S

( DUT )

VDS

( DUT )VDD

Body DiodeForward Voltage Drop

Vf

IFM , Body Diode Forward Current

Body Diode Reverse Current

IRM

Body Diode Recovery dv/dt

di/dt

D =Gate Pulse WidthGate Pulse Period

--------------------------

SFR/U9034

TRADEMARKS

ACEx™CoolFET™CROSSVOLT™E2CMOSTM

FACT™FACT Quiet Series™FAST®

FASTr™GTO™HiSeC™

The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and isnot intended to be an exhaustive list of all such trademarks.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORTDEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.As used herein:

ISOPLANAR™MICROWIRE™POP™PowerTrench™QS™Quiet Series™SuperSOT™-3SuperSOT™-6SuperSOT™-8TinyLogic™

1. Life support devices or systems are devices orsystems which, (a) are intended for surgical implant intothe body, or (b) support or sustain life, or (c) whosefailure to perform when properly used in accordancewith instructions for use provided in the labeling, can bereasonably expected to result in significant injury to theuser.

2. A critical component is any component of a lifesupport device or system whose failure to perform canbe reasonably expected to cause the failure of the lifesupport device or system, or to affect its safety oreffectiveness.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information

Preliminary

No Identification Needed

Obsolete

This datasheet contains the design specifications forproduct development. Specifications may change inany manner without notice.

This datasheet contains preliminary data, andsupplementary data will be published at a later date.Fairchild Semiconductor reserves the right to makechanges at any time without notice in order to improvedesign.

This datasheet contains final specifications. FairchildSemiconductor reserves the right to make changes atany time without notice in order to improve design.

This datasheet contains specifications on a productthat has been discontinued by Fairchild semiconductor.The datasheet is printed for reference information only.

Formative orIn Design

First Production

Full Production

Not In Production

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHERNOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILDDOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCTOR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENTRIGHTS, NOR THE RIGHTS OF OTHERS.

UHC™VCX™

This datasheet has been download from:

www.datasheetcatalog.com

Datasheets for electronics components.

http://www.datasheetcatalog.com



sfr 9034

Documents