siu trr

GLAST LAT Project SIU TRR

4.1.7 DAQ & FSW V1 1

GLAST Large Area Telescope:GLAST Large Area Telescope:

Presented by G. HallerSLAC

[email protected](650) 926-4257

Gamma-ray Large Gamma-ray Large Area Space Area Space TelescopeTelescope

SIU TRRSIU TRR


4.1.7 DAQ & FSW V1 2

ContentsContents

• Introduction– Overview– Significant Changes since CDR– Objectives– Status

• Requirements/Verification• EGSE and Test-Procedures• Verification Test Plan and Flow

– At Assembly Vendor• Test-plan and Flow• Facility• Man-Power• Quality Assurance• Vibration

– At SLAC• Test-plan and Flow• Thermal Vacuum Test• Mass Property• EMI/EMC (at sub-contractor)• Man-Power• Quality Assurance

• Equipment Calibration/Safety• Risk Assessment• Schedule• Status of Procedures• Issues and Concerns


4.1.7 DAQ & FSW V1 3

LAT ElectronicsLAT Electronics

3 Event-Processor Units (EPU) (2 + 1 spare)

– Event processing CPU– LAT Communication Board– SIB

ACD

empty

EPU-3

EPU-2EPU-1

empty empty

Power Dist. Unit*

GASU*

empty

empty

SIU*SIU*

Spacecraft Interface Units (SIU)*

– Storage Interface Board (SIB): Spacecraft interface, control & telemetry

– LAT control CPU– LAT Communication

Board (LCB): LAT command and data interface

16 Tower Electronics Modules & Tower Power Supplies

* Primary & Secondary Units shown in one chassis

Power-Distribution Unit (PDU)*

– Spacecraft interface, power

– LAT power distribution

– LAT health monitoring

Global-Trigger/ACD-EM/Signal-Distribution Unit*

(GASU)

TKR

CAL

TKR Front-End Electronics (MCM)ACD Front-End Electronics (FREE)

CAL Front-End Electronics (AFEE)


4.1.7 DAQ & FSW V1 4

SIU/EPU Mounted on LAT SIU/EPU Mounted on LAT

SIU

PDU

EPU’s


4.1.7 DAQ & FSW V1 5

SIU/EPU Crate ElectronicsSIU/EPU Crate Electronics

PCI Interface

SIB

MIL1553*

Power Control*

EEPROM

BackPlaneHeater

Control*

PCI Interface

Event Data

Command-Response

FIFO

LCB

28-V DC/DC

Power-On Reset

LVDS ConvertionCPS

3.3V/5V

CPU

PCI Interface

Power PC

Discrete I/O

VCHP Heater Box

PDU

Spacecraft MIL1553

GASU

Spacecraft Power

GASU

Spacecraft Discretes

System Clock

GASU

• Storage Interface Board (SIB)– EEPROM– MIL1553 Communication with

spacecraft*– Power Control of PDU/GASU power

switches in PDU*– Power Control of VCHP switches in

heater box*• LAT Communication Board (LCB)

– Communication with GASU• Commanding• Read-back Data• Housekeeping Data• Event Data

• Crate Power Supply Board (CPS)– 28V to 3.3V/5V conversion– Power-On Reset– LVDS-CMOS conversion of

spacecraft discretes*– System clock to GASU

• CPU Board (RAD750)– Processor**– IO of level-converted SC discretes

• Crate Backplane (CBP)– passive • *Only used in SIU crate

• **Start-up ROM code different from EPU and SIU


4.1.7 DAQ & FSW V1 6

SIU/EPU CrateSIU/EPU Crate

• Partially loaded crate on left (without LCB and SIB)• Fully loaded crate on right • Shown are also serial card and ethernet cards, not part of flight

assembly (cards with front-panel connections)


4.1.7 DAQ & FSW V1 7

CBP & CPS & CPUCBP & CPS & CPU

CPS (Crate Power Supply Board)

CBP (Crate Backplane)

CPU (RAD750 from BAE)


4.1.7 DAQ & FSW V1 8

SIB & LCBSIB & LCB

SIB (Storage Interface Board)

LCB (LAT Communication Board)


4.1.7 DAQ & FSW V1 9

Changes since LAT CDRChanges since LAT CDR

• Code in LCB and SIB FPGA’s were modified/finalized and bugs fixed

• Some resistor/capacitor values have changed to optimize performance


4.1.7 DAQ & FSW V1 10

ObjectivesObjectives

• Demonstrate that hardware, software, procedures, and support equipment are prepared to support system environmental test

• Demonstrate that planned and completed testing meets performance and interface requirements

• Identify and understand all the risks and limitations• TRR is not intended to

– Review SIU design– Review flight readiness– Buy-off hardware or software

• RFA’s should only be of sufficient concern to stop test– Prior to start of an given test, any applicable TRR RFAs

must be closed


4.1.7 DAQ & FSW V1 11

Test Entrance / Exit CriteriaTest Entrance / Exit Criteria

• Entrance– All required paperwork released and in place

• Procedures, drawings, etc– Test configuration verified and approved– Essential personnel in place– Pre-test SIU functional successfully passed

• Exit– As-run procedures completed– Correct and accurate application of test environment– Test data acquired and archived– No damage to SIU– SIU performance within specification limits– Post-test SIU functional successful


4.1.7 DAQ & FSW V1 12

StatusStatus

• First SIU (to be proto-flight tested)– Assembled– Pre-conformal coat SIB, LCB,CBP,CPS in crate tested, tests

to verify that boards perform over temperature (was prerequisite to programming FPGA’s for additional SIB & LCB’s)

– Conformal coated modules are being integrated in enclosure

• Additional SIU/EPU’s (to be flight acceptance tested)– LCB/SIB/CPS/CBP at various assembly stages


4.1.7 DAQ & FSW V1 13

Tests To-DateTests To-Date

• SIU/EPU engineering modules were extensively tested– As EGSE in DAQ/I&T

• Testbed includes SIU & EPU for > 1 year• Main difference to flight SIU/EPU: Commercial ACTEL

FPGA’s versus flight ACTEL’s.– One SIB wasassembled with mostly flight parts including

flight ACTEL and tested in one enclosure– Additional SIU tests

• Informal thermal test -40C to 55C• Informal EMI test on EGSE station sent to Lockheed for

thermal test


4.1.7 DAQ & FSW V1 14

RequirementsRequirements

• LAT-SS-00285 Specifications, Level 4 LAT Dataflow System• LAT-SS-00019 Specifications, Level 3 T&DF Subsystem Specification• LAT-SS-00136 Specifications, Level 3 Power Supply System • LAT-SS-00183 Specifications, Level 4 Power Supply System• LAT-SS-07433 Specifications, Level 5 SIU Specification• LAT-TD-00606 LAT Inter-Module Communications• LAT-TD-01685 SIU ICD Specification & Conceptual Design• LAT-TD-01682 LCB Specification & ICD• LAT-TD-00860 LCB, Programming ICD • LAT-TD-01539 SIB Specification and ICD • LAT-SS-01538 CPS Specification• LAT-SS-01540 CBP (Backplane) Specification

• LAT-SS-00778 LAT Environmental Specification

• LAT-SS-07433 SIU lists requirements• LAT-TD-07434 contains Verification Matrix which gives approach to verify each

requirement– Lists verification method used


4.1.7 DAQ & FSW V1 15

System PerformanceSystem Performance

• Level 3 and level 4 DAQ and TRG and power-system requirements are met with a combination of DAQ modules (TEM/TPS, GASU, SIU, PDU, etc), since the DAQ and trigger and power system is comprised of several sub-system module types– Level 5 SIU requirements which are verified are derived

from Level 3 and Level 4 DAQ and Trigger and Power system specifications (as noted in the L5 requirements doc)

– Level 5 requirement doc includes derived requirement addressing

• Functionality/performance• Power• Mass/C.G.• EMI/EMC• Environmental incl temperature and vibration


4.1.7 DAQ & FSW V1 16

Verification StatusVerification Status

• Engineering Module SIU– EM completed full functional test program with exception of

thermal-vacuum, EMI/EMC, mass, and C.G.– Demonstrated compliance with specifications


4.1.7 DAQ & FSW V1 17

Test-ProceduresTest-Procedures

• SIU/EPU Crate– LAT-TD-07194 SIU Electrical Interface Continuity and Isolation Test procedure

• Power-off impedance tests of I/O– LAT-TD-07195 SIU Stray-Voltage-Test Procedure

• Power-on voltage test of I/O– LAT-TD-01686 SIU Comprehensive Test Procedure

• Functionality and Performance test • LCB

– LAT-TD-01683 LCB Test Procedure– LCB-TD-06939 LCB Qualification Test Procedure

• SIB– LAT-TD-07382 Procedures for Uploading Files to SIB EEPROMs in a cCPI crate– LAT-TD-01678 SIB Test Procedure– LAT-TD-06978 SIB Qualification Test Procedure

• CPS– LAT-TD-04811 CPS Electrical Interface Continuity and Isolation Test procedure

• Power-off impedance tests of I/O– LAT-TD-04812 CPS Stray-Voltage-Test Procedure

• Power-on voltage test of I/O– LAT-TD-01673 CPS Test Procedure (Electrical)

• CBP– LAT-TD-07012 Backplane Assembly Continuity Test Procedure


4.1.7 DAQ & FSW V1 18

Test ConfigurationsTest Configurations

• Test-Procedures/Configurations– LAT-TD-01686– Examples (SIB and LCB) test configurations shown in

following slides


4.1.7 DAQ & FSW V1 19

Upload SIB EEPROM ConfigurationUpload SIB EEPROM Configuration

• Upload SIB EEPROM Configuration (LAT-TD-07382)

cPCI Crate

Slot 0SBC Mcp750 Card

2094A

1553 Mezzanine Card

VME Crate

Slot 0SBC MVME

2304 Card

1553 Mezzanine Card

A

2094B B

SIB

DBP2-stub

DBP 2-stub

2094

2094

J3 J4

J3 J4

Ethernet

Serial

Ethernet

Serial

Local Area Connection

Xyplex


4.1.7 DAQ & FSW V1 20

SIB Test ConfigurationSIB Test Configuration

• SIB Test Configuration (LAT-TD-01686)

VME CrateLCB(Unit Under Test)

SIB(Unit Under Test)

Ethernet

Serial/Debug

RAD750

SIU Crate

Crate Tester Box

Ethernet

Slot 0SBC MVME 2304 Card

Ethernet

Serial/Debug

LCB Mezzanine CardLAT-TD-00860

1553 Mezzanine Card

GASU

SIU7

2094

Local Network Connection

JL-45

J5

2094

RS-232

J4J3

DC Power Supply #1 BK PercisionBK 1697

P1

P2JL-40 JL-41

Local PC

(-)

(+)

15531553

Y+ heater controlY- heater control

P1

P2

P3

P4

P5

CLK/2

AD[31:0]PCI_RSTNCONTROLCLK

Reset RequestCLK_20MHz

PORReset SIU_RST

Event[7..0]Event BusyCMD/RESP

J7

J1J2

J1

J2

J3

Crate Power SupplyJ8 DC Power Supply #2

BK Precision BK 1697

P1

P2

(-)

(+)

ENET

2104

28V

DC Power Supply #3 BK Precision BK 1697

P1

P2

(-)

(+)

4130

4130

J6PDU Power Control

SIU/PDU Command DisplayLAT-DS-07216

5V


4.1.7 DAQ & FSW V1 21

LCB Test ConfigurationLCB Test Configuration

LCB Test Configuration (LAT-TD-01686)

VME CrateLCB

(Unit Under Test)

SIB

Ethernet

Serial/Debug

RAD750

SIU Crate

Crate Tester Box

Ethernet

Slot 0SBC MVME 2304 Card

10/100Base

Debug

LCB Mezzanine CardLAT-TD-00860

1553 Mezzanine Card

GASU

SIU7

2094

Local Network Connection

JL-45

J5

2094

RS-232

J4

J3

DC Power Supply #2 BK PercisionBK 1786

P1

P2JL-40 JL-41

Local PC

(-)

(+)

1553

1553

Y+ heater control

Y- heater control

Reset

P1

P2

P3

P4

P5

SYSCLK/2

AD[31:0]PCI_RSTNCONTROLCLK

Reset RequestCLK_20MHz

POR

Reset SIU_RST

Event[7..0]Event BusyCommand/Response

J7

J1

J2

J1

J2

J3

Power SupplyJ8 DC Power Supply #1

BK Precision BK 1697

P1

P2

(-)

(+)

ENET

GASU Test BoxLAT-DS-04969

GASU Test

External Clock

28V

Function Generator

JL153

5218

2104

Power


4.1.7 DAQ & FSW V1 22

Verification Level – Module DetailVerification Level – Module Detail

• Breakout of verification at SIU-EPU Module Level• Tests to be conducted after successful TRR (order may change

depending on availability of resourced (TV/EMI)• EICIT & SVT• Functional test• Vibration (Wyle)• Functional test• Thermal cycle• Functional test• Mass properties including CG• Thermal vacuum (in-situ testing)• EMI/EMC (at CKC-lab for proto-flight, at SLAC for flight

acceptance)• Functional test • Review• Deliver to I&T

– DAQ (out-going) / I&T (incoming) test combined


4.1.7 DAQ & FSW V1 23

VerificationVerification

• Test-Stand– Supplied by SLAC– Operated by SLAC engineers

• Vibration facility at Wyle– LAT-TD-03648 Vibration test-procedure (not signed off as of

Oct 3)– SLAC engineers present for vibration tests

• Thermal Cycle in thermal chamber in SLAC clean-room


4.1.7 DAQ & FSW V1 24

TC and Vibration RequirementsTC and Vibration Requirements

Parameter Required Characteristic Thermal Cycling (4 cycles) -40 to +55 °C (Qualification and

Proto-flight) Thermal Cycling (4 cycles) -35 to +50 °C (Acceptance) Random Vibration See Figure 1. Sinusoidal Vibration 0.5g rms, 20 to 2000Hz

Figure 1. Vibration Levels, Duration, and Spectra

Electronics Module (Special Boxes)Random Vibration Spectra

ASD Level (G2/Hz)Freq (Hz) Accept Qual20 0.010 0.01075 0.037 0.03880 0.040 0.055115 0.180 0.360160 0.180 0.360325 0.040 0.060350 0.040 0.050500 0.040 0.0502000 0.025 0.050Overall 8.91 Grms 11.51 GrmsDuration 60s/axis AT, PT

120s/axis QT

0.001

0.010

0.100

1.000

10 100 1000 10000Freq. (Hz)

AS

D L

evel

(G

^2/H

z)

Accept

Qual


4.1.7 DAQ & FSW V1 25

Mass PropertyMass Property

• Mass properties checked at SLAC – Procedure LAT-PS-07372 (performed at SLAC Metrology)– Expected: (ref LAT-TD-00564)

• Total 6.2 kg• Allocation 12% above = 7.5 kg

– C.G. to be measured for the proto-flight unit only


4.1.7 DAQ & FSW V1 26

Thermal Vacuum TestThermal Vacuum Test

• Thermal Vacuum facility in Building 33 at SLAC– Thermal Vacuum Chamber Operating Procedure LAT-TD-

02541 – SIU Thermal Vacuum Test-Procedure LAT-TD-03649– First SIU tested to proto-flight specifications (same

Temperatures as qualification, but 4 TV cycles versus 12 cycles)


4.1.7 DAQ & FSW V1 27

Proto-Flight and Flight Acceptance Thermal Proto-Flight and Flight Acceptance Thermal Vacuum TestVacuum Test

• See SIU Thermal Vacuum Test-Procedure LAT-TD-03638

+55C +2/-2C

PROTO-FLIGHT THERMAL VACUUM CYCLE TIMELINE

Hot Qualification Limit

4 Cycles Total

Open Chamber

CloseChamber

Start Pump Down

Chamber

Vent ChamberSetup Flight Unit

CPT

Start of Cycle 1

End of Cycle 12

Hot Survival Limit+60C +2/-2C

-40C +2/-2C Cold Survival/Cold Qualification Limit

EGSE Unit

Start Bake Out/Outgas

CPT

Open Chamber

Turn OFF+30C +2/-2C

CPTFlight Unit

Turn OFF

Verify End Bake Out O

N-O

FF-O

N

4Hrs

4Hrs

OFFCP

T

LP

T

ON

-OFF

-ON

CP

T

LP

T

4Hrs 4Hrs

4Hrs

4Hrs

OFF

-ON

OFF

-ON

OFF

-ON

OFF

-ON

ContinuePeriodic

LPT

CP

T

Continue Periodic

LPT

4Hrs

Cycles 2-3

CP

T

ContinuePeriodic

LPT

OFF

CP

TO

FF

OFF

-ON

Start Periodic

LPT

ContinuePeriodic

LPTOFF

-ON

At < 10-5 Torr

X 4

+50C +2/-2C

ACCEPTANCE THERMAL VACUUM CYCLE TIMELINE

Hot Acceptance Limit

4 Cycles Total

Open Chamber

CloseChamber

Start Pump Down

Chamber

Vent ChamberSetup Flight Unit

CPT

Start of Cycle 1

End of Cycle 4

Hot Survival Limit+60C +2/-2C

-35C +2/-2CCold Acceptance Limit

EGSE Unit

Start Bake Out/Outgas

CPT

Open Chamber

Turn OFF+30C +2/-2C

CPTFlight Unit

Turn OFF

Verify End Bake Out O

N-O

FF-

ON

4Hrs

4Hrs

OF

FC

PT

LPT

ON-OFF-ON

CPT

LPT

4Hrs 4Hrs

4Hrs

4Hrs

OF

F-O

N

OF

F-O

N

OF

F-O

N

OF

F-O

N

ContinuePeriodic

LPTC

PT

Continue Periodic

LPT

4Hrs

Cycles 2-3

CPT

ContinuePeriodic

LPT

OF

F

CPT OF

F

OF

F-O

N

Start Periodic

LPT

ContinuePeriodic

LPT

-40C +2/-2CCold Survival Limit4Hrs

OF

F-O

N


4.1.7 DAQ & FSW V1 28

EMI/EMC TestEMI/EMC Test

• Proto-Flight = Qualification Test (Conductive & Radiative)

– Sub-contracted to CK Labs

– Statement of Work: LAT-PS- 04568

• CE102, CECN, CS102, CSCM, CS06, RE101, RE102, RS101, RS103

– Detailed EMI/EMC procedure provided by CKC lab (to be provided)

– SLAC engineers present at vendor for tests

– Vendor supplies test-report

– LAT QA at SLAC present for tests

• Flight Acceptance Test (Conductive)

– Performed at SLAC

– LAT-TD-07107

• Only CE102, CS102

– SLAC supplies test-report

– LAT QA at SLAC present for tests


4.1.7 DAQ & FSW V1 29

Manpower & Quality AssuranceManpower & Quality Assurance

• Test man-power – SIU: L. Sapozhnikov/ J. Thayer– Test Support: J. Ludvik– Thermal Cycle and TV support: R. Williams, P. Hart– TV shift support: 2 contractors– EMI support: D. Nelson – Vibration support: D. Tarkington

• Quality assurance: Joe Cullinan– QA representative (Y.C. Liew) present during tests, review

of test-procedure and results– Required changes to documentation are red-lined and

included in new revisions– NCR are created for non-conformance (e.g. exceeding of

min/max test limits) and submitted for disposition


4.1.7 DAQ & FSW V1 30

Problem Failure Report/ Configuration Problem Failure Report/ Configuration ManagementManagement

• Problem Failure Reporting– Via standard SLAC LAT Non-Conformance Reporting (NCR)

System• NCR is entered• Reviewed/accepted/resolved

– LAT engineering

– LAT QC

• Already exercised during pre-conformal coat SIU assembly

• Configuration Management– Via standard LATDOC system


4.1.7 DAQ & FSW V1 31

Planned TestsPlanned Tests

• Function/Performance Tests (LAT-TD-01686)– Verifies all requirements in SIU Specification Document except

below• Thermal Vacuum Tests

– Verifies performance/function over temperature• Mass/C.G.

– Verifies/measures mass and C.G.• Vibrations test

– Verifies vibration performance requirements• EMI/EMC

– Verifies EMI/EMC performance• Note to margin testing

– External Voltage margin testing is performed at the CPS and Full-crate level only (28V +/-1V)

– Internal Voltage margin testing (3.3V/2.5V) is not performed– Frequency margin testing only perfromed on LCB LAT-side

interface, no clock frequency margin is tested on cCPI bus


4.1.7 DAQ & FSW V1 32

Equipment CalibrationEquipment Calibration

• EMI/EMC Test Equipment– Quantitative measurement equipment (sensors, antennas,

etc) calibrated to NIST standards– Calibration performed annually

• All item are (will be) within calibration at time of testing• Vibration Test Equipment

– Accelerometers calibrated against a standard accelerometer traceable to NIST

– Signal conditioners calibrated annually• TVAC Equipment

– Thermocouples calibrated against standard temperature; calibrated prior to test

– Thermocouple reader calibrated very 2 years


4.1.7 DAQ & FSW V1 33

Sub-System SafetySub-System Safety

• EGSE– Safe-to-mate– Configuration control– Calibration verification– Functionality verification with “golden” EGSE SIU prior to

test with flight hardware• MGSE

– No custom MGSE• Environment

– Temperature controlled in all test-facilities– Cleanliness actively controlled in clean-room; hardware

bagged and purged when required• Training

– ESD training completed– Clean room training completed


4.1.7 DAQ & FSW V1 34

Risk AssessmentRisk Assessment

• Schedule– Pressure to deliver flight hardware could force less than

complete characterization and analysis of modules, could result in replicating a problem in the following modules

• Performance– None known


4.1.7 DAQ & FSW V1 35

Test-ScheduleTest-Schedule

• Estimated as follows, order subject to EMI/TV availability• First SIU (proto-flight)

– 10/5: functional test – 10/13: TC– 10/14: functional test – 10/17: vibration test – 10/18: functional test– 10/24: TV start– 10/31: TV end– 11/1: mass, c.g. property – 11/2: EMI start – 11/16: EMI end

• Following SIU’s– Lag first SIU by about 4 days each


4.1.7 DAQ & FSW V1 36

Status of Main Test ProceduresStatus of Main Test Procedures

• All procedures must be released before respective test• Procedures to be released

– EMI vendor procedure to be released– CPT and TV modified, revisions are in review


4.1.7 DAQ & FSW V1 37

Issue & ConcernsIssue & Concerns

• Schedule– Tight

• Vibration test– Concern that harness/connectors pass vibration tests

• (should be ok, but is concern)

siu trr

Documents