socrates datasheets v1.2

Download SoCrates Datasheets V1.2

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  • SSooCCrraatteess CCyycclloonnee VV SSooCC EEvvaalluuaattiioonn BBooaarrdd

    wwwwww..ddeevvbbooaarrddss..ddee page 2 of 48 20.06.2013 Version 1.2

    Contents Contents ..................................................................................................................... 2 Revisions .................................................................................................................... 4

    Document Revision ................................................................................................. 4 Hardware Revisions ................................................................................................ 4

    Ordering Information ................................................................................................... 5 SoCrates ................................................................................................................. 5 SoCrates-Phy1 ........................................................................................................ 5

    Introduction ................................................................................................................. 6 Pin-Header Locations (top side) ................................................................................. 8 Pin-Header Locations (bottom side) ........................................................................... 9 Installation ................................................................................................................ 10 Getting started .......................................................................................................... 11

    Documentation ...................................................................................................... 11 Setting up the board for Linux ............................................................................... 11 Setting up the board for JTAG .............................................................................. 11

    Reference designs .................................................................................................... 12 Board Description ..................................................................................................... 13

    FPGA IO-Banks .................................................................................................... 13 FPGA Configuration .............................................................................................. 14

    FPGA Configuration select with MSEL (P18) .................................................... 14 Clocking ................................................................................................................ 14

    Clock Driver Outputs ......................................................................................... 15 FPGA Clock Sources......................................................................................... 15 IDT Clock Buffer IC Interface (P17) .................................................................. 15

    Power Supply ........................................................................................................ 16 Reset Signal ...................................................................................................... 17 VBAT ................................................................................................................. 17

    HPS Subsystem ....................................................................................................... 18 DDR3 Memory ...................................................................................................... 19 SDCard Interface .................................................................................................. 20

    SDCard (P8) FPGA Connection ........................................................................ 20 QSPI Flash ............................................................................................................ 20

    QSPI (U27) FPGA Connection .......................................................................... 20 USB Phy ............................................................................................................... 20

    USB Phy (U16) FPGA Connection .................................................................... 20 Ethernet Phy ......................................................................................................... 21

    Ethernet Phy (U14) FPGA Connection .............................................................. 21 UART .................................................................................................................... 21

    UART on P14 .................................................................................................... 21 UART to USB Converter .................................................................................... 22

    CAN Phy ............................................................................................................... 22 CAN Phy (U22) FPGA Connection .................................................................... 22 CAN Connector (P14)........................................................................................ 22

    DIP Switch ............................................................................................................ 22 Dip-Switch (P3) FPGA Connection .................................................................... 22

    Navigation Key ...................................................................................................... 23 Navigation Key (P20) FPGA Connection ........................................................... 23

    User LEDs ............................................................................................................. 23 User LEDs ......................................................................................................... 23

  • SSooCCrraatteess CCyycclloonnee VV SSooCC EEvvaalluuaattiioonn BBooaarrdd

    wwwwww..ddeevvbbooaarrddss..ddee page 3 of 48 20.06.2013 Version 1.2

    RTC ...................................................................................................................... 23 RTC (U15) FPGA Connection ........................................................................... 23

    GPIO ..................................................................................................................... 23 GPIO P14 FPGA connection ............................................................................. 23

    FPGA Connections ............................................................................................... 24 IOBANK3B ........................................................................................................ 24 IOBANK4A ........................................................................................................ 25

    USER LEDs .......................................................................................................... 25 USER LED FPGA Connection ........................................................................... 25

    -ADC / DAC Subsystem .................................................................................... 26 FPGA Connection (IOBANK4A) ........................................................................ 26 FPGA Connection (IOBANK8A) ........................................................................ 26

    -ADC / DAC Connector (P1).......................................................................... 26 EBV Observer Connector...................................................................................... 26

    CMOS Sensor Pin-Header (P10) ...................................................................... 27 FPGA Connection Temperature Sensor ............................................................... 27

    FPGA Connection ............................................................................................. 27 LVDS TFT Interface .............................................................................................. 28

    FPGA Connection (P2) ...................................................................................... 28 Bill of Material ....................................................................................................... 29

    Schematics ............................................................................................................... 33 P-CAD Viewer ................................................................................................... 33

    HPS, JTAG, Config, SDCard ................................................................................ 34 Clocking ................................................................................................................ 35 HPS : DDR3 Memory ............................................................................................ 36 HPS : CAN, UART, RTC, Button, LEDs ................................................................ 37 HPS : Gigabit Ethernet Phy ................................................................................... 38 HPS : USB ............................................................................................................ 39 Embedded USB-Blaster II ..................................................................................... 40 FPGA IO ............................................................................................................... 42 SD-ADC / DAC Subsystem ................................................................................... 43

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