Sputtered Ti-Cu as a Superior Barrier and Seed Layer for Panel-based

High-Density RDL Wiring Structures

Chandrasekharan Nair, Fabio Pieralisiα, Fuhan Liu, Venky Sundaram, Uwe Muehlfeldα, Markus Hanikaα,

Sesh Ramaswamiα, Rao Tummala

3D Systems Packaging Research Center

Georgia Institute of Technology

Atlanta, GA, USA α Applied Materials, Inc.

Email: cnair3@gatech.edu

Abstract

This paper demonstrates that sputtered Ti-Cu is a superior

barrier and seed layer on glass and organic panel substrates,

over traditional electroless seeding, for the fabrication of ultra-

fine copper traces (2-5µm) on dry film polymer dielectrics for

high-density 2.5D interposers. The current semi-additive

processes using electroless Cu seed face several challenges in

scaling the copper trace widths below 5µm due to two main

reasons: high-roughness of dielectric and high-thickness of

copper seed. In this paper, both the above limitations are

addressed by an advanced Physical Vapor Deposition (PVD)

process that can be scaled to large panels with high

throughputs. The PVD process developed in this study is

capable of depositing Ti-Cu barrier and seed layer on 500 mm

size panels at a low enough temperature for dry film polymer

dielectrics of glass transition temperatures (Tg) of 150-160°C.

The superiority of sputtered Ti-Cu over the conventional

electroless Cu seeding for achieving good and reliable adhesion

between Cu and dry film polymer dielectrics was investigated

by peel strength measurements after highly-accelerated stress

tests (HAST). The results indicate that sputtered process results

in higher peel strengths and without adhesive failures at the Ti-

Cu-polymer interfaces. Adhesive failures, however, were

observed with the traditional electroless seed processes. In

addition, the PVD processes resulted in small 2-5µm Cu traces

on smooth dielectric films like ZS-100, requiring no desmear

treatment. Such a process promises to be scalable to large

panels leading to low-cost fabrication of high-density 2.5D

interposers.

I. Introduction

The high bandwidth requirements between logic-to-logic

and logic-to-memory are beginning to require multi-chip

packaging in 2D and 3D at pitches below 50µm. Such high-

density interconnections require ultra-small 1-5µm copper

trace widths, well below the 8-12µm widths in current state-of-

the-art organic packages. Silicon interposers with ultra-fine

copper traces of less than 1µm are being manufactured for some

special applications using back end of line (BEOL) processes

on 300mm wafers. However, the high cost of silicon

interposers with through-silicon-vias (TSVs) has triggered the

interest in lower cost alternatives, fabricated on organic and

glass core substrates at 500 mm and larger panel sizes. The

fabrication of copper traces in these panels has been

traditionally performed using semi-additive processes with

electroless plated Cu seed layers. These plating processes limit

the scaling of copper traces to below 5µm dimensions due to

two main reasons: 1) too high a roughness of dielectric surface,

required to achieve good adhesion of the plated copper to the

polymer dielectric, and associated Pd catalyst residues; and 2)

too high a thickness of seed layer, typically around 400 nm,

required to achieve good coverage on rough dielectrics and

sufficient conductivity for subsequent electroplating. These

rough surfaces with a thicker seed make it difficult to etch the

Cu seed without damage to the plated copper traces, and

achieve high process yields below 5µm widths. The removal of

Pd residues is another big concern for the electrical

performance and reliability of fine Cu traces. Physical Vapor

Deposition (PVD) processes, commonly referred to as

sputtering, have been proposed to address these limitations by

depositing thinner seed layers on ultra-smooth polymer

dielectric surfaces and yet achieve excellent adhesion strength.

Mitsuya Ishida [1] demonstrated advanced APX organic

interposers with 6µm Cu traces using conventional semi-

additive processes and electroless plated Cu seed layers.

Shimizu et al. [2], [3] demonstrated integrated thin film high-

density organic package (i-THOP) substrates with 2µm Cu

traces using sputtered Ti-Cu as the barrier and seed layer on

photosensitive dielectrics. Current PVD tools available in

wafer foundries are limited to a maximum silicon wafer

diameter of 300mm. This paper demonstrates the PVD process

suitable for large panel processing, for sputtering Ti-Cu at a

low enough temperature, to be deposited on conventional dry

film polymer dielectrics used in package substrates, such as

Ajinomoto Build-up Film (ABF) with a Tg of 160°C. The

process is scalable to large panels of 500mm x 500mm and

beyond with very high throughputs, for potential cost

reduction. Sputtering of Ti-Cu in microvias with aspect ratios

of up to 3, with excellent via wall coverage has also been

demonstrated. [4]

The first section of this paper describes the fabrication

processes details to form small Cu traces with sputtered Ti-Cu

as the barrier and seed layer on ABF GX-92 and ZIF ZS-100

dielectric films, and compares it with conventional electroless

Cu plating processes.. The second section presents the studies

on the adhesion and reliability of sputtered Cu on polymer

surfaces. The sputtered and patterned electroplated samples

were subjected to highly-accelerated stress tests (HAST) to

verify the adhesion of copper to polymer. The peel strength of

the samples were measured using a 90° peel test after HAST

testing. X-ray photoelectron spectroscopy (XPS) analyses were

performed on the samples exposed to HAST to understand the

failure mechanism at the Cu-polymer interface for electroless

plated Cu and sputtered Ti-Cu seed layers.

978-1-4799-8609-5/15/$31.00 ©2015 IEEE 2248 2015 Electronic Components & Technology Conference

II. Fabrication of fine Cu traces

The dielectric films used in this study were ABF GX-92 and

ZIF ZS-100 provided by Ajinomoto Co., Inc. and Zeon

Corporation respectively. The properties of these films are

summarized in Table 1 below.

Table 1. Properties of two dielectric films used in the study

Property

Unit

ZS-100 [5]

GX-92 [6]

Dk

-

3.0

(@ 10 GHz)

3.3

(@ 1 GHz)

Df

-

0.006

(@ 10 GHz)

0.014

(@ 1 GHz)

Tg (TMA)

0C

162

153

CTE

ppm/ °C

25

39

Modulus

GPa

7

5

Water

absorption

wt. %

0.2

1

Thickness

microns

10

10

The dielectric films were vacuum laminated onto BT

laminate cores at 93°C. The samples were then hot pressed at

115°C for planarizing the surfaces. The films were then

thermally cured in oven by ramping the temperature from 30°C

to 180°C and keeping at 180°C for 30 min. Electroless copper

plating was performed for 20 min on the samples to obtain a

400 nm thick Cu seed layer. A desmear time of 10 min and 15

min respectively were used for ABF and ZIF films before

electroless Cu plating on these samples. Films of 50 nm Ti and

250 nm Cu were sputtered without vacuum break using a PVD

system at Applied Materials, without exceeding 150°C

temperature. The desmear treatment is not necessary in this

process, thus simplifying the process flow.

A high resolution photolithographic process [7] was used

for patterning copper traces on the samples. Dry film

photoresists were used, a high resolution photoresist from

Hitachi Chemical with a thickness of 7µm was used in the

current study. An adhesion promoter from Atotech,

NovalinkTM, was used to ensure good adhesion between the

copper seed and photoresist. An advanced projection

lithography tool, Ushio UX-44101, was used in the

photolithography processes. The copper structures were

formed by electrolytic plating to achieve 3-4µm thick plated

copper. The dry film resist was then stripped off followed by

the copper seed layer etching processes. A differential etch

solution from Atotech was used to etch copper seed layer. This

differential Cu etch is an anisotropic process, wherein copper

seed is etched away faster than the electroplated copper traces.

The Ti seed was removed using 0.5 wt. % HF solution. The

process flow for the fabrication of Cu traces is summarized in

Fig, 1.

Fig. 1. Semi-additive process flow.

The patterned Cu traces after seed layer etching on ZIF ZS-

100 dielectric film are shown in Figs. 2(a) and 2(b)

respectively. As shown in Fig. 3, line resolution of up to 4µm

was obtained on the ABF GX-92 film. 50 nm Ti and 250 nm

Cu sputtered seed layers were used in both these samples.

Fig. 2(a). 2.5µm – 4µm Cu traces on ZIF film.

Fig. 2(b). SEM image of 2.5µm Cu traces on ZIF film.

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Fig. 3. 4µm Cu traces patterned on ABF film.

As is well known, the resolution of Cu traces patterned by

photolithography processes depends on the average surface

roughness (Ra) of the dielectric film.

For electroless plating of copper seed, a desmear process

is required. During the 20 min desmear processes, the Ra of the

polymer dielectric film is increased to ensure good adhesion of

Cu to the polymer. The Ra of non-desmeared ZIF ZS-100 film

is lower than that of the non-desmeared ABF GX-92 film.

Accordingly, a line resolution of 2.5µm has been achieved on

the ZS-100 film.

Fig. 4(a) shows the Atomic Force Microscopic (AFM)

images of the ZS-100 film with PVD Ti-Cu without

desmearing. Fig. 4(b) shows the images of electroless Cu with

desmear. The Ra of the ZIF film increases from a low of 15 nm

for PVD Ti-Cu to as much as ~75 nm for electroless Cu.

Fig. 4(a). AFM image of the ZS-100 film without desmear

and sputtered with 50 nm Ti and 250 nm Cu seed;

Ra = 15 nm, Rrms = 20 nm; Rz ~ 150 nm.

Fig. 4(b). AFM image of the ZS-100 film after 20 mins of

desmear and plated with 400 nm electroless Cu seed;

Ra = 75 nm, Rrms = 100 nm; Rz ~ 1µm.

The other important parameter to be considered is the Rz,

defined as the average distance between the highest peak and

the lowest valley measured within five sampling lengths on the

dielectric surface. The increase in Rz value from ~150 nm to

~1µm makes the seed layer etching processes difficult to

achieve Cu traces below 5µm when using electroless seed.

As shown in Fig. 5, the Rz of ABF GX-92 film is about

1µm after 10 min of desmear processes.

Fig. 5. AFM image of the ABF GX-92 film after 10 mins of

desmear and plated with 400 nm electroless Cu seed;

Ra = 85 nm; Rrms = 114 nm; Rz ~ 1µm.

The relatively high Rz leads to seed residues after seed

layer etching processes (as shown in Fig 6). Also the etching of

Pd residues becomes very difficult in the Cu spaces, due to the

high Rz value (about 1µm) in the polymer dielectric surface

after the electroless Cu processes.

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Fig. 6. Electroless Cu seed residues after seed layer etching of

4µm Cu traces on the ABF GX-92 dielectric film.

III. Adhesion Tests and Reliability

The adhesion of Cu to the polymer surface becomes

important as the Cu trace widths get smaller. The most common

test to study the adhesion strength of Cu to polymer is the 90°

peel strength test. The set up used in this study to measure the

peel strength is shown in Fig. 7, whereas the schematic of the

test vehicle used is shown in Fig. 8. About 25µm thick Cu is

electroplated on the sample with 50nm Ti /200nm Cu

barrier/seed layer; the samples are then annealed for 1 hour at

190°C.

Fig. 7. The set-up for 90° peel strength test.

Fig. 8. Schematic of the test vehicle used for the peel strength

tests.

The fabricated test vehicle is first preconditioned by

moisture sensitivity level -3 (MSL 3) test as per IPC/JEDEC J-

STD-020C [8]. The preconditioning parameters are summarized

in Table 2. These preconditioned samples are then exposed to

an accelerated moisture resistance–unbiased HAST as per the

JEDEC JESD22-A118A standard. The peel strength of the

samples are measured after HAST.

Table 2. Preconditioning parameters

Condition Parameter Value

Bake

Temperature

125 0C for 24 hours

MSL3

Temperature 60 0C

Relative Humidity 60 %

Time 40 hours

Solder

Reflow

Cycle

Temperature 260 0C peak

(Lead free processes)

3 cycles

Peel Strength after HAST

The preconditioned test vehicle is exposed to unbiased

HAST as per the JEDEC JESD22-A118A standard [9]. The

conditions for HAST are summarized in Table 3.

Table 3. HAST test condition.

Test Parameter Value

Unbiased

HAST

Temperature 130 0C

(Dry bulb

temperature)

Relative Humidity 85 %

Time 96 hours

The peel force to pull 1 cm of the Cu strip is measured and

the peel strength is reported in kgf/cm as an average value of

five measurements. The measured peel strength with the above

test vehicle is shown in Fig. 9.

Fig. 9. Peel strength of 1 cm Cu strip with sputtered Ti-Cu

seed on ZS-100 after HAST.

The peel strength value of 1.6 kgf/cm for sputtered Ti-Cu

for ZS-100 film is much higher than the industry standard of

0.7 kgf/cm using the traditional electroless Cu seed. The

corresponding peel strength value with ABF GX-92 film with

a 400 nm thick electroless Cu seed (shown in Fig 10) is 0.8-0.9

kgf/cm. The same test vehicle stack-up shown in Fig. 7 and

same peel rate were employed for all the peel tests. Also, a peel

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strength value of 0.7 -0.8 kgf/cm is reported for ZS-100 film

with electroless Cu seed. [5]

Fig. 10. Peel strength of 1 cm Cu strip for electroless Cu seed

on ABF GX-92 film after HAST.

XPS analyses were performed on the peeled samples to

understand the mechanism for the difference in peel strength

values between sputtered Ti-Cu and electroless Cu seeds.

Fig. 11. Substrate and peeled Cu surfaces after a peel test.

As shown in Fig. 11, the peel strength tests produce two

surfaces: the substrate surface and the peeled Cu surface. XPS

analyses were performed on these two surfaces to understand

their elemental composition of the peeled surfaces. With the

sputtered Ti-Cu on ZS-100 film, the XPS analysis results are

shown in Fig. 12. Similar elemental compositions were

predicted by XPS on both the substrate and peeled Cu surfaces.

This indicates that the failure mechanism for sputtered Ti-Cu

on ZS-100 film is cohesive within the ZS-100 film. The tests

were repeated for sputtered Ti-Cu on ABF GX-92 film and the

adhesion failure mechanism was found to be cohesive within

the ABF film as well. Hence, it can be concluded that Ti acts

as an excellent adhesive layer for bonding Cu to polymer

surfaces. In addition, Ti is known as a barrier for the diffusion

of moisture. This prevents adhesion failure between the Cu-

polymer interfaces during the HAST tests.

Fig. 12. Cohesive failure in polymer film with sputtered Ti-

Cu seed implies excellent adhesion.

The elemental composition of the peeled Cu surfaces of

the ABF GX-92 film using electroless Cu seed is shown in Fig.

13. The results indicate that the failure mechanism for

electroless Cu seed on GX-92 film is adhesive. Adhesion

failure at the Cu-Pd interface indicates a weak bond, leading to

poor adhesion of Cu traces to the polymer film. Hence, there is

a need for an adhesive layer between the electroless Cu and

polymer to ensure the reliability of fine Cu traces.

Fig. 13: Adhesive failure between Cu and polymer film with

electroless Cu seed implies poor adhesion.

IV. Summary and Conclusion

This paper reports the superiority of PVD Ti-Cu as barrier

and seed layer over traditional electroless seeding, as

demonstrated with two, low Tg (150-160°C) dry film polymer

dielectrics ( ZS-100 and GX-92). Adhesion reliability studies

after HAST also confirm this observation. In addition, PVD or

sputtered Ti-Cu barrier and seed layers also produced smaller

Cu traces in the range 2.5µm- 5µm with the conventional semi-

additive processes. Studies are continuing to further apply this

technology to smaller Cu traces (< 5µm).

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Acknowledgments

The authors wish to acknowledge the Georgia Tech

industry consortium sponsors (Applied Materials, ZEON,

Ajinomoto, Atotech, Hitachi Chemical and Ushio) for

supporting this research and PRC staff (Chris White, Yutaka

Takagi and Jason Bishop) for their help with fabrication.

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