switched capacitor amplifiers...ref.: unbehauen inf 5440 - cmos image sensors ao 10v 4.11 pixel read...
TRANSCRIPT
0 - CMOS Image Sensors
AO 4.1
Pix
R
INF 544
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SWITCHED CAPACITOAMPLIFIERS
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AO 4.2
Pix
INF 54410V
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φ1
φ2
φ1
φ2
φ1
φ2
-
+
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AO 4.3
Pix
INF 54410V
el Read Out
φ1
φ2
φ1
φ2
φ1
φ2
Q
i
+ - -
+
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AO 4.4
Pix
INF 54410V
el Read Out
φ1
φ2
φ1
φ2
φ1
φ2
Q+ - -
+
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AO 4.5
Pix
INF 54410V
el Read Out
φ1
φ2
φ1
φ2
φ1
φ2
Q
i+-
-
+
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AO 4.6
Pix
INF 54410V
el Read Out
φ1
φ2
φ1
φ2
φ1
φ2
+-
-
+
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AO 4.7
Pix
INF 54410V
el Read Out
φ1
φ2
φ1
φ2
φ1
φ2
Q
i
+ - -
+
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AO 4.8
Pix
INF 54410V
el Read Out
φ1
φ2
φ1
φ2
φ1
φ2
Q+ - -
+
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AO 4.9
Pix
INF 54410V
el Read Out
φ1
φ2
φ1
φ2
Q+-
i
φ1
φ2
-
+
0 - CMOS Image Sensors
AO 4.10
Pix
SimFirst
φ1:
φ2:
Alter
φ1:
φ2: CF
Vx
φ1
φ2
Vo
Amplifier “offset”
-
+
Q
C
v = -Q/C-
+VC1
Ref.: Unbehauen
INF 544
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ple amplifier approach: A0 = infinite.
natively:
C1Vs
φ1
φ2
(alt:φ2)
(alt:φ1)
∆
φ1
φ2
Q
VC1Vs Vx–= VCF
0= Vout Vx=
Vs ∆Vs+ V– x Vx–= = because ∆Vs Vs–=
VCF
∆Q1CF
-----------–Vx– Vs Vx–( )–[ ]C1
CF------------------------------------------------------–
VsC1CF
-------------= = =
Vout Vx VCF+ Vs
C1CF------- Vx+= =
VC1Vx–= VCF
0= Vout Vx=
VC1Vs V– x=
VCF
∆Q1CF
-----------–Vs Vx Vx–( )––[ ]C1
CF----------------------------------------------------–= =
Vout VsC1CF-------– Vx+=
0 - CMOS Image Sensors
AO 4.11
Pix
Sum
Gen
CF
Vx
φ1
φ2 Vo-
+
T
Vou
Vo
Ref.: Unbehauen
INF 544
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ming amplifier (ideal):
erally:
(4.1)
C1V1p
φ2
φ1
φ2
φ1
C2V2p φ1
φ2
vj
vj+1
Cj
Cj+1
vm Cm
V1n
V2n
k
kT-T/2
t V1p φ1( ) V1
n φ2( )–[ ]C1CF------- V2
pφ1 V2nφ2–[ ]
C2CF-------+ Vx+=
ut kT( ) VxCjCF------- Vj
p kT T2---–
Vjn kT( )–
j 1=
m
∑+=
0 - CMOS Image Sensors
AO 4.12
Pix
Effe
•
•
•
•
The the son th
That
CF
φ1
φ2A
-
+
Vx
iVout
INF 544
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ct of Parasitics
Final amplifier open loop gain (DC)
Input offset
Leak current from sampling capacitors.
Parasitic capacitance (conductors)
result is found by applying uper position method e output signal.
is the sum of all effects.
C1φ1
φ2Cp
IL
Vs
Parasitc components
Final gain
V
0 - CMOS Image Sensors
AO 4.13
Pix
Out
Ope
Vout0-
+A
Ref.: Unbehauen
INF 544
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put signal as a consequence of offset and final gain.
n loop gain: A
(4.2)
Vi_o
Vx
Vout0 Vx Vout0–( )A=
A 1+( )Vout0 VxA=
Vout0A
1 A+-------------Vx ε0Vx= =
0 - CMOS Image Sensors
AO 4.14
Pix
Oupar
φ1:
φ2 (i
(4.3)
CF
C1
φ1
φ2A
-
+vi
vout
Cp
VC
CF C1+ + )
CF---------------------------
Ref.: Unbehauen
INF 544
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tput signal as a consequence of final gain and asitic capacitance.
ncremental voltage changes):
φ1
φ2
vs
Vout ViA–= ∆Vs vs–=
1Vs Vi– Vs Vx
A1 A+-------------–= = VCF
0= Vout VxA
1 A+-------------=
vi vs–C1
C1 Cp CF+ +--------------------------------- vout
CFC1 Cp CF+ +---------------------------------+=
vout vi– A= vs AC1
C1 Cp CF+ +--------------------------------- vout– A
CFC1 Cp CF+ +---------------------------------=
vout 1 A+CF
C1 Cp CF+ +--------------------------------- Avs
C1C1 Cp CF+ +---------------------------------=
vout
AvsC1
C1 Cp CF+ +---------------------------------
1 ACF
C1 Cp CF+ +---------------------------------+
-----------------------------------------------AvsC1
C1 Cp CF ACF+ + +---------------------------------------------------= =
voutC1CF------- A
1 C1 Cp+( ) CF⁄ A+ +--------------------------------------------------------vs
C1CF------- 1
1 εA1+
---------------vs= = εA1 1
A----
Cp(-----------=
0 - CMOS Image Sensors
AO 4.15
Pix
Ou e period τ.
(4.4)1 A+ )---------------
φ2 vout
Ref.: Unbehauen
INF 544
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tput signal as a consequence of leak current IL in the puls
voutLC1 Cp+
CF-------------------- 1
1 εA1+
---------------ILτ
C1 Cp+--------------------
ILτ
CF 1 εA1+( )
----------------------------ILτA
C1 Cp CF(+ +-------------------------------------== =
CF
C1
φ1
φ1
φ2
A-
+
CpIL Vx
vs
vi
φ1
φ2τ
0 - CMOS Image Sensors
AO 4.16
Pix
Fin
Sum
(4.5)
Ref.: Unbehauen
INF 544
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al result
ming (4.2), (4.3) and (4.4):
voutC1CF------- 1
1 εA+---------------vs
ILτ
CF 1 εA1+( )
----------------------------AVx1 A+-------------+ +=
0 - CMOS Image Sensors
AO 4.17
Pix
Offφ1:
φ2:
φ1:
φ2:CF
Vx
φ1
φ2 vo-
+
φ1
φ2
Ref.: Unbehauen
INF 544
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set CompensationVx is sampled, CF is charged to Vx
When Q=∆VsC1 is transferred to CF, Vx is already across CF with the negative charge at the amplifier output (when Vx er positive)
C1vs
φ2
φ1
VC1Vs Vx–= VCF
Vx= Vout Vx=
VC1Vs V– x( ) ∆Vs+ Vx–= =
∆VCF
∆Q1CF
----------- Vx––Vx– Vs Vx–( )–[ ]C1
CF------------------------------------------------------ Vx––= =
Vout Vx VsC1CF------- Vx–+ Vs
C1CF-------= =
0 - CMOS Image Sensors
AO 4.18
Pix
Co
Add real
ComthroIntroamp
φ φ
φ1φ2
vo-
+
φ2
φ1CF
Ck CF φ1
φ2
W/2L
Ref.: Unbehauen
INF 544
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mpensation of charge injection:
dummy switches that are clocked in anti phase with the switches.
pensation of charge injection and clock feed ugh:duce corresponding switches and capacitance on both lifier’s input terminals.
φ
C1
φ2
φ1
φ1
Ck
C1 φ2
φ1
v1p
vkp
v1n
vkn
WW/2LL
0 - CMOS Image Sensors
AO 4.19
Pix
Dyngm:
ro:
CL:
Cp:
Co
CF
Co
Cogmro
gmro
gmro
CL = Co
CL2 = Co+ Σ Ci1
n
CL1 = Co+ (CFCp)/(CF+Cp)[d
gm
Cp/C
INF 544
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amical Properties of SC AmplifiersAmplifier transconductance, determined by the transconductance of the input transistors.
Amplifier output resistance
Load capacitance of the configuration.
Parallel capacitance of the input node
C1
Cp
C1
Cnlog ω
G
B]
ro
F
gm/CL
1/τ1=1/roCL
0
1/roCL1
1/roCL2
3 dBv
t
vo
τ=∆t
0.63vo
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AO 4.20
Pix
Req
Sett
tts
0.01
INF 544
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uirements on the time constant:
ling to 1% of vo,ss set the following requirement to ts:
vovo,ss
τ
0.63vo,ss
vo vo ss, 1 e t τ⁄––( )=
dvodt
---------t 0=
vo ss,1τ---e t τ⁄–
t 0=
vo ss,τ
------------= =
ets τ⁄–
0,01=ts τ–( ) 0,01ln 4,6τ= =
τts
4 6,---------=
0 - CMOS Image Sensors
AO 4.21
Pix
Ins•
•
CF
CF*
1
1
2
vo
2
1
= (vi+-vi
-) C1/CF
vi+
vi-
INF 544
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trumental AmplifiersCorrelated double samplingPhase 1: Offset and LF noise are stored at the inputPhase 2: Subtracted from the amplified signal.
Differential topologyReduces charge injection and clock feed through. Reduces non linearity in capacitors (distortion)Improves PSSR (Power Supply Rejection Ratio)
1
2
C1
C1*1
Semi-differential
vi+
vi-
vo
1
1
1
1
2
2
2
2
1
1
CF
C1
C1*
CF*
-
+
+
-vo2
0 - CMOS Image Sensors
AO 4.22
Pix
INF 54410V
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READ-OUT CHAIN ARCHITECTURE
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AO 4.23
Pix
Co
INF 544
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lumn read out (principle)
0 - CMOS Image Sensors
AO 4.24
Pix
Co
1
2
2
2
2
1
1
vo
r
t
nt-1 nt
ADC
INF 544
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lumn read out (cont.)
CF
CF*
-
+
+
-
1
SHR
rad
st
Ibias
SHS1+2(1)
1+2(n-1)
1+2(n)
2
2
2
vo
1
0 - CMOS Image Sensors
AO 4.25
Pix
Rea
INF 544
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d out time diagram
Amplifier reset (1)
Transfer (2)
Column 1
Column n-1
Column n
Pixel reset
Sample reset
Sample signal
Pixel output
ADC strobe
0 - CMOS Image Sensors
AO 4.26
Pix
Corea(exSlow
SucApp
Sing(com
Cyc
ADC
INF 544
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lumn parallel d out ample) ADC is OK:
cessive roximation
le slope mon to all columns)
lic
Row select
Reset
Vdd
ADC ADC
Data bus
StrobeAddress(Slope)
0 - CMOS Image Sensors
AO 4.27
Pix
Syn
MecSynERS
MecSynGlob
INF 544
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chronizing
hanical shutter chronized with
hanical shutter chronized with al Reset
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AO 4.28
Pix
Syn(co
Elec
INF 544
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chronizing nt.)
tronic global shutter
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AO 4.29
Pix
Redbut
Skip + S - Al
Binn + S - M
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uced resolution higher frame rates
pingimple solutioniasing
ingpatial LP filterore complex
0 - CMOS Image Sensors
AO 4.30
Pix
Refe
Circuits and Systems
ras,
INF 544
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rences:
Unbehauen: MOS Switched-Capacitor and Continuous-Time Integrated Rolf Unbehauen, Andrzej CickockiSpringer-Verlag
Nakamura:Image Sensors and Signal Processing for Digital Still Cameedited by Junich NakamuraTaylor & Francis