terahetrz transistor
TRANSCRIPT
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TERAHERTZ TRANSISTOR
A Seminar Report
Submitted in partial fulfillment of the requirements for the award of the degree
Of
MASTER O TE!HNO"O#$
IN%"SI &ESI#N
'(&I%$A !HA)HAN *+,----.+---./
)TTRA0HAN& TE!HNI!A" )NI%ERSIT$
A!)"T$ O TE!HNO"O#$ )NI%ERSIT$ !AM1)S
&EHRA&)N
S)'MITTE& TO2 S)'MITTE& '$2
1RO3 %ISHA" RAMO"A &I%$A !HA)HAN
*H3O3& O M3TE!H %"SI &ESI#N/ MTE!H %"SI &ESI#N
MONI0A #)1TA
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*SEMINAR !OR&INATOR/
)TTRA0HAN& TE!HNI!A" )NI%ERSIT$
A!)"T$ O TE!HNO"O#$ )NI%ERSIT$ !AM1)S
&EHRA&)N
!ERTII!ATE
This is to certify that the seminar report entitled "TERAHERTZ TRANSISTOR" submitted by Diya !hauhan in
partial fulfillments for the reuirements for the a#ard of master of technolo$y de$ree in %&SI Desi$n at 'aculty of
Technolo$y (niersity !ampus Dehradun is an authentic #or) carried out by him under my superision and
$uidance*
To the best of my )no#led$e+ the matter embodied in the seminar report has not been submitted to any other
(niersity , Institute for the a#ard of any de$ree of diploma*
Date- 1RO3 %ISHA" RAMO"A
*H3O3& O M3TE!H %"SI &ESI#N.
MONI0A #)1TA
/SEMINAR !OR&INATOR/
0
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A!0NO4"EEMENT
It is a $reat pleasure and moement of immense satisfaction for us to e1press our sense of profound $ratitude and
indebtedness to#ards all those #ho directly or indirectly inoled them self in the deelopment of this seminar report*
2e are $rateful to our honorable seminar coordinator 3oni)a 4upta for their dili$ent attention to#ards this seminar
report throu$hout it5s all sta$es of deelopment *Her comments and criticism hae been of $reat conseuence *
2e than)ful ac)no#led$e the co6operation e1tended to#ards us by the staff of department of 3*TE!H %&SI DESI4N
faculty of technolo$y+ (T( campus Dehradun and the library staff for proidin$ facilities for the #or) and study material
needed*
&ast but not least #e are heartily than)ful to all friends #ho hae directly or indirectly help us in this seminar report*
DI%7A !HA(HAN
ENRO&&* NO*809999:8999:
SE3 ;RD
;
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A'STRA!T
In this paper #e hae defined ne# transistor architecture* The Terahert< transistor pro=ect is a culmination of
seeral adanced research studies* The desi$n #ill probably set the deelopment path for inte$rated circuit
technolo$ies throu$h 0989 and beyond* The Terahert< architecture offers increased freuency scalin$+ lo#
latency+ and si$nificantly improed po#er efficiency* Intel is ery e1cited about hain$ deeloped the Teraherty addressin$ the po#er problem+ it paes the #ay for the continuation of 3oore?s &a# throu$h the
end of the decade+ and this #ill enable end user applications that are beyond our ima$ination today* As #ith any
ne# technolo$y+ there are numerous technical issues that need to be resoled before olume production can be$in*
Intel beliees that the Terahert< transistor architecture #ill be become the clear choice for the second half of the
decade*
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TA'"E O !ONTENTS
A!0NO4"EEMENTS
A'STRA!T
TA'"E O !ONTENTS
Chapter 1: INTRODUCTION...................................................................................................................6
Chapter 2: EVOLUTION OF INTEGRATED CIRCUIT........................................................................7
Chapter 3: TRANSISTOR....................................................................................................................9-1
3.1 Types............................................................................................................................................9
3.2 What is suitable for Terahertz Transistor?................................................................................10
Chapter !: FUNDA"ENTAL C#ALLENGE FOR T#IS DECADE ........................................11-13
4.1 Transistor Ioff leakage...............................................................................................................11
4.2 Transistor Gate eakage............................................................................................................11
4.3 !oft "rror #ate..........................................................................................................................12
4.4 $igh %perating &oltage.............................................................................................................13
4.' Gate (elay an( )ri*e +urrent....................................................................................................13
Chapter $: TERA#ERT% TRANSISTOR......................................................................................1!-1$
'.1 )eplete( !ubstrate Transistor...................................................................................................14
'.2 Gate )iele+tri+..........................................................................................................................1'
Chapter 6: SOLUTION OF &O'ER &RO(LE" 'IT# TERA#ERT% TRANSISTER........16-1)
,.1 !olution of Ioff eakage............................................................................................................1,
,.2 !olution of Transistor Gate leakage by Gate )iele+tri+...........................................................1,
,.3 #esistan+e #e(u+tion.................................................................................................................1-
,.4 !olution of !oft "rror #ate........................................................................................................1-
,.' !olution of $igh %perating &oltage..........................................................................................1
Chapter 7: TRANSISTOR &ERFOR"ANCE CO"&ARISON......................................................19
Chapter ): ADVANTAGES OF TERA#ERT% TRANSISTER.......................................................2
Chapter 9: A&&LICATION...............................................................................................................21
Chapter 1: NON-&LANER TRI-GATE TRANSISTER.................................................................22
Chapter 11: (I(LIOGRA* .........................................................................................................23
@
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!hapter +2 INTRO&)!TION
Transistors are basic buildin$ bloc)s in analo$ circuit applications li)e ariable6$ain amplifiers+ data
conerters+ interface circuits+ and continuous6time oscillators and filters* The desi$n of the transistor has
under$one many chan$es since its debut in 8BC* Not only hae they become smaller+ but also their
speeds hae increased alon$ #ith their ability to consere po#er* Transistor research brea)throu$hs #ill
allo# us to continue 3oore?s &a# throu$h end of decade* I! Industry is ma)in$ transition from lanar
to Non6lanar Transistors* This deelopment has potential to enable products #ith hi$her performance
that use less po#er* Effectie transistor freuency scalin$ is an eer present problem for inte$rated
circuit manufacturers as today5s desi$ns are pushin$ the limits of current $eneration technolo$y* As more
and more transistors are pac)ed onto a slier of silicon+ and they are run at hi$her and hi$her speeds+ the
total amount of po#er consumed by chips is $ettin$ out of hand* !hips that dra# too much po#er $et too
hot+ drain batteries unnecessarily /in mobile applications. and consume too much electricity* This is a
ma=or problem* If this po#er problem is not addressed+ 3oore?s &a# #ill be throttled and futuristic
applications such as real6time speech reco$nition and translation+ real6time facial reco$nition /forsecurity applications. or rendered $raphics #ith the ualities of ideo #ill neer be reali
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!hapter ,2 E%O")TION O INTE#RATE&
!IR!)IT
The I! #as inented in 'ebruary 8@ by ac) ilby of Te1as Instruments* The planner ersion of I!
#as deeloped independently by Robert Noyce at 'airchild in uly 8@* Since then+ the eolution of
this technolo$y has been e1tremely first paced* One #ay to $au$e the pro$ress of the field is to loo) at
the comple1ity of the I!s as a function of time*
3oore5s la# describes a lon$6term trend in the history of computin$ hard#are* The number of transistors
that can be placed ine1pensiely on an inte$rated circuit has doubled appro1imately eery t#o years*
The trend has continued for more than half a century and is not e1pected to stop until 098@ or later*
The capabilities of many di$ital electronic deices are stron$ly lin)ed to 3oore5s la#- processin$ speed+
memory capacity+ sensors and een the number and si
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The history of I!s can be described in terms of different eras+ dependin$ on the components count*
Small6scale inte$ration /SSI. refers to the inte$ration of 86890deices+ medium6scale inte$ration /3SI.
to the inte$ration of 890689;deices+ lar$e6scale inte$ration /&SI. to 89;689@deices+ ery lar$e6scale
inte$ration /%&SI. to the 89@689Gdeices+ and no# (ltra lar$e scale inte$ration /(&SI. to the inte$ration
of 89G689deices* Of course+ these boundaries are some#hat fu
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!hapter 52 TRANSISTOR
The name transistor is a portmanteau of the term "transfer resistor"*
A transistor is a semiconductor deice used to amplify and s#itch electronic si$nals* It is made of a solid
piece of semiconductor material+ #ith at least three terminals for connection to an e1ternal circuit* Aolta$e or current applied to one pair of the transistor5s terminals chan$es the current flo#in$ throu$h
another pair of terminals* >ecause the controlled /output. po#er can be much more than the controllin$
/input. po#er+ the transistor proides amplification of a si$nal* Today+ some transistors are pac)a$ed
indiidually+ but many more are found embedded in inte$rated circuits*
The transistor is the fundamental buildin$ bloc) of modern electronic deices+ and is ubiuitous in
modern electronic systems* 'ollo#in$ its release in the early 8@9s the transistor reolutioni
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hysical pac)a$in$- throu$h hole metal+ throu$h hole plastic+ surface mount+ ball $rid array+ po#er
modules
Amplification factor hfe /transistor beta.
53, 4hat is suitable for Terahert6 Transistor7
2e hae >T and 'ETs* >ut 'ET has hi$her input resistance than that of >T* 'ET is less noisy than
>T* 'ET is faster than >T* 'ET is thermally more stable than the >T sue to absence of minority
carrier* 4ain6>and#idth product is $reater for 'ET*
As Terahert< Transistor is a speedy deice so+ 'ET is the most suitable deice for terahert< operation due
to aboe parameters*
89
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!hapter 82 )N&AMENTA" !HA""EN#E OR
THIS &E!A&E
'undamental challen$e for this decade is to continue 3oore?s &a# #ithout e1ponential increase in
po#er consumption* This e1ponential rise in po#er consumption is drien by Transistor Ioff&ea)a$e+
Transistor 4ate &ea)a$e+ Hi$h Operatin$ %olta$e+ Soft Error Rate+ hi$h source and drain resistance+ hi$h
source and drain capacitance*
83+ Transistor Ioff lea9age
Ideally+ current only flo#s across the channel /directly beneath the $ate. from source to drain #hen the
transistor is turned ON* As transistors $et smaller+ current flo#s bet#een the source and drain een #hen
it shouldn?t* If current flo#s under the channel #hen the transistor is turned O''+ it is called Off6state
lea)a$e* Sub6threshold lea)a$e consumes po#er in the standby or off state* A lea)y deice reuires a
hi$her operatin$ olta$e*
83, Transistor #ate "ea9age
A $ate dielectric is the material that separates a transistor5s $ate for its actie re$ion and controls the on
and off s#itch* !urrent $eneration !3OS $ate controllers operate #ith only a three atom thic) dielectric
layer for s#itchin$ control* Thinner $ates produce faster s#itchin$ but are also responsible for current
lea)a$e+ thus slo#in$ the oerall transistor efficiency due to capacitance issues* 2e hae reached the
88
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limit of 4ate O1ide /SiO0. scalin$* ;9nm transistor had 9*Cnm $ate o1ide Thinner o1ides lea) more*
4ate o1ide can $et so thin it no lon$er acts as a $ood insulator*
835 Soft Error Rate
Alpha particles /from atmosphere or pac)a$e. stri)es silicon* Impact causes ioni
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838 High Operating %oltage
A hi$h source and drain =unction capacitance ta)es lon$er for the transistor to build up enou$h ener$y to
s#itch on and off* !urrent cro#dsF throu$h thin source and drain re$ions+ so they hae more resistance*
2e can?t lo#er the resistiity because Silicon dopin$ density is at its saturation limit* 2hen source and
drains hae hi$h resistance+ hi$her olta$es are needed to moe current carriers* A hi$h source and drain
=unction capacitance ta)es lon$er for the transistor to build up enou$h ener$y to s#itch on and off*
83: #ate dela( and &ri;e
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!hapter :2 TERAHERTZ TRANSISTOR
Intel?s researchers hae deeloped a ne# type of transistor that it plans to use to ma)e microprocessors
and other lo$ic products /such as chip sets. in the second half of the decade*
The so6called TeraHert
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:3, #ate &iele
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!hapter =2 SO")TION O 1O4ER 1RO'"EM
4ITH TERAHERTZ TRANSISTER
=3+ Solution of Ioff "ea9age
>y placin$ an insulation barrier /o1ide. bet#een the !3OS $ate and the base substrate #e can reduce
the po#er problem in to a si$nificant amount* The insulator proides a boundary layer* No lea)a$e path
throu$h substrate+ i*e* the transistor is built into a layer of silicon on top of a layer of insulation* This
layer of silicon is depleted to create a ma1imum drie current #hen the transistor is turned on #hich
allo#s the s#itch to turn on and off faster* This ability to turn on and off faster ma1imi
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=35 Resistan
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=3: Solution of High Operating %oltage
Due to nullify the off6state lea)a$e+ $ate lea)a$e+ floatin$ body effect and lo# resistance reuired
olta$e is no# ery small about 9*G%*
8C
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!hapter .2 TRANSISTOR 1ERORMAN!E
!OM1ARISON
8
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!hapter >2 A&%ANTA#ES O TERAHERTZ
TRANSISTER
8* Reduces lea)a$e current by 89+999M for the same capacitance
0* Reduces un#anted current flo# by 899M
;* Increased electron mobility
B* Increased reliability
@* Hi$h speed
G* Ease of circuit desi$n
:* No lea)a$e path throu$h substrate
C* &o#est =unction capacitance
* &ess olta$e reuired to turn ON transistor
89* Eliminates subsurface lea)a$e
88* Soles hi$h resistance
80* Eliminates floatin$ body effect
8;* 3inimi
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!hapter ?2 A11"I!ATION
Due to its ery difficult fabrication process the cost is hi$h* So+ these types of transistors are not used in$eneral purpose* Intel launched #orld first TH< transistor of speed 0TH< in 0998*Also A3D+ I>3 made
their first terahert< transistor in their lab of speed ;*;TH
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!hapter +-2 NON@1"ANER TRI@#ATE
TRANSISTER
The basic en$ineerin$ approach to the Terahert< pro=ect is planar transistor architecture+ meanin$ it has a
sin$le $ate control mechanism per transistor* A non6planar tri6$ate transistor #or)s ia a three6
dimensional desi$n #ith three $ate controllers per !3OS comple1* Tri6$ate transistors do not e1hibit the
substrate or $ate layer thic)ness concerns presented earlier in for the planar Terahert< pro=ect* 2ith more
$ates per transistor+ the system is capable of sustainin$ hi$her olta$e loads if reuired for specific
implementations* A tri6$ate arran$ement allo#s for more electrons to be pushed throu$h the transistor
comple1 #ith further decreases in resistance+ electrical lea)a$e+ and po#er consumption* ust thin)+ Intel
processors may attain freuencies #ell into the hundreds of 4i$ahert
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!hapter ++2 'I'"IO#RA1H$
'OO0S2
I* D* !hattaopadhyay+ *! Ra)shit Electronics 'undamental and Applications Ninth Edition+ Ne# A$e
International ublishers*
II* >en 4* Streetman+ San=ay umar >aner=ee Solid State Electronics Deices Si1th Edition+ HI
&earnin$ riate &imited
4E'-
I* http-,,ne#s*soft;0*com,closer6to686terahert