testing vrm

8/9/2019 Testing VRM

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How To Test A Motherboard Thru Their VRMs

In Uncategorizedon May 13, 2012at 6:12 am

Voltage Regulator Modules (VRMs

VRMs (voltage regulator modules) are a specific class of MOSFETs

!Far from "eing true# $ VRM module consists of t%e controlling I& and MosFet's (if e

focus onl on semiconductors)#

*oever+ it is true t%at t%ere are man tpe of FET's# MOSFET "eing t%e most commonone# ,FET is one of t%e ot%er tpe#-

MOSFETS are a specific tpe of FETs# FETs %ave several advantages over "ipolar

transistors# For a "asic description on t%e or.ings of a voltage regulator+ searc% on

!/012 data- on 3oogle or 4a%oo (/012 is a "asic 25volt regulator)#

VRMs ta.e one voltage (suc% as 62 V7&) and produce a different+ loer voltage t%at isneeded " various components (microprocessor+ memor+ etc#)# Eac% VRM can onl

produce one output at a time+ so to different VRMs are needed if t%e &8U and memor

operate at different voltages# T%e output of t%e VRM can "e varied slig%tl+ depending on

%o e9ternal components are connected and controlled+ so some mot%er"oards are a"le to%ave setta"le voltages for memor# &8U voltage is usuall+ "ut not alas+ ta.en care of

automaticall# True varia"le poer supplies+ %ere t%e voltage is varia"le over a largerange+ aren't used in 8&s# T%e middle leg is usuall cut off+ "ecause it is connected to t%e

case+ %ic% is soldered to t%e "oard# T%e case is often+ "ut not alas+ connected to

ground# To test one+ ou need to .no %at t%e input and output s%ould "e+ t%en measure

t%em it% respect to a .non ground# If t%e VRM produces no or lo output it% properinput+ eit%er it's "ad+ or an e9ternal controlling component is "ad# If t%e input is "ad+ loo.

for upstream damage# Usuall+ it's "est to test a VRM in5circuit (it% &8U+ memor+ etc#

removed:) so t%at t%e output can "e c%ec.ed at t%e immediate output of t%e VRM+ as ellas at t%e point of connection of t%e poered device#

T%e VRM c%ip generates drive pulses for t%e gate of t%e MOSFET# T%e MOSFET drives

t%e inductor and t%e resulting spi.es are rectified and filtered eit%er it% a snc%ronous

rectifier fet controlled " t%e VRM c%ip or a diode#t%e c%ip gets feed"ac. from t%e outputto var t%e dut ccle t%us t%e output voltage# Tt%e tec%nical name is "uc. converter#

;uc. converter is t%e entire circuit+ "uc. controller is t%e ic t%at controls t%e converter#

!ro"edure #or testi$g Voltage Regulator Modules (VRMs:
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(T%is assumes t%at an "ad capacitor pro"lems %ave alread "een fi9ed#)

#>+ 62+ 6#>+ 62+ 6+ 62+ 6


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If VRM I& is "usted+ it ould "e %ard to find a ne one# Sometimes (rarel) onl one of

t%e mosfets "rea.+ usuall t%e upper one# D%en it does t%at+ t%e loer one mig% go poof'

as ell (protecting t%e &8U)#

If one "rea.s+ replace "ot%# &%ec. I& for damage+ mig%t "e good to replace t%at one as

ell+ sometimes it is t%e cause of t%is mess#-d# Measure voltage at t%e output of t%e VRM# T%e value o"tained depends on t%e

functions "eing poered " t%e VRM+ so .noledge of t%e e9pected value is reuired#$nt%ing different t%an e9pected indicates a failed VRM (note t%at output ma "e %ig%er

or loer t%an e9pected if "ad)#

e# Measure voltage at t%e device "eing poered# T%is reuires .noledge of t%e device(%ic% pins are poer pins)# 8inouts are readil availa"le on t%e Internet for >15pin+

/=G0@= (>0@>+ >0@@+ >0@2) ou%ave voltage feed"ac. and a sample of t%e inductor current is also fed"ac.# In voltage

mode control+ t%e output of its error amplifier (%ic% compares t%e output voltage sampleto an internal reference voltage) is compared to a satoot% ramp# T%e start of t%e ramp isalso t%e start of t%e sitc% (c%opper) on5time %en t%e ramp voltage rises a"ove t%e

error amplifier output voltage+ t%e sitc% is turned off+ and remains off until t%e ramp

voltage is reset to !zero-# &urrent mode control is similar+ e9cept t%e satoot% voltage isa sample (scaled " t%e output transformer in $&57& 8GSs) of t%e inductor current# T%is

lets t%e 8GS resond muc% more uic.l to load transients and OG8 s%ort circuits#

I'm not sure %et%er !ramping up- refers to t%e satoot% ramp or to t%e soft5start

function at turn5on# Soft5start prevents large currents t%roug% t%e sitc% during t%e turn5on time+ %ile t%e IG8 voltage is still increasing# ;asicall+ soft5start limits t%e sitc% on5

time and current stress+ so t%at t%e OG8 voltage comes up more slol# $not%er feature

t%at is implemented in t%e >0@= famil 8DM I&s is a loc.5out t%at .eeps t%e device fromturning on until its Vcc is %ig% enoug% to maintain control+ during turn5on+ turn off+ or a

IG8 voltage drop5out# I don't t%in. t%e >2=@ %as t%is feature+ and I'm not sure a"out t%e

T@J@ (t%e're almost >15ear5old designs)#

$ctuall+ OG8 voltage overs%oot can also "e controlled or not " t%e compensationcomponents in t%e error amplifier circuitr#


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If ou ant to get a "etter picture of %o pulse5idt% modulation is accomplis%ed L

"etter t%an m s%ort paragrap% L I'd suggest c%ec.ing out t%e datas%eet for an S3>2=@ or

a T@J@+ %ic% %ave "loc. diagrams as ell as ver"iage#

Source Output

7rain Input3ate 3ate

&urrent flos from t%e 7rain to t%e Source afai.# (D%en t%e gate is (OB))&an also flo "ac.ards once t%e gate is on+ %oever+ t%e "od diode ill conduct %en

t%e gate goes off+ leading to rapid %eating#

*o to find t%e inputs and outputs on VRMs?

Ouput is past t%e c%o.e on output capacitorsInput on input capacitors

In' ill %ave 6


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M met%od+ strip t%e "oard of an %eatsin.s and "atter and cmos c%ips if possi"le+

remove all t%ermal paste and t%ermal pads+ pre%eat oven to >0@F+ elevate t%e mot%er"oard

off of a pan (i "all up aluminum foil and leave a little point end for @ mounting %oles tosupport t%e "oard) and "a.e for 2 minutes# I don't suggest pus%ing past A minutes+ it's

never "een "eneficial in m cases and stin.s li.e %ell# ;ut so long as ou can vent t%e

%ouse afterard %e it's fun#

Testi$g VRMs

8rocedure for testing Voltage Regulator Modules (VRMs)?

(T%is assumes t%at an "ad capacitor pro"lems %ave alread "een fi9ed#)

#>+ 62+ 6#>+ 62+ 6+ 62+ 615pin+


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/=G

testing vrm

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